1 //===-- FastISel.h - Definition of the FastISel class ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the FastISel class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_FASTISEL_H
15 #define LLVM_CODEGEN_FASTISEL_H
17 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/SmallSet.h"
21 #include "llvm/CodeGen/ValueTypes.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
28 class FunctionLoweringInfo;
30 class MachineBasicBlock;
31 class MachineConstantPool;
32 class MachineFunction;
34 class MachineFrameInfo;
35 class MachineRegisterInfo;
37 class TargetInstrInfo;
40 class TargetRegisterClass;
41 class TargetRegisterInfo;
43 /// FastISel - This is a fast-path instruction selection class that
44 /// generates poor code and doesn't support illegal types or non-trivial
45 /// lowering, but runs quickly.
48 DenseMap<const Value *, unsigned> LocalValueMap;
49 FunctionLoweringInfo &FuncInfo;
50 MachineRegisterInfo &MRI;
51 MachineFrameInfo &MFI;
52 MachineConstantPool &MCP;
54 const TargetMachine &TM;
56 const TargetInstrInfo &TII;
57 const TargetLowering &TLI;
58 const TargetRegisterInfo &TRI;
59 MachineInstr *LastLocalValue;
62 /// getLastLocalValue - Return the position of the last instruction
63 /// emitted for materializing constants for use in the current block.
64 MachineInstr *getLastLocalValue() { return LastLocalValue; }
66 /// setLastLocalValue - Update the position of the last instruction
67 /// emitted for materializing constants for use in the current block.
68 void setLastLocalValue(MachineInstr *I) { LastLocalValue = I; }
70 /// startNewBlock - Set the current block to which generated machine
71 /// instructions will be appended, and clear the local CSE map.
75 /// getCurDebugLoc() - Return current debug location information.
76 DebugLoc getCurDebugLoc() const { return DL; }
78 /// SelectInstruction - Do "fast" instruction selection for the given
79 /// LLVM IR instruction, and append generated machine instructions to
80 /// the current block. Return true if selection was successful.
82 bool SelectInstruction(const Instruction *I);
84 /// SelectOperator - Do "fast" instruction selection for the given
85 /// LLVM IR operator (Instruction or ConstantExpr), and append
86 /// generated machine instructions to the current block. Return true
87 /// if selection was successful.
89 bool SelectOperator(const User *I, unsigned Opcode);
91 /// getRegForValue - Create a virtual register and arrange for it to
92 /// be assigned the value for the given LLVM value.
93 unsigned getRegForValue(const Value *V);
95 /// lookUpRegForValue - Look up the value to see if its value is already
96 /// cached in a register. It may be defined by instructions across blocks or
98 unsigned lookUpRegForValue(const Value *V);
100 /// getRegForGEPIndex - This is a wrapper around getRegForValue that also
101 /// takes care of truncating or sign-extending the given getelementptr
103 std::pair<unsigned, bool> getRegForGEPIndex(const Value *V);
105 /// recomputeInsertPt - Reset InsertPt to prepare for insterting instructions
106 /// into the current block.
107 void recomputeInsertPt();
109 /// enterLocalValueArea - Prepare InsertPt to begin inserting instructions
110 /// into the local value area and return the old insert position.
111 MachineBasicBlock::iterator enterLocalValueArea();
113 /// leaveLocalValueArea - Reset InsertPt to the given old insert position
114 void leaveLocalValueArea(MachineBasicBlock::iterator OldInsertPt);
119 explicit FastISel(FunctionLoweringInfo &funcInfo);
121 /// TargetSelectInstruction - This method is called by target-independent
122 /// code when the normal FastISel process fails to select an instruction.
123 /// This gives targets a chance to emit code for anything that doesn't
124 /// fit into FastISel's framework. It returns true if it was successful.
127 TargetSelectInstruction(const Instruction *I) = 0;
129 /// FastEmit_r - This method is called by target-independent code
130 /// to request that an instruction with the given type and opcode
132 virtual unsigned FastEmit_(MVT VT,
136 /// FastEmit_r - This method is called by target-independent code
137 /// to request that an instruction with the given type, opcode, and
138 /// register operand be emitted.
140 virtual unsigned FastEmit_r(MVT VT,
143 unsigned Op0, bool Op0IsKill);
145 /// FastEmit_rr - This method is called by target-independent code
146 /// to request that an instruction with the given type, opcode, and
147 /// register operands be emitted.
149 virtual unsigned FastEmit_rr(MVT VT,
152 unsigned Op0, bool Op0IsKill,
153 unsigned Op1, bool Op1IsKill);
155 /// FastEmit_ri - This method is called by target-independent code
156 /// to request that an instruction with the given type, opcode, and
157 /// register and immediate operands be emitted.
159 virtual unsigned FastEmit_ri(MVT VT,
162 unsigned Op0, bool Op0IsKill,
165 /// FastEmit_rf - This method is called by target-independent code
166 /// to request that an instruction with the given type, opcode, and
167 /// register and floating-point immediate operands be emitted.
169 virtual unsigned FastEmit_rf(MVT VT,
172 unsigned Op0, bool Op0IsKill,
173 const ConstantFP *FPImm);
175 /// FastEmit_rri - This method is called by target-independent code
176 /// to request that an instruction with the given type, opcode, and
177 /// register and immediate operands be emitted.
179 virtual unsigned FastEmit_rri(MVT VT,
182 unsigned Op0, bool Op0IsKill,
183 unsigned Op1, bool Op1IsKill,
186 /// FastEmit_ri_ - This method is a wrapper of FastEmit_ri. It first tries
187 /// to emit an instruction with an immediate operand using FastEmit_ri.
188 /// If that fails, it materializes the immediate into a register and try
189 /// FastEmit_rr instead.
190 unsigned FastEmit_ri_(MVT VT,
192 unsigned Op0, bool Op0IsKill,
193 uint64_t Imm, MVT ImmType);
195 /// FastEmit_rf_ - This method is a wrapper of FastEmit_rf. It first tries
196 /// to emit an instruction with an immediate operand using FastEmit_rf.
197 /// If that fails, it materializes the immediate into a register and try
198 /// FastEmit_rr instead.
199 unsigned FastEmit_rf_(MVT VT,
201 unsigned Op0, bool Op0IsKill,
202 const ConstantFP *FPImm, MVT ImmType);
204 /// FastEmit_i - This method is called by target-independent code
205 /// to request that an instruction with the given type, opcode, and
206 /// immediate operand be emitted.
207 virtual unsigned FastEmit_i(MVT VT,
212 /// FastEmit_f - This method is called by target-independent code
213 /// to request that an instruction with the given type, opcode, and
214 /// floating-point immediate operand be emitted.
215 virtual unsigned FastEmit_f(MVT VT,
218 const ConstantFP *FPImm);
220 /// FastEmitInst_ - Emit a MachineInstr with no operands and a
221 /// result register in the given register class.
223 unsigned FastEmitInst_(unsigned MachineInstOpcode,
224 const TargetRegisterClass *RC);
226 /// FastEmitInst_r - Emit a MachineInstr with one register operand
227 /// and a result register in the given register class.
229 unsigned FastEmitInst_r(unsigned MachineInstOpcode,
230 const TargetRegisterClass *RC,
231 unsigned Op0, bool Op0IsKill);
233 /// FastEmitInst_rr - Emit a MachineInstr with two register operands
234 /// and a result register in the given register class.
236 unsigned FastEmitInst_rr(unsigned MachineInstOpcode,
237 const TargetRegisterClass *RC,
238 unsigned Op0, bool Op0IsKill,
239 unsigned Op1, bool Op1IsKill);
241 /// FastEmitInst_ri - Emit a MachineInstr with two register operands
242 /// and a result register in the given register class.
244 unsigned FastEmitInst_ri(unsigned MachineInstOpcode,
245 const TargetRegisterClass *RC,
246 unsigned Op0, bool Op0IsKill,
249 /// FastEmitInst_rf - Emit a MachineInstr with two register operands
250 /// and a result register in the given register class.
252 unsigned FastEmitInst_rf(unsigned MachineInstOpcode,
253 const TargetRegisterClass *RC,
254 unsigned Op0, bool Op0IsKill,
255 const ConstantFP *FPImm);
257 /// FastEmitInst_rri - Emit a MachineInstr with two register operands,
258 /// an immediate, and a result register in the given register class.
260 unsigned FastEmitInst_rri(unsigned MachineInstOpcode,
261 const TargetRegisterClass *RC,
262 unsigned Op0, bool Op0IsKill,
263 unsigned Op1, bool Op1IsKill,
266 /// FastEmitInst_i - Emit a MachineInstr with a single immediate
267 /// operand, and a result register in the given register class.
268 unsigned FastEmitInst_i(unsigned MachineInstrOpcode,
269 const TargetRegisterClass *RC,
272 /// FastEmitInst_extractsubreg - Emit a MachineInstr for an extract_subreg
273 /// from a specified index of a superregister to a specified type.
274 unsigned FastEmitInst_extractsubreg(MVT RetVT,
275 unsigned Op0, bool Op0IsKill,
278 /// FastEmitZExtFromI1 - Emit MachineInstrs to compute the value of Op
279 /// with all but the least significant bit set to zero.
280 unsigned FastEmitZExtFromI1(MVT VT,
281 unsigned Op0, bool Op0IsKill);
283 /// FastEmitBranch - Emit an unconditional branch to the given block,
284 /// unless it is the immediate (fall-through) successor, and update
286 void FastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL);
288 unsigned UpdateValueMap(const Value* I, unsigned Reg);
290 unsigned createResultReg(const TargetRegisterClass *RC);
292 /// TargetMaterializeConstant - Emit a constant in a register using
293 /// target-specific logic, such as constant pool loads.
294 virtual unsigned TargetMaterializeConstant(const Constant* C) {
298 /// TargetMaterializeAlloca - Emit an alloca address in a register using
299 /// target-specific logic.
300 virtual unsigned TargetMaterializeAlloca(const AllocaInst* C) {
305 bool SelectLoad(const User *I);
307 bool SelectBinaryOp(const User *I, unsigned ISDOpcode);
309 bool SelectFNeg(const User *I);
311 bool SelectGetElementPtr(const User *I);
313 bool SelectCall(const User *I);
315 bool SelectBitCast(const User *I);
317 bool SelectCast(const User *I, unsigned Opcode);
319 /// HandlePHINodesInSuccessorBlocks - Handle PHI nodes in successor blocks.
320 /// Emit code to ensure constants are copied into registers when needed.
321 /// Remember the virtual registers that need to be added to the Machine PHI
322 /// nodes as input. We cannot just directly add them, because expansion
323 /// might result in multiple MBB's for one BB. As such, the start of the
324 /// BB might correspond to a different MBB than the end.
325 bool HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
327 /// materializeRegForValue - Helper for getRegForVale. This function is
328 /// called when the value isn't already available in a register and must
329 /// be materialized with new instructions.
330 unsigned materializeRegForValue(const Value *V, MVT VT);
332 /// hasTrivialKill - Test whether the given value has exactly one use.
333 bool hasTrivialKill(const Value *V) const;