1 //===-- llvm/CallingConvLower.h - Calling Conventions -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the CCState and CCValAssign classes, used for lowering
11 // and implementing calling conventions.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
16 #define LLVM_CODEGEN_CALLINGCONVLOWER_H
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/IR/CallingConv.h"
22 #include "llvm/Target/TargetCallingConv.h"
28 class TargetRegisterInfo;
30 /// CCValAssign - Represent assignment of one arg/retval to a location.
34 Full, // The value fills the full location.
35 SExt, // The value is sign extended in the location.
36 ZExt, // The value is zero extended in the location.
37 AExt, // The value is extended with undefined upper bits.
38 BCvt, // The value is bit-converted in the location.
39 VExt, // The value is vector-widened in the location.
40 // FIXME: Not implemented yet. Code that uses AExt to mean
41 // vector-widen should be fixed to use VExt instead.
42 FPExt, // The floating-point value is fp-extended in the location.
43 Indirect // The location contains pointer to the value.
44 // TODO: a subset of the value is in the location.
47 /// ValNo - This is the value number begin assigned (e.g. an argument number).
50 /// Loc is either a stack offset or a register number.
53 /// isMem - True if this is a memory loc, false if it is a register loc.
56 /// isCustom - True if this arg/retval requires special handling.
57 unsigned isCustom : 1;
59 /// Information about how the value is assigned.
62 /// ValVT - The type of the value being assigned.
65 /// LocVT - The type of the location being assigned to.
69 static CCValAssign getReg(unsigned ValNo, MVT ValVT,
70 unsigned RegNo, MVT LocVT,
83 static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
84 unsigned RegNo, MVT LocVT,
87 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
92 static CCValAssign getMem(unsigned ValNo, MVT ValVT,
93 unsigned Offset, MVT LocVT,
106 static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
107 unsigned Offset, MVT LocVT,
110 Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
115 unsigned getValNo() const { return ValNo; }
116 MVT getValVT() const { return ValVT; }
118 bool isRegLoc() const { return !isMem; }
119 bool isMemLoc() const { return isMem; }
121 bool needsCustom() const { return isCustom; }
123 unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
124 unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
125 MVT getLocVT() const { return LocVT; }
127 LocInfo getLocInfo() const { return HTP; }
128 bool isExtInLoc() const {
129 return (HTP == AExt || HTP == SExt || HTP == ZExt);
134 /// CCAssignFn - This function assigns a location for Val, updating State to
135 /// reflect the change. It returns 'true' if it failed to handle Val.
136 typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
137 MVT LocVT, CCValAssign::LocInfo LocInfo,
138 ISD::ArgFlagsTy ArgFlags, CCState &State);
140 /// CCCustomFn - This function assigns a location for Val, possibly updating
141 /// all args to reflect changes and indicates if it handled it. It must set
142 /// isCustom if it handles the arg and returns true.
143 typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
144 MVT &LocVT, CCValAssign::LocInfo &LocInfo,
145 ISD::ArgFlagsTy &ArgFlags, CCState &State);
147 /// ParmContext - This enum tracks whether calling convention lowering is in
148 /// the context of prologue or call generation. Not all backends make use of
149 /// this information.
150 typedef enum { Unknown, Prologue, Call } ParmContext;
152 /// CCState - This class holds information needed while lowering arguments and
153 /// return values. It captures which registers are already assigned and which
154 /// stack slots are used. It provides accessors to allocate these values.
157 CallingConv::ID CallingConv;
160 const TargetMachine &TM;
161 const TargetRegisterInfo &TRI;
162 SmallVectorImpl<CCValAssign> &Locs;
163 LLVMContext &Context;
165 unsigned StackOffset;
166 SmallVector<uint32_t, 16> UsedRegs;
168 // ByValInfo and SmallVector<ByValInfo, 4> ByValRegs:
170 // Vector of ByValInfo instances (ByValRegs) is introduced for byval registers
172 // Or, in another words it tracks byval parameters that are stored in
173 // general purpose registers.
175 // For 4 byte stack alignment,
176 // instance index means byval parameter number in formal
177 // arguments set. Assume, we have some "struct_type" with size = 4 bytes,
178 // then, for function "foo":
180 // i32 foo(i32 %p, %struct_type* %r, i32 %s, %struct_type* %t)
182 // ByValRegs[0] describes how "%r" is stored (Begin == r1, End == r2)
183 // ByValRegs[1] describes how "%t" is stored (Begin == r3, End == r4).
185 // In case of 8 bytes stack alignment,
186 // ByValRegs may also contain information about wasted registers.
187 // In function shown above, r3 would be wasted according to AAPCS rules.
188 // And in that case ByValRegs[1].Waste would be "true".
189 // ByValRegs vector size still would be 2,
190 // while "%t" goes to the stack: it wouldn't be described in ByValRegs.
192 // Supposed use-case for this collection:
193 // 1. Initially ByValRegs is empty, InRegsParamsProceed is 0.
194 // 2. HandleByVal fillups ByValRegs.
195 // 3. Argument analysis (LowerFormatArguments, for example). After
196 // some byval argument was analyzed, InRegsParamsProceed is increased.
198 ByValInfo(unsigned B, unsigned E, bool IsWaste = false) :
199 Begin(B), End(E), Waste(IsWaste) {}
200 // First register allocated for current parameter.
203 // First after last register allocated for current parameter.
206 // Means that current range of registers doesn't belong to any
207 // parameters. It was wasted due to stack alignment rules.
208 // For more information see:
209 // AAPCS, 5.5 Parameter Passing, Stage C, C.3.
212 SmallVector<ByValInfo, 4 > ByValRegs;
214 // InRegsParamsProceed - shows how many instances of ByValRegs was proceed
215 // during argument analysis.
216 unsigned InRegsParamsProceed;
219 ParmContext CallOrPrologue;
222 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
223 const TargetMachine &TM, SmallVectorImpl<CCValAssign> &locs,
226 void addLoc(const CCValAssign &V) {
230 LLVMContext &getContext() const { return Context; }
231 const TargetMachine &getTarget() const { return TM; }
232 MachineFunction &getMachineFunction() const { return MF; }
233 CallingConv::ID getCallingConv() const { return CallingConv; }
234 bool isVarArg() const { return IsVarArg; }
236 unsigned getNextStackOffset() const { return StackOffset; }
238 /// isAllocated - Return true if the specified register (or an alias) is
240 bool isAllocated(unsigned Reg) const {
241 return UsedRegs[Reg/32] & (1 << (Reg&31));
244 /// AnalyzeFormalArguments - Analyze an array of argument values,
245 /// incorporating info about the formals into this state.
246 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
249 /// AnalyzeReturn - Analyze the returned values of a return,
250 /// incorporating info about the result values into this state.
251 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
254 /// CheckReturn - Analyze the return values of a function, returning
255 /// true if the return can be performed without sret-demotion, and
257 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
260 /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
261 /// incorporating info about the passed values into this state.
262 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
265 /// AnalyzeCallOperands - Same as above except it takes vectors of types
266 /// and argument flags.
267 void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
268 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
271 /// AnalyzeCallResult - Analyze the return values of a call,
272 /// incorporating info about the passed values into this state.
273 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
276 /// AnalyzeCallResult - Same as above except it's specialized for calls which
277 /// produce a single value.
278 void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
280 /// getFirstUnallocated - Return the first unallocated register in the set, or
281 /// NumRegs if they are all allocated.
282 unsigned getFirstUnallocated(const MCPhysReg *Regs, unsigned NumRegs) const {
283 for (unsigned i = 0; i != NumRegs; ++i)
284 if (!isAllocated(Regs[i]))
289 /// AllocateReg - Attempt to allocate one register. If it is not available,
290 /// return zero. Otherwise, return the register, marking it and any aliases
292 unsigned AllocateReg(unsigned Reg) {
293 if (isAllocated(Reg)) return 0;
298 /// Version of AllocateReg with extra register to be shadowed.
299 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
300 if (isAllocated(Reg)) return 0;
302 MarkAllocated(ShadowReg);
306 /// AllocateReg - Attempt to allocate one of the specified registers. If none
307 /// are available, return zero. Otherwise, return the first one available,
308 /// marking it and any aliases as allocated.
309 unsigned AllocateReg(const MCPhysReg *Regs, unsigned NumRegs) {
310 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
311 if (FirstUnalloc == NumRegs)
312 return 0; // Didn't find the reg.
314 // Mark the register and any aliases as allocated.
315 unsigned Reg = Regs[FirstUnalloc];
320 /// Version of AllocateReg with list of registers to be shadowed.
321 unsigned AllocateReg(const MCPhysReg *Regs, const MCPhysReg *ShadowRegs,
323 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
324 if (FirstUnalloc == NumRegs)
325 return 0; // Didn't find the reg.
327 // Mark the register and any aliases as allocated.
328 unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
330 MarkAllocated(ShadowReg);
334 /// AllocateStack - Allocate a chunk of stack space with the specified size
336 unsigned AllocateStack(unsigned Size, unsigned Align) {
337 assert(Align && ((Align-1) & Align) == 0); // Align is power of 2.
338 StackOffset = ((StackOffset + Align-1) & ~(Align-1));
339 unsigned Result = StackOffset;
341 MF.getFrameInfo()->ensureMaxAlignment(Align);
345 /// Version of AllocateStack with extra register to be shadowed.
346 unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
347 MarkAllocated(ShadowReg);
348 return AllocateStack(Size, Align);
351 /// Version of AllocateStack with list of extra registers to be shadowed.
352 /// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
353 unsigned AllocateStack(unsigned Size, unsigned Align,
354 const MCPhysReg *ShadowRegs, unsigned NumShadowRegs) {
355 for (unsigned i = 0; i < NumShadowRegs; ++i)
356 MarkAllocated(ShadowRegs[i]);
357 return AllocateStack(Size, Align);
360 // HandleByVal - Allocate a stack slot large enough to pass an argument by
361 // value. The size and alignment information of the argument is encoded in its
362 // parameter attribute.
363 void HandleByVal(unsigned ValNo, MVT ValVT,
364 MVT LocVT, CCValAssign::LocInfo LocInfo,
365 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
367 // Returns count of byval arguments that are to be stored (even partly)
369 unsigned getInRegsParamsCount() const { return ByValRegs.size(); }
371 // Returns count of byval in-regs arguments proceed.
372 unsigned getInRegsParamsProceed() const { return InRegsParamsProceed; }
374 // Get information about N-th byval parameter that is stored in registers.
375 // Here "ByValParamIndex" is N.
376 void getInRegsParamInfo(unsigned InRegsParamRecordIndex,
377 unsigned& BeginReg, unsigned& EndReg) const {
378 assert(InRegsParamRecordIndex < ByValRegs.size() &&
379 "Wrong ByVal parameter index");
381 const ByValInfo& info = ByValRegs[InRegsParamRecordIndex];
382 BeginReg = info.Begin;
386 // Add information about parameter that is kept in registers.
387 void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) {
388 ByValRegs.push_back(ByValInfo(RegBegin, RegEnd));
391 // Goes either to next byval parameter (excluding "waste" record), or
392 // to the end of collection.
393 // Returns false, if end is reached.
394 bool nextInRegsParam() {
395 unsigned e = ByValRegs.size();
396 if (InRegsParamsProceed < e)
397 ++InRegsParamsProceed;
398 return InRegsParamsProceed < e;
401 // Clear byval registers tracking info.
402 void clearByValRegsInfo() {
403 InRegsParamsProceed = 0;
407 // Rewind byval registers tracking info.
408 void rewindByValRegsInfo() {
409 InRegsParamsProceed = 0;
412 ParmContext getCallOrPrologue() const { return CallOrPrologue; }
415 /// MarkAllocated - Mark a register and all of its aliases as allocated.
416 void MarkAllocated(unsigned Reg);
421 } // end namespace llvm