1 //===- llvm/Analysis/TargetTransformInfo.h ----------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass exposes codegen information to IR-level passes. Every
11 // transformation that uses codegen information is broken into three parts:
12 // 1. The IR-level analysis pass.
13 // 2. The IR-level transformation interface which provides the needed
15 // 3. Codegen-level implementation which uses target-specific hooks.
17 // This file defines #2, which is the interface that IR-level transformations
18 // use for querying the codegen.
20 //===----------------------------------------------------------------------===//
22 #ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
23 #define LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
25 #include "llvm/CodeGen/ValueTypes.h"
26 #include "llvm/IR/GlobalValue.h"
27 #include "llvm/IR/Intrinsics.h"
28 #include "llvm/IR/Type.h"
29 #include "llvm/Pass.h"
30 #include "llvm/Support/DataTypes.h"
34 /// TargetTransformInfo - This pass provides access to the codegen
35 /// interfaces that are needed for IR-level transformations.
36 class TargetTransformInfo {
38 /// \brief The TTI instance one level down the stack.
40 /// This is used to implement the default behavior all of the methods which
41 /// is to delegate up through the stack of TTIs until one can answer the
43 TargetTransformInfo *PrevTTI;
45 /// \brief The top of the stack of TTI analyses available.
47 /// This is a convenience routine maintained as TTI analyses become available
48 /// that complements the PrevTTI delegation chain. When one part of an
49 /// analysis pass wants to query another part of the analysis pass it can use
50 /// this to start back at the top of the stack.
51 TargetTransformInfo *TopTTI;
53 /// All pass subclasses must in their initializePass routine call
54 /// pushTTIStack with themselves to update the pointers tracking the previous
55 /// TTI instance in the analysis group's stack, and the top of the analysis
57 void pushTTIStack(Pass *P);
59 /// All pass subclasses must in their finalizePass routine call popTTIStack
60 /// to update the pointers tracking the previous TTI instance in the analysis
61 /// group's stack, and the top of the analysis group's stack.
64 /// All pass subclasses must call TargetTransformInfo::getAnalysisUsage.
65 virtual void getAnalysisUsage(AnalysisUsage &AU) const;
68 /// This class is intended to be subclassed by real implementations.
69 virtual ~TargetTransformInfo() = 0;
71 /// \name Scalar Target Information
74 /// \brief Flags indicating the kind of support for population count.
76 /// Compared to the SW implementation, HW support is supposed to
77 /// significantly boost the performance when the population is dense, and it
78 /// may or may not degrade performance if the population is sparse. A HW
79 /// support is considered as "Fast" if it can outperform, or is on a par
80 /// with, SW implementaion when the population is sparse; otherwise, it is
81 /// considered as "Slow".
82 enum PopcntSupportKind {
88 /// isLegalAddImmediate - Return true if the specified immediate is legal
89 /// add immediate, that is the target has add instructions which can add
90 /// a register with the immediate without having to materialize the
91 /// immediate into a register.
92 virtual bool isLegalAddImmediate(int64_t Imm) const;
94 /// isLegalICmpImmediate - Return true if the specified immediate is legal
95 /// icmp immediate, that is the target has icmp instructions which can compare
96 /// a register against the immediate without having to materialize the
97 /// immediate into a register.
98 virtual bool isLegalICmpImmediate(int64_t Imm) const;
100 /// isLegalAddressingMode - Return true if the addressing mode represented by
101 /// AM is legal for this target, for a load/store of the specified type.
102 /// The type may be VoidTy, in which case only return true if the addressing
103 /// mode is legal for a load/store of any legal type.
104 /// TODO: Handle pre/postinc as well.
105 virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
106 int64_t BaseOffset, bool HasBaseReg,
107 int64_t Scale) const;
109 /// isTruncateFree - Return true if it's free to truncate a value of
110 /// type Ty1 to type Ty2. e.g. On x86 it's free to truncate a i32 value in
111 /// register EAX to i16 by referencing its sub-register AX.
112 virtual bool isTruncateFree(Type *Ty1, Type *Ty2) const;
114 /// Is this type legal.
115 virtual bool isTypeLegal(Type *Ty) const;
117 /// getJumpBufAlignment - returns the target's jmp_buf alignment in bytes
118 virtual unsigned getJumpBufAlignment() const;
120 /// getJumpBufSize - returns the target's jmp_buf size in bytes.
121 virtual unsigned getJumpBufSize() const;
123 /// shouldBuildLookupTables - Return true if switches should be turned into
124 /// lookup tables for the target.
125 virtual bool shouldBuildLookupTables() const;
127 /// getPopcntSupport - Return hardware support for population count.
128 virtual PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const;
130 /// getIntImmCost - Return the expected cost of materializing the given
131 /// integer immediate of the specified type.
132 virtual unsigned getIntImmCost(const APInt &Imm, Type *Ty) const;
136 /// \name Vector Target Information
139 /// \brief The various kinds of shuffle patterns for vector queries.
141 SK_Broadcast, ///< Broadcast element 0 to all other elements.
142 SK_Reverse, ///< Reverse the order of the vector.
143 SK_InsertSubvector, ///< InsertSubvector. Index indicates start offset.
144 SK_ExtractSubvector ///< ExtractSubvector Index indicates start offset.
147 /// \return The number of scalar or vector registers that the target has.
148 /// If 'Vectors' is true, it returns the number of vector registers. If it is
149 /// set to false, it returns the number of scalar registers.
150 virtual unsigned getNumberOfRegisters(bool Vector) const;
152 /// \return The width of the largest scalar or vector register type.
153 virtual unsigned getRegisterBitWidth(bool Vector) const;
155 /// \return The maximum unroll factor that the vectorizer should try to
156 /// perform for this target. This number depends on the level of parallelism
157 /// and the number of execution units in the CPU.
158 virtual unsigned getMaximumUnrollFactor() const;
160 /// \return The expected cost of arithmetic ops, such as mul, xor, fsub, etc.
161 virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty) const;
163 /// \return The cost of a shuffle instruction of kind Kind and of type Tp.
164 /// The index and subtype parameters are used by the subvector insertion and
165 /// extraction shuffle kinds.
166 virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp, int Index = 0,
167 Type *SubTp = 0) const;
169 /// \return The expected cost of cast instructions, such as bitcast, trunc,
171 virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
174 /// \return The expected cost of control-flow related instrutctions such as
176 virtual unsigned getCFInstrCost(unsigned Opcode) const;
178 /// \returns The expected cost of compare and select instructions.
179 virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
180 Type *CondTy = 0) const;
182 /// \return The expected cost of vector Insert and Extract.
183 /// Use -1 to indicate that there is no information on the index value.
184 virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
185 unsigned Index = -1) const;
187 /// \return The cost of Load and Store instructions.
188 virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
190 unsigned AddressSpace) const;
192 /// \returns The cost of Intrinsic instructions.
193 virtual unsigned getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
194 ArrayRef<Type *> Tys) const;
196 /// \returns The number of pieces into which the provided type must be
197 /// split during legalization. Zero is returned when the answer is unknown.
198 virtual unsigned getNumberOfParts(Type *Tp) const;
202 /// Analysis group identification.
206 /// \brief Create the base case instance of a pass in the TTI analysis group.
208 /// This class provides the base case for the stack of TTI analyses. It doesn't
209 /// delegate to anything and uses the STTI and VTTI objects passed in to
210 /// satisfy the queries.
211 ImmutablePass *createNoTargetTransformInfoPass();
213 } // End llvm namespace