1 /* ==========================================================================
2 * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_driver.c $
7 * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
8 * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
9 * otherwise expressly agreed to in writing between Synopsys and you.
11 * The Software IS NOT an item of Licensed Software or Licensed Product under
12 * any End User Software License Agreement or Agreement for Licensed Product
13 * with Synopsys or any supplement thereto. You are permitted to use and
14 * redistribute this Software in source and binary forms, with or without
15 * modification, provided that redistributions of source code must retain this
16 * notice. You may not view, use, disclose, copy or distribute this file or
17 * any information contained herein except pursuant to this license grant from
18 * Synopsys. If you do not agree with this notice, including the disclaimer
19 * below, then you are not authorized to use the Software.
21 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
32 * ========================================================================== */
35 * The dwc_otg_driver module provides the initialization and cleanup entry
36 * points for the DWC_otg driver. This module will be dynamically installed
37 * after Linux is booted using the insmod command. When the module is
38 * installed, the dwc_otg_driver_init function is called. When the module is
39 * removed (using rmmod), the dwc_otg_driver_cleanup function is called.
41 * This module also defines a data structure for the dwc_otg_driver, which is
42 * used in conjunction with the standard ARM lm_device structure. These
43 * structures allow the OTG driver to comply with the standard Linux driver
44 * model in which devices and drivers are registered with a bus driver. This
45 * has the benefit that Linux can expose attributes of the driver and device
46 * in its special sysfs file system. Users can then read or write files in
47 * this file system to perform diagnostics on the driver components or the
51 #include "dwc_otg_os_dep.h"
52 #include "common_port/dwc_os.h"
53 #include "dwc_otg_dbg.h"
54 #include "dwc_otg_driver.h"
55 #include "dwc_otg_attr.h"
56 #include "dwc_otg_core_if.h"
57 #include "dwc_otg_pcd_if.h"
58 #include "dwc_otg_hcd_if.h"
59 #include "dwc_otg_cil.h"
60 #include "dwc_otg_pcd.h"
62 #include "usbdev_rk.h"
64 #define DWC_DRIVER_VERSION "3.10a 21-DEC-2012"
65 #define DWC_DRIVER_DESC "HS OTG USB Controller driver"
67 static const char dwc_host20_driver_name[] = "usb20_host";
68 static const char dwc_otg20_driver_name[] = "usb20_otg";
70 dwc_otg_device_t* g_otgdev = NULL;
72 extern int pcd_init( struct platform_device *_dev );
73 extern int otg20_hcd_init( struct platform_device *_dev );
74 extern int host20_hcd_init( struct platform_device *_dev );
75 extern int pcd_remove( struct platform_device *_dev );
76 extern void hcd_remove( struct platform_device *_dev);
77 extern void dwc_otg_adp_start( dwc_otg_core_if_t * core_if, uint8_t is_host);
79 extern struct dwc_otg_platform_data usb20otg_pdata;
80 extern struct dwc_otg_platform_data usb20host_pdata;
82 /*-------------------------------------------------------------------------*/
83 /* Encapsulate the module parameter settings */
85 struct dwc_otg_driver_module_params {
89 int32_t dma_desc_enable;
90 int32_t dma_burst_size;
92 int32_t host_support_fs_ls_low_power;
93 int32_t host_ls_low_power_phy_clk;
94 int32_t enable_dynamic_fifo;
95 int32_t data_fifo_size;
96 int32_t dev_rx_fifo_size;
97 int32_t dev_nperio_tx_fifo_size;
98 uint32_t dev_perio_tx_fifo_size[MAX_PERIO_FIFOS];
99 int32_t host_rx_fifo_size;
100 int32_t host_nperio_tx_fifo_size;
101 int32_t host_perio_tx_fifo_size;
102 int32_t max_transfer_size;
103 int32_t max_packet_count;
104 int32_t host_channels;
105 int32_t dev_endpoints;
107 int32_t phy_utmi_width;
108 int32_t phy_ulpi_ddr;
109 int32_t phy_ulpi_ext_vbus;
113 int32_t en_multiple_tx_fifo;
114 uint32_t dev_tx_fifo_size[MAX_TX_FIFOS];
116 uint32_t tx_thr_length;
117 uint32_t rx_thr_length;
122 int32_t baseline_besl;
125 int32_t ahb_thr_ratio;
135 static struct dwc_otg_driver_module_params dwc_otg_module_params = {
137 .otg_cap = DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE,
139 .dma_desc_enable = 0,
140 .dma_burst_size = -1,
142 .host_support_fs_ls_low_power = -1,
143 .host_ls_low_power_phy_clk = -1,
144 .enable_dynamic_fifo = 1,
145 .data_fifo_size = -1,
146 .dev_rx_fifo_size = 0x120,
147 .dev_nperio_tx_fifo_size = 0x10,
148 .dev_perio_tx_fifo_size = {
149 /* dev_perio_tx_fifo_size_1 */
167 .host_rx_fifo_size = -1,
168 .host_nperio_tx_fifo_size = -1,
169 .host_perio_tx_fifo_size = -1,
170 .max_transfer_size = -1,
171 .max_packet_count = -1,
175 .phy_utmi_width = -1,
177 .phy_ulpi_ext_vbus = -1,
181 .en_multiple_tx_fifo = -1,
182 .dev_tx_fifo_size = {
183 /* dev_tx_fifo_size */
222 static struct dwc_otg_driver_module_params dwc_host_module_params = {
224 .otg_cap = DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE,
226 .dma_desc_enable = 0,
227 .dma_burst_size = -1,
229 .host_support_fs_ls_low_power = -1,
230 .host_ls_low_power_phy_clk = -1,
231 .enable_dynamic_fifo = -1,
232 .data_fifo_size = -1,
233 .dev_rx_fifo_size = -1,
234 .dev_nperio_tx_fifo_size = -1,
235 .dev_perio_tx_fifo_size = {
236 /* dev_perio_tx_fifo_size_1 */
254 .host_rx_fifo_size = -1,
255 .host_nperio_tx_fifo_size = -1,
256 .host_perio_tx_fifo_size = -1,
257 .max_transfer_size = -1,
258 .max_packet_count = -1,
262 .phy_utmi_width = -1,
264 .phy_ulpi_ext_vbus = -1,
268 .en_multiple_tx_fifo = -1,
269 .dev_tx_fifo_size = {
270 /* dev_tx_fifo_size */
310 * This function shows the Driver Version.
312 static ssize_t version_show(struct device_driver *dev, char *buf)
314 return snprintf(buf, sizeof(DWC_DRIVER_VERSION) + 2, "%s\n",
318 static DRIVER_ATTR(version, S_IRUGO, version_show, NULL);
321 * Global Debug Level Mask.
323 uint32_t g_dbg_lvl = DBG_OFF; /* OFF */
326 * This function shows the driver Debug Level.
328 static ssize_t dbg_level_show(struct device_driver *drv, char *buf)
330 return sprintf(buf, "0x%0x\n", g_dbg_lvl);
334 * This function stores the driver Debug Level.
336 static ssize_t dbg_level_store(struct device_driver *drv, const char *buf,
339 g_dbg_lvl = simple_strtoul(buf, NULL, 16);
343 static DRIVER_ATTR(debuglevel, S_IRUGO | S_IWUSR, dbg_level_show,
347 static ssize_t dwc_otg_conn_en_show(struct device_driver *_drv, char *_buf)
350 dwc_otg_device_t *otg_dev = g_otgdev;
351 dwc_otg_pcd_t *_pcd = otg_dev->pcd;
352 return sprintf (_buf, "%d\n", _pcd->conn_en);
356 static ssize_t dwc_otg_conn_en_store(struct device_driver *_drv, const char *_buf,
359 int enable = simple_strtoul(_buf, NULL, 10);
360 dwc_otg_device_t *otg_dev = g_otgdev;
361 dwc_otg_pcd_t *_pcd = otg_dev->pcd;
362 DWC_PRINTF("%s %d->%d\n",__func__, _pcd->conn_en, enable);
364 _pcd->conn_en = enable;
367 static DRIVER_ATTR(dwc_otg_conn_en, S_IRUGO|S_IWUSR, dwc_otg_conn_en_show, dwc_otg_conn_en_store);
369 static ssize_t vbus_status_show(struct device_driver *_drv, char *_buf)
371 dwc_otg_device_t *otg_dev = g_otgdev;
372 dwc_otg_pcd_t *_pcd = otg_dev->pcd;
373 return sprintf (_buf, "%d\n", _pcd->vbus_status);
375 static DRIVER_ATTR(vbus_status, S_IRUGO, vbus_status_show, NULL);
378 * This function is called during module intialization
379 * to pass module parameters to the DWC_OTG CORE.
381 static int set_parameters(dwc_otg_core_if_t * core_if, struct dwc_otg_driver_module_params module_params)
386 if (module_params.otg_cap != -1) {
388 dwc_otg_set_param_otg_cap(core_if,
389 module_params.otg_cap);
391 if (module_params.dma_enable != -1) {
393 dwc_otg_set_param_dma_enable(core_if,
397 if (module_params.dma_desc_enable != -1) {
399 dwc_otg_set_param_dma_desc_enable(core_if,
403 if (module_params.opt != -1) {
405 dwc_otg_set_param_opt(core_if, module_params.opt);
407 if (module_params.dma_burst_size != -1) {
409 dwc_otg_set_param_dma_burst_size(core_if,
413 if (module_params.host_support_fs_ls_low_power != -1) {
415 dwc_otg_set_param_host_support_fs_ls_low_power(core_if,
417 host_support_fs_ls_low_power);
419 if (module_params.enable_dynamic_fifo != -1) {
421 dwc_otg_set_param_enable_dynamic_fifo(core_if,
423 enable_dynamic_fifo);
425 if (module_params.data_fifo_size != -1) {
427 dwc_otg_set_param_data_fifo_size(core_if,
431 if (module_params.dev_rx_fifo_size != -1) {
433 dwc_otg_set_param_dev_rx_fifo_size(core_if,
437 if (module_params.dev_nperio_tx_fifo_size != -1) {
439 dwc_otg_set_param_dev_nperio_tx_fifo_size(core_if,
441 dev_nperio_tx_fifo_size);
443 if (module_params.host_rx_fifo_size != -1) {
445 dwc_otg_set_param_host_rx_fifo_size(core_if,
446 module_params.host_rx_fifo_size);
448 if (module_params.host_nperio_tx_fifo_size != -1) {
450 dwc_otg_set_param_host_nperio_tx_fifo_size(core_if,
452 host_nperio_tx_fifo_size);
454 if (module_params.host_perio_tx_fifo_size != -1) {
456 dwc_otg_set_param_host_perio_tx_fifo_size(core_if,
458 host_perio_tx_fifo_size);
460 if (module_params.max_transfer_size != -1) {
462 dwc_otg_set_param_max_transfer_size(core_if,
466 if (module_params.max_packet_count != -1) {
468 dwc_otg_set_param_max_packet_count(core_if,
472 if (module_params.host_channels != -1) {
474 dwc_otg_set_param_host_channels(core_if,
478 if (module_params.dev_endpoints != -1) {
480 dwc_otg_set_param_dev_endpoints(core_if,
484 if (module_params.phy_type != -1) {
486 dwc_otg_set_param_phy_type(core_if,
487 module_params.phy_type);
489 if (module_params.speed != -1) {
491 dwc_otg_set_param_speed(core_if,
492 module_params.speed);
494 if (module_params.host_ls_low_power_phy_clk != -1) {
496 dwc_otg_set_param_host_ls_low_power_phy_clk(core_if,
498 host_ls_low_power_phy_clk);
500 if (module_params.phy_ulpi_ddr != -1) {
502 dwc_otg_set_param_phy_ulpi_ddr(core_if,
506 if (module_params.phy_ulpi_ext_vbus != -1) {
508 dwc_otg_set_param_phy_ulpi_ext_vbus(core_if,
512 if (module_params.phy_utmi_width != -1) {
514 dwc_otg_set_param_phy_utmi_width(core_if,
518 if (module_params.ulpi_fs_ls != -1) {
520 dwc_otg_set_param_ulpi_fs_ls(core_if,
521 module_params.ulpi_fs_ls);
523 if (module_params.ts_dline != -1) {
525 dwc_otg_set_param_ts_dline(core_if,
526 module_params.ts_dline);
528 if (module_params.i2c_enable != -1) {
530 dwc_otg_set_param_i2c_enable(core_if,
534 if (module_params.en_multiple_tx_fifo != -1) {
536 dwc_otg_set_param_en_multiple_tx_fifo(core_if,
538 en_multiple_tx_fifo);
540 for (i = 0; i < 15; i++) {
541 if (module_params.dev_perio_tx_fifo_size[i] != -1) {
543 dwc_otg_set_param_dev_perio_tx_fifo_size(core_if,
545 dev_perio_tx_fifo_size
550 for (i = 0; i < 15; i++) {
551 if (module_params.dev_tx_fifo_size[i] != -1) {
552 retval += dwc_otg_set_param_dev_tx_fifo_size(core_if,
558 if (module_params.thr_ctl != -1) {
560 dwc_otg_set_param_thr_ctl(core_if,
561 module_params.thr_ctl);
563 if (module_params.mpi_enable != -1) {
565 dwc_otg_set_param_mpi_enable(core_if,
569 if (module_params.pti_enable != -1) {
571 dwc_otg_set_param_pti_enable(core_if,
575 if (module_params.lpm_enable != -1) {
577 dwc_otg_set_param_lpm_enable(core_if,
581 if (module_params.besl_enable != -1) {
583 dwc_otg_set_param_besl_enable(core_if,
587 if (module_params.baseline_besl != -1) {
589 dwc_otg_set_param_baseline_besl(core_if,
593 if (module_params.deep_besl != -1) {
595 dwc_otg_set_param_deep_besl(core_if,
599 if (module_params.ic_usb_cap != -1) {
601 dwc_otg_set_param_ic_usb_cap(core_if,
605 if (module_params.tx_thr_length != -1) {
607 dwc_otg_set_param_tx_thr_length(core_if,
608 module_params.tx_thr_length);
610 if (module_params.rx_thr_length != -1) {
612 dwc_otg_set_param_rx_thr_length(core_if,
616 if (module_params.ahb_thr_ratio != -1) {
618 dwc_otg_set_param_ahb_thr_ratio(core_if,
619 module_params.ahb_thr_ratio);
621 if (module_params.power_down != -1) {
623 dwc_otg_set_param_power_down(core_if,
624 module_params.power_down);
626 if (module_params.reload_ctl != -1) {
628 dwc_otg_set_param_reload_ctl(core_if,
629 module_params.reload_ctl);
632 if (module_params.dev_out_nak != -1) {
634 dwc_otg_set_param_dev_out_nak(core_if,
635 module_params.dev_out_nak);
638 if (module_params.cont_on_bna != -1) {
640 dwc_otg_set_param_cont_on_bna(core_if,
641 module_params.cont_on_bna);
644 if (module_params.ahb_single != -1) {
646 dwc_otg_set_param_ahb_single(core_if,
647 module_params.ahb_single);
650 if (module_params.otg_ver != -1) {
652 dwc_otg_set_param_otg_ver(core_if,
653 module_params.otg_ver);
655 if (module_params.adp_enable != -1) {
657 dwc_otg_set_param_adp_enable(core_if,
665 * This function is the top level interrupt handler for the Common
666 * (Device and host modes) interrupts.
668 static irqreturn_t dwc_otg_common_irq(int irq, void *dev)
670 int32_t retval = IRQ_NONE;
672 retval = dwc_otg_handle_common_intr(dev);
674 //S3C2410X_CLEAR_EINTPEND();
676 return IRQ_RETVAL(retval);
680 * This function is called when a lm_device is unregistered with the
681 * dwc_otg_driver. This happens, for example, when the rmmod command is
682 * executed. The device may or may not be electrically present. If it is
683 * present, the driver stops device processing. Any resources used on behalf
684 * of this device are freed.
688 static int host20_driver_remove( struct platform_device *_dev )
691 dwc_otg_device_t *otg_dev = dwc_get_device_platform_data(_dev);
692 DWC_DEBUGPL(DBG_ANY, "%s(%p)\n", __func__, _dev);
695 /* Memory allocation for the dwc_otg_device failed. */
696 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev NULL!\n", __func__);
700 #ifndef DWC_DEVICE_ONLY
704 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->hcd NULL!\n", __func__);
709 #ifndef DWC_HOST_ONLY
713 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->pcd NULL!\n", __func__);
721 if (otg_dev->common_irq_installed) {
722 //free_irq(_dev->irq, otg_dev);
723 free_irq(platform_get_irq(_dev,0), otg_dev );
725 DWC_DEBUGPL(DBG_ANY, "%s: There is no installed irq!\n", __func__);
729 if (otg_dev->core_if) {
730 dwc_otg_cil_remove(otg_dev->core_if);
732 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->core_if NULL!\n", __func__);
737 * Remove the device attributes
739 dwc_otg_attr_remove(_dev);
744 if (otg_dev->os_dep.base) {
745 iounmap(otg_dev->os_dep.base);
750 * Clear the drvdata pointer.
753 dwc_set_device_platform_data(_dev, 0);
759 * This function is called when an lm_device is bound to a
760 * dwc_otg_driver. It creates the driver components required to
761 * control the device (CIL, HCD, and PCD) and it initializes the
762 * device. The driver components are stored in a dwc_otg_device
763 * structure. A reference to the dwc_otg_device is saved in the
764 * lm_device. This allows the driver to access the dwc_otg_device
765 * structure on subsequent calls to driver methods for this device.
767 * @param _dev Bus device
769 static int host20_driver_probe( struct platform_device *_dev)
773 struct resource *res_base;
774 dwc_otg_device_t *dwc_otg_device;
775 struct device *dev = &_dev->dev;
776 struct device_node *node = _dev->dev.of_node;
777 struct dwc_otg_platform_data *pldata;
779 dev->platform_data = &usb20host_pdata;
780 pldata = dev->platform_data;
784 dev_err(dev, "device node not found\n");
791 if(pldata->clock_init){
792 pldata->clock_init(pldata);
793 pldata->clock_enable(pldata, 1);
796 if(pldata->phy_suspend)
797 pldata->phy_suspend(pldata, USB_PHY_ENABLED);
799 if(pldata->soft_reset)
800 pldata->soft_reset();
802 res_base=platform_get_resource(_dev, IORESOURCE_MEM, 0);
804 dwc_otg_device = DWC_ALLOC(sizeof(dwc_otg_device_t));
806 if (!dwc_otg_device) {
807 dev_err(&_dev->dev, "kmalloc of dwc_otg_device failed\n");
811 memset(dwc_otg_device, 0, sizeof(*dwc_otg_device));
812 dwc_otg_device->os_dep.reg_offset = 0xFFFFFFFF;
815 * Map the DWC_otg Core memory into virtual address space.
818 dwc_otg_device->os_dep.base = devm_ioremap_resource(dev, res_base);
820 if (!dwc_otg_device->os_dep.base) {
821 dev_err(&_dev->dev, "ioremap() failed\n");
822 DWC_FREE(dwc_otg_device);
825 dev_dbg(&_dev->dev, "base=0x%08x\n",
826 (unsigned)dwc_otg_device->os_dep.base);
829 * Initialize driver data to point to the global DWC_otg
833 dwc_set_device_platform_data(_dev, dwc_otg_device);
834 pldata->privdata = dwc_otg_device;
835 dwc_otg_device->pldata = (void *)pldata;
837 dev_dbg(&_dev->dev, "dwc_otg_device=0x%p\n", dwc_otg_device);
839 dwc_otg_device->core_if = dwc_otg_cil_init(dwc_otg_device->os_dep.base);
842 if (!dwc_otg_device->core_if) {
843 dev_err(&_dev->dev, "CIL initialization failed!\n");
848 dwc_otg_device->core_if->otg_dev= dwc_otg_device;
851 * Attempt to ensure this device is really a DWC_otg Controller.
852 * Read and verify the SNPSID register contents. The value should be
853 * 0x45F42XXX or 0x45F42XXX, which corresponds to either "OT2" or "OTG3",
854 * as in "OTG version 2.XX" or "OTG version 3.XX".
857 if (((dwc_otg_get_gsnpsid(dwc_otg_device->core_if) & 0xFFFFF000) != 0x4F542000) &&
858 ((dwc_otg_get_gsnpsid(dwc_otg_device->core_if) & 0xFFFFF000) != 0x4F543000)) {
859 dev_err(&_dev->dev, "Bad value for SNPSID: 0x%08x\n",
860 dwc_otg_get_gsnpsid(dwc_otg_device->core_if));
866 * Validate parameter values.
868 if (set_parameters(dwc_otg_device->core_if ,dwc_host_module_params )) {
874 * Create Device Attributes in sysfs
876 dwc_otg_attr_create(_dev);
879 * Disable the global interrupt until all the interrupt
880 * handlers are installed.
882 dwc_otg_disable_global_interrupts(dwc_otg_device->core_if);
885 * Install the interrupt handler for the common interrupts before
886 * enabling common interrupts in core_init below.
888 irq = platform_get_irq(_dev,0);
889 DWC_DEBUGPL(DBG_CIL, "registering (common) handler for irq%d\n",
891 retval = request_irq(irq, dwc_otg_common_irq,
892 IRQF_SHARED , "dwc_otg",
895 DWC_ERROR("request of irq%d failed\n", irq);
899 dwc_otg_device->common_irq_installed = 1;
903 * Initialize the DWC_otg core.
905 dwc_otg_core_init(dwc_otg_device->core_if);
910 retval = host20_hcd_init(_dev);
912 DWC_ERROR("hcd_init failed\n");
913 dwc_otg_device->hcd = NULL;
918 * Enable the global interrupt after all the interrupt
919 * handlers are installed if there is no ADP support else
920 * perform initial actions required for Internal ADP logic.
922 if (!dwc_otg_get_param_adp_enable(dwc_otg_device->core_if))
923 dwc_otg_enable_global_interrupts(dwc_otg_device->core_if);
925 dwc_otg_adp_start(dwc_otg_device->core_if,
926 dwc_otg_is_host_mode(dwc_otg_device->core_if));
931 host20_driver_remove(_dev);
935 static int dwc_otg_driver_suspend(struct platform_device *_dev , pm_message_t state )
940 static int dwc_otg_driver_resume(struct platform_device *_dev )
945 static void dwc_otg_driver_shutdown(struct platform_device *_dev )
947 struct device *dev = &_dev->dev;
948 dwc_otg_device_t *otg_dev = dev->platform_data;
949 dwc_otg_core_if_t *core_if = otg_dev->core_if;
950 dctl_data_t dctl = {.d32=0};
952 DWC_PRINTF("%s: disconnect USB %s mode\n" , __func__ ,
953 dwc_otg_is_host_mode(core_if) ? "host" : "device");
954 if(dwc_otg_is_host_mode(core_if))
956 if (core_if->hcd_cb && core_if->hcd_cb->stop)
958 core_if->hcd_cb->stop( core_if->hcd_cb_p);
963 /* soft disconnect */
964 dctl.d32 = DWC_READ_REG32( &core_if->dev_if->dev_global_regs->dctl );
965 dctl.b.sftdiscon = 1;
966 DWC_WRITE_REG32( &core_if->dev_if->dev_global_regs->dctl, dctl.d32 );
968 /* Clear any pending interrupts */
969 DWC_WRITE_REG32( &core_if->core_global_regs->gintsts, 0xFFFFFFFF);
975 * This structure defines the methods to be called by a bus driver
976 * during the lifecycle of a device on that bus. Both drivers and
977 * devices are registered with a bus driver. The bus driver matches
978 * devices to drivers based on information in the device and driver
981 * The probe function is called when the bus driver matches a device
982 * to this driver. The remove function is called when a device is
983 * unregistered with the bus driver.
985 static const struct of_device_id usb20_host_of_match[] = {
986 { .compatible = "rockchip,usb20_host", },
989 MODULE_DEVICE_TABLE(of, usb20_host_of_match);
991 static struct platform_driver dwc_host_driver = {
993 .name = (char *)dwc_host20_driver_name,
994 .of_match_table = of_match_ptr(usb20_host_of_match),
996 .probe = host20_driver_probe,
997 .remove = host20_driver_remove,
998 .suspend = dwc_otg_driver_suspend,
999 .resume = dwc_otg_driver_resume,
1004 * This function is called when a lm_device is unregistered with the
1005 * dwc_otg_driver. This happens, for example, when the rmmod command is
1006 * executed. The device may or may not be electrically present. If it is
1007 * present, the driver stops device processing. Any resources used on behalf
1008 * of this device are freed.
1012 static int otg20_driver_remove( struct platform_device *_dev )
1015 dwc_otg_device_t *otg_dev = dwc_get_device_platform_data(_dev);
1016 DWC_DEBUGPL(DBG_ANY, "%s(%p)\n", __func__, _dev);
1019 /* Memory allocation for the dwc_otg_device failed. */
1020 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev NULL!\n", __func__);
1023 #ifndef DWC_DEVICE_ONLY
1027 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->hcd NULL!\n", __func__);
1032 #ifndef DWC_HOST_ONLY
1036 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->pcd NULL!\n", __func__);
1043 if (otg_dev->common_irq_installed) {
1044 //free_irq(_dev->irq, otg_dev);
1045 free_irq(platform_get_irq(_dev,0), otg_dev );
1047 DWC_DEBUGPL(DBG_ANY, "%s: There is no installed irq!\n", __func__);
1051 if (otg_dev->core_if) {
1052 dwc_otg_cil_remove(otg_dev->core_if);
1054 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->core_if NULL!\n", __func__);
1059 * Remove the device attributes
1061 dwc_otg_attr_remove(_dev);
1064 * Return the memory.
1066 if (otg_dev->os_dep.base) {
1067 iounmap(otg_dev->os_dep.base);
1072 * Clear the drvdata pointer.
1075 dwc_set_device_platform_data(_dev, 0);
1082 * This function is called when an lm_device is bound to a
1083 * dwc_otg_driver. It creates the driver components required to
1084 * control the device (CIL, HCD, and PCD) and it initializes the
1085 * device. The driver components are stored in a dwc_otg_device
1086 * structure. A reference to the dwc_otg_device is saved in the
1087 * lm_device. This allows the driver to access the dwc_otg_device
1088 * structure on subsequent calls to driver methods for this device.
1090 * @param _dev Bus device
1092 static int otg20_driver_probe( struct platform_device *_dev)
1096 struct resource *res_base;
1097 dwc_otg_device_t *dwc_otg_device;
1098 struct device *dev = &_dev->dev;
1099 struct device_node *node = _dev->dev.of_node;
1100 struct dwc_otg_platform_data *pldata;
1103 dev->platform_data = &usb20otg_pdata;
1104 pldata = dev->platform_data;
1108 dev_err(dev, "device node not found\n");
1112 /*todo : move to usbdev_rk-XX.c*/
1116 if(pldata->clock_init){
1117 pldata->clock_init(pldata);
1118 pldata->clock_enable(pldata, 1);
1121 if(pldata->phy_suspend)
1122 pldata->phy_suspend(pldata, USB_PHY_ENABLED);
1123 if(pldata->dwc_otg_uart_mode)
1124 pldata->dwc_otg_uart_mode(pldata, PHY_USB_MODE);
1125 if(pldata->soft_reset)
1126 pldata->soft_reset();
1129 res_base=platform_get_resource(_dev, IORESOURCE_MEM, 0);
1131 dwc_otg_device = DWC_ALLOC(sizeof(dwc_otg_device_t));
1133 if (!dwc_otg_device) {
1134 dev_err(&_dev->dev, "kmalloc of dwc_otg_device failed\n");
1138 memset(dwc_otg_device, 0, sizeof(*dwc_otg_device));
1139 dwc_otg_device->os_dep.reg_offset = 0xFFFFFFFF;
1142 * Map the DWC_otg Core memory into virtual address space.
1145 dwc_otg_device->os_dep.base = devm_ioremap_resource(dev, res_base);
1147 if (!dwc_otg_device->os_dep.base) {
1148 dev_err(&_dev->dev, "ioremap() failed\n");
1149 DWC_FREE(dwc_otg_device);
1152 dev_dbg(&_dev->dev, "base=0x%08x\n",
1153 (unsigned)dwc_otg_device->os_dep.base);
1156 * Initialize driver data to point to the global DWC_otg
1160 g_otgdev = dwc_otg_device;
1161 pldata->privdata = dwc_otg_device;
1162 dwc_otg_device->pldata = pldata;
1164 dwc_set_device_platform_data(_dev, dwc_otg_device);
1166 dev_dbg(&_dev->dev, "dwc_otg_device=0x%p\n", dwc_otg_device);
1168 dwc_otg_device->core_if = dwc_otg_cil_init(dwc_otg_device->os_dep.base);
1169 if (!dwc_otg_device->core_if) {
1170 dev_err(&_dev->dev, "CIL initialization failed!\n");
1175 dwc_otg_device->core_if->otg_dev = dwc_otg_device;
1177 * Attempt to ensure this device is really a DWC_otg Controller.
1178 * Read and verify the SNPSID register contents. The value should be
1179 * 0x45F42XXX or 0x45F42XXX, which corresponds to either "OT2" or "OTG3",
1180 * as in "OTG version 2.XX" or "OTG version 3.XX".
1183 if (((dwc_otg_get_gsnpsid(dwc_otg_device->core_if) & 0xFFFFF000) != 0x4F542000) &&
1184 ((dwc_otg_get_gsnpsid(dwc_otg_device->core_if) & 0xFFFFF000) != 0x4F543000)) {
1185 dev_err(&_dev->dev, "Bad value for SNPSID: 0x%08x\n",
1186 dwc_otg_get_gsnpsid(dwc_otg_device->core_if));
1192 * Validate parameter values.
1194 if (set_parameters(dwc_otg_device->core_if ,dwc_otg_module_params)) {
1200 * Create Device Attributes in sysfs
1202 dwc_otg_attr_create(_dev);
1205 * Disable the global interrupt until all the interrupt
1206 * handlers are installed.
1208 dwc_otg_disable_global_interrupts(dwc_otg_device->core_if);
1211 * Install the interrupt handler for the common interrupts before
1212 * enabling common interrupts in core_init below.
1214 irq = platform_get_irq(_dev,0);
1215 DWC_DEBUGPL(DBG_CIL, "registering (common) handler for irq%d\n",
1217 retval = request_irq(irq, dwc_otg_common_irq,
1218 IRQF_SHARED , "dwc_otg",
1221 DWC_ERROR("request of irq%d failed\n", irq);
1225 dwc_otg_device->common_irq_installed = 1;
1229 * Initialize the DWC_otg core.
1231 dwc_otg_core_init(dwc_otg_device->core_if);
1233 #ifndef DWC_HOST_ONLY
1235 * Initialize the PCD
1237 retval = pcd_init(_dev);
1239 DWC_ERROR("pcd_init failed\n");
1240 dwc_otg_device->pcd = NULL;
1244 #ifndef DWC_DEVICE_ONLY
1246 * Initialize the HCD
1248 retval = otg20_hcd_init(_dev);
1250 DWC_ERROR("hcd_init failed\n");
1251 dwc_otg_device->hcd = NULL;
1256 * Enable the global interrupt after all the interrupt
1257 * handlers are installed if there is no ADP support else
1258 * perform initial actions required for Internal ADP logic.
1260 if (!dwc_otg_get_param_adp_enable(dwc_otg_device->core_if))
1261 dwc_otg_enable_global_interrupts(dwc_otg_device->core_if);
1263 dwc_otg_adp_start(dwc_otg_device->core_if,
1264 dwc_otg_is_host_mode(dwc_otg_device->core_if));
1269 otg20_driver_remove(_dev);
1273 static const struct of_device_id usb20_otg_of_match[] = {
1274 { .compatible = "rockchip,usb20_otg", },
1277 MODULE_DEVICE_TABLE(of, usb20_otg_of_match);
1278 static struct platform_driver dwc_otg_driver = {
1280 .name = (char *)dwc_otg20_driver_name,
1281 .of_match_table = of_match_ptr(usb20_otg_of_match),
1283 .probe = otg20_driver_probe,
1284 .remove = otg20_driver_remove,
1285 .suspend = dwc_otg_driver_suspend,
1286 .resume = dwc_otg_driver_resume,
1287 .shutdown = dwc_otg_driver_shutdown,
1292 * This function is called when the dwc_otg_driver is installed with the
1293 * insmod command. It registers the dwc_otg_driver structure with the
1294 * appropriate bus driver. This will cause the dwc_otg_driver_probe function
1295 * to be called. In addition, the bus driver will automatically expose
1296 * attributes defined for the device and driver in the special sysfs file
1301 static int __init dwc_otg_driver_init(void)
1306 printk(KERN_INFO "%s: version %s\n", dwc_host20_driver_name,
1307 DWC_DRIVER_VERSION);
1309 retval = platform_driver_register(&dwc_host_driver);
1311 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1315 error = driver_create_file(&dwc_host_driver.driver, &driver_attr_version);
1316 error = driver_create_file(&dwc_host_driver.driver, &driver_attr_debuglevel);
1319 printk(KERN_INFO "%s: version %s\n", dwc_otg20_driver_name,
1320 DWC_DRIVER_VERSION);
1322 retval = platform_driver_register(&dwc_otg_driver);
1324 printk(KERN_ERR "%s retval=%d\n", __func__, retval);
1328 error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_version);
1329 error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_debuglevel);
1330 error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_dwc_otg_conn_en);
1331 error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_vbus_status);
1336 module_init(dwc_otg_driver_init);
1339 * This function is called when the driver is removed from the kernel
1340 * with the rmmod command. The driver unregisters itself with its bus
1344 static void __exit dwc_otg_driver_cleanup(void)
1346 printk(KERN_DEBUG "dwc_otg_driver_cleanup()\n");
1349 driver_remove_file(&dwc_host_driver.driver, &driver_attr_debuglevel);
1350 driver_remove_file(&dwc_host_driver.driver, &driver_attr_version);
1351 platform_driver_unregister(&dwc_host_driver);
1352 printk(KERN_INFO "%s module removed\n", dwc_host20_driver_name);
1355 driver_remove_file(&dwc_otg_driver.driver, &driver_attr_dwc_otg_conn_en);
1356 driver_remove_file(&dwc_otg_driver.driver, &driver_attr_debuglevel);
1357 driver_remove_file(&dwc_otg_driver.driver, &driver_attr_version);
1358 driver_remove_file(&dwc_otg_driver.driver, &driver_attr_vbus_status);
1359 platform_driver_unregister(&dwc_otg_driver);
1360 printk(KERN_INFO "%s module removed\n", dwc_otg20_driver_name);
1363 module_exit(dwc_otg_driver_cleanup);
1365 MODULE_DESCRIPTION(DWC_DRIVER_DESC);
1366 MODULE_AUTHOR("Synopsys Inc.");
1367 MODULE_LICENSE("GPL");
1369 module_param_named(otg_cap, dwc_otg_module_params.otg_cap, int, 0444);
1370 MODULE_PARM_DESC(otg_cap, "OTG Capabilities 0=HNP&SRP 1=SRP Only 2=None");
1371 module_param_named(opt, dwc_otg_module_params.opt, int, 0444);
1372 MODULE_PARM_DESC(opt, "OPT Mode");
1373 module_param_named(dma_enable, dwc_otg_module_params.dma_enable, int, 0444);
1374 MODULE_PARM_DESC(dma_enable, "DMA Mode 0=Slave 1=DMA enabled");
1376 module_param_named(dma_desc_enable, dwc_otg_module_params.dma_desc_enable, int,
1378 MODULE_PARM_DESC(dma_desc_enable,
1379 "DMA Desc Mode 0=Address DMA 1=DMA Descriptor enabled");
1381 module_param_named(dma_burst_size, dwc_otg_module_params.dma_burst_size, int,
1383 MODULE_PARM_DESC(dma_burst_size,
1384 "DMA Burst Size 1, 4, 8, 16, 32, 64, 128, 256");
1385 module_param_named(speed, dwc_otg_module_params.speed, int, 0444);
1386 MODULE_PARM_DESC(speed, "Speed 0=High Speed 1=Full Speed");
1387 module_param_named(host_support_fs_ls_low_power,
1388 dwc_otg_module_params.host_support_fs_ls_low_power, int,
1390 MODULE_PARM_DESC(host_support_fs_ls_low_power,
1391 "Support Low Power w/FS or LS 0=Support 1=Don't Support");
1392 module_param_named(host_ls_low_power_phy_clk,
1393 dwc_otg_module_params.host_ls_low_power_phy_clk, int, 0444);
1394 MODULE_PARM_DESC(host_ls_low_power_phy_clk,
1395 "Low Speed Low Power Clock 0=48Mhz 1=6Mhz");
1396 module_param_named(enable_dynamic_fifo,
1397 dwc_otg_module_params.enable_dynamic_fifo, int, 0444);
1398 MODULE_PARM_DESC(enable_dynamic_fifo, "0=cC Setting 1=Allow Dynamic Sizing");
1399 module_param_named(data_fifo_size, dwc_otg_module_params.data_fifo_size, int,
1401 MODULE_PARM_DESC(data_fifo_size,
1402 "Total number of words in the data FIFO memory 32-32768");
1403 module_param_named(dev_rx_fifo_size, dwc_otg_module_params.dev_rx_fifo_size,
1405 MODULE_PARM_DESC(dev_rx_fifo_size, "Number of words in the Rx FIFO 16-32768");
1406 module_param_named(dev_nperio_tx_fifo_size,
1407 dwc_otg_module_params.dev_nperio_tx_fifo_size, int, 0444);
1408 MODULE_PARM_DESC(dev_nperio_tx_fifo_size,
1409 "Number of words in the non-periodic Tx FIFO 16-32768");
1410 module_param_named(dev_perio_tx_fifo_size_1,
1411 dwc_otg_module_params.dev_perio_tx_fifo_size[0], int, 0444);
1412 MODULE_PARM_DESC(dev_perio_tx_fifo_size_1,
1413 "Number of words in the periodic Tx FIFO 4-768");
1414 module_param_named(dev_perio_tx_fifo_size_2,
1415 dwc_otg_module_params.dev_perio_tx_fifo_size[1], int, 0444);
1416 MODULE_PARM_DESC(dev_perio_tx_fifo_size_2,
1417 "Number of words in the periodic Tx FIFO 4-768");
1418 module_param_named(dev_perio_tx_fifo_size_3,
1419 dwc_otg_module_params.dev_perio_tx_fifo_size[2], int, 0444);
1420 MODULE_PARM_DESC(dev_perio_tx_fifo_size_3,
1421 "Number of words in the periodic Tx FIFO 4-768");
1422 module_param_named(dev_perio_tx_fifo_size_4,
1423 dwc_otg_module_params.dev_perio_tx_fifo_size[3], int, 0444);
1424 MODULE_PARM_DESC(dev_perio_tx_fifo_size_4,
1425 "Number of words in the periodic Tx FIFO 4-768");
1426 module_param_named(dev_perio_tx_fifo_size_5,
1427 dwc_otg_module_params.dev_perio_tx_fifo_size[4], int, 0444);
1428 MODULE_PARM_DESC(dev_perio_tx_fifo_size_5,
1429 "Number of words in the periodic Tx FIFO 4-768");
1430 module_param_named(dev_perio_tx_fifo_size_6,
1431 dwc_otg_module_params.dev_perio_tx_fifo_size[5], int, 0444);
1432 MODULE_PARM_DESC(dev_perio_tx_fifo_size_6,
1433 "Number of words in the periodic Tx FIFO 4-768");
1434 module_param_named(dev_perio_tx_fifo_size_7,
1435 dwc_otg_module_params.dev_perio_tx_fifo_size[6], int, 0444);
1436 MODULE_PARM_DESC(dev_perio_tx_fifo_size_7,
1437 "Number of words in the periodic Tx FIFO 4-768");
1438 module_param_named(dev_perio_tx_fifo_size_8,
1439 dwc_otg_module_params.dev_perio_tx_fifo_size[7], int, 0444);
1440 MODULE_PARM_DESC(dev_perio_tx_fifo_size_8,
1441 "Number of words in the periodic Tx FIFO 4-768");
1442 module_param_named(dev_perio_tx_fifo_size_9,
1443 dwc_otg_module_params.dev_perio_tx_fifo_size[8], int, 0444);
1444 MODULE_PARM_DESC(dev_perio_tx_fifo_size_9,
1445 "Number of words in the periodic Tx FIFO 4-768");
1446 module_param_named(dev_perio_tx_fifo_size_10,
1447 dwc_otg_module_params.dev_perio_tx_fifo_size[9], int, 0444);
1448 MODULE_PARM_DESC(dev_perio_tx_fifo_size_10,
1449 "Number of words in the periodic Tx FIFO 4-768");
1450 module_param_named(dev_perio_tx_fifo_size_11,
1451 dwc_otg_module_params.dev_perio_tx_fifo_size[10], int, 0444);
1452 MODULE_PARM_DESC(dev_perio_tx_fifo_size_11,
1453 "Number of words in the periodic Tx FIFO 4-768");
1454 module_param_named(dev_perio_tx_fifo_size_12,
1455 dwc_otg_module_params.dev_perio_tx_fifo_size[11], int, 0444);
1456 MODULE_PARM_DESC(dev_perio_tx_fifo_size_12,
1457 "Number of words in the periodic Tx FIFO 4-768");
1458 module_param_named(dev_perio_tx_fifo_size_13,
1459 dwc_otg_module_params.dev_perio_tx_fifo_size[12], int, 0444);
1460 MODULE_PARM_DESC(dev_perio_tx_fifo_size_13,
1461 "Number of words in the periodic Tx FIFO 4-768");
1462 module_param_named(dev_perio_tx_fifo_size_14,
1463 dwc_otg_module_params.dev_perio_tx_fifo_size[13], int, 0444);
1464 MODULE_PARM_DESC(dev_perio_tx_fifo_size_14,
1465 "Number of words in the periodic Tx FIFO 4-768");
1466 module_param_named(dev_perio_tx_fifo_size_15,
1467 dwc_otg_module_params.dev_perio_tx_fifo_size[14], int, 0444);
1468 MODULE_PARM_DESC(dev_perio_tx_fifo_size_15,
1469 "Number of words in the periodic Tx FIFO 4-768");
1470 module_param_named(host_rx_fifo_size, dwc_otg_module_params.host_rx_fifo_size,
1472 MODULE_PARM_DESC(host_rx_fifo_size, "Number of words in the Rx FIFO 16-32768");
1473 module_param_named(host_nperio_tx_fifo_size,
1474 dwc_otg_module_params.host_nperio_tx_fifo_size, int, 0444);
1475 MODULE_PARM_DESC(host_nperio_tx_fifo_size,
1476 "Number of words in the non-periodic Tx FIFO 16-32768");
1477 module_param_named(host_perio_tx_fifo_size,
1478 dwc_otg_module_params.host_perio_tx_fifo_size, int, 0444);
1479 MODULE_PARM_DESC(host_perio_tx_fifo_size,
1480 "Number of words in the host periodic Tx FIFO 16-32768");
1481 module_param_named(max_transfer_size, dwc_otg_module_params.max_transfer_size,
1483 /** @todo Set the max to 512K, modify checks */
1484 MODULE_PARM_DESC(max_transfer_size,
1485 "The maximum transfer size supported in bytes 2047-65535");
1486 module_param_named(max_packet_count, dwc_otg_module_params.max_packet_count,
1488 MODULE_PARM_DESC(max_packet_count,
1489 "The maximum number of packets in a transfer 15-511");
1490 module_param_named(host_channels, dwc_otg_module_params.host_channels, int,
1492 MODULE_PARM_DESC(host_channels,
1493 "The number of host channel registers to use 1-16");
1494 module_param_named(dev_endpoints, dwc_otg_module_params.dev_endpoints, int,
1496 MODULE_PARM_DESC(dev_endpoints,
1497 "The number of endpoints in addition to EP0 available for device mode 1-15");
1498 module_param_named(phy_type, dwc_otg_module_params.phy_type, int, 0444);
1499 MODULE_PARM_DESC(phy_type, "0=Reserved 1=UTMI+ 2=ULPI");
1500 module_param_named(phy_utmi_width, dwc_otg_module_params.phy_utmi_width, int,
1502 MODULE_PARM_DESC(phy_utmi_width, "Specifies the UTMI+ Data Width 8 or 16 bits");
1503 module_param_named(phy_ulpi_ddr, dwc_otg_module_params.phy_ulpi_ddr, int, 0444);
1504 MODULE_PARM_DESC(phy_ulpi_ddr,
1505 "ULPI at double or single data rate 0=Single 1=Double");
1506 module_param_named(phy_ulpi_ext_vbus, dwc_otg_module_params.phy_ulpi_ext_vbus,
1508 MODULE_PARM_DESC(phy_ulpi_ext_vbus,
1509 "ULPI PHY using internal or external vbus 0=Internal");
1510 module_param_named(i2c_enable, dwc_otg_module_params.i2c_enable, int, 0444);
1511 MODULE_PARM_DESC(i2c_enable, "FS PHY Interface");
1512 module_param_named(ulpi_fs_ls, dwc_otg_module_params.ulpi_fs_ls, int, 0444);
1513 MODULE_PARM_DESC(ulpi_fs_ls, "ULPI PHY FS/LS mode only");
1514 module_param_named(ts_dline, dwc_otg_module_params.ts_dline, int, 0444);
1515 MODULE_PARM_DESC(ts_dline, "Term select Dline pulsing for all PHYs");
1516 module_param_named(debug, g_dbg_lvl, int, 0444);
1517 MODULE_PARM_DESC(debug, "");
1519 module_param_named(en_multiple_tx_fifo,
1520 dwc_otg_module_params.en_multiple_tx_fifo, int, 0444);
1521 MODULE_PARM_DESC(en_multiple_tx_fifo,
1522 "Dedicated Non Periodic Tx FIFOs 0=disabled 1=enabled");
1523 module_param_named(dev_tx_fifo_size_1,
1524 dwc_otg_module_params.dev_tx_fifo_size[0], int, 0444);
1525 MODULE_PARM_DESC(dev_tx_fifo_size_1, "Number of words in the Tx FIFO 4-768");
1526 module_param_named(dev_tx_fifo_size_2,
1527 dwc_otg_module_params.dev_tx_fifo_size[1], int, 0444);
1528 MODULE_PARM_DESC(dev_tx_fifo_size_2, "Number of words in the Tx FIFO 4-768");
1529 module_param_named(dev_tx_fifo_size_3,
1530 dwc_otg_module_params.dev_tx_fifo_size[2], int, 0444);
1531 MODULE_PARM_DESC(dev_tx_fifo_size_3, "Number of words in the Tx FIFO 4-768");
1532 module_param_named(dev_tx_fifo_size_4,
1533 dwc_otg_module_params.dev_tx_fifo_size[3], int, 0444);
1534 MODULE_PARM_DESC(dev_tx_fifo_size_4, "Number of words in the Tx FIFO 4-768");
1535 module_param_named(dev_tx_fifo_size_5,
1536 dwc_otg_module_params.dev_tx_fifo_size[4], int, 0444);
1537 MODULE_PARM_DESC(dev_tx_fifo_size_5, "Number of words in the Tx FIFO 4-768");
1538 module_param_named(dev_tx_fifo_size_6,
1539 dwc_otg_module_params.dev_tx_fifo_size[5], int, 0444);
1540 MODULE_PARM_DESC(dev_tx_fifo_size_6, "Number of words in the Tx FIFO 4-768");
1541 module_param_named(dev_tx_fifo_size_7,
1542 dwc_otg_module_params.dev_tx_fifo_size[6], int, 0444);
1543 MODULE_PARM_DESC(dev_tx_fifo_size_7, "Number of words in the Tx FIFO 4-768");
1544 module_param_named(dev_tx_fifo_size_8,
1545 dwc_otg_module_params.dev_tx_fifo_size[7], int, 0444);
1546 MODULE_PARM_DESC(dev_tx_fifo_size_8, "Number of words in the Tx FIFO 4-768");
1547 module_param_named(dev_tx_fifo_size_9,
1548 dwc_otg_module_params.dev_tx_fifo_size[8], int, 0444);
1549 MODULE_PARM_DESC(dev_tx_fifo_size_9, "Number of words in the Tx FIFO 4-768");
1550 module_param_named(dev_tx_fifo_size_10,
1551 dwc_otg_module_params.dev_tx_fifo_size[9], int, 0444);
1552 MODULE_PARM_DESC(dev_tx_fifo_size_10, "Number of words in the Tx FIFO 4-768");
1553 module_param_named(dev_tx_fifo_size_11,
1554 dwc_otg_module_params.dev_tx_fifo_size[10], int, 0444);
1555 MODULE_PARM_DESC(dev_tx_fifo_size_11, "Number of words in the Tx FIFO 4-768");
1556 module_param_named(dev_tx_fifo_size_12,
1557 dwc_otg_module_params.dev_tx_fifo_size[11], int, 0444);
1558 MODULE_PARM_DESC(dev_tx_fifo_size_12, "Number of words in the Tx FIFO 4-768");
1559 module_param_named(dev_tx_fifo_size_13,
1560 dwc_otg_module_params.dev_tx_fifo_size[12], int, 0444);
1561 MODULE_PARM_DESC(dev_tx_fifo_size_13, "Number of words in the Tx FIFO 4-768");
1562 module_param_named(dev_tx_fifo_size_14,
1563 dwc_otg_module_params.dev_tx_fifo_size[13], int, 0444);
1564 MODULE_PARM_DESC(dev_tx_fifo_size_14, "Number of words in the Tx FIFO 4-768");
1565 module_param_named(dev_tx_fifo_size_15,
1566 dwc_otg_module_params.dev_tx_fifo_size[14], int, 0444);
1567 MODULE_PARM_DESC(dev_tx_fifo_size_15, "Number of words in the Tx FIFO 4-768");
1569 module_param_named(thr_ctl, dwc_otg_module_params.thr_ctl, int, 0444);
1570 MODULE_PARM_DESC(thr_ctl,
1571 "Thresholding enable flag bit 0 - non ISO Tx thr., 1 - ISO Tx thr., 2 - Rx thr.- bit 0=disabled 1=enabled");
1572 module_param_named(tx_thr_length, dwc_otg_module_params.tx_thr_length, int,
1574 MODULE_PARM_DESC(tx_thr_length, "Tx Threshold length in 32 bit DWORDs");
1575 module_param_named(rx_thr_length, dwc_otg_module_params.rx_thr_length, int,
1577 MODULE_PARM_DESC(rx_thr_length, "Rx Threshold length in 32 bit DWORDs");
1579 module_param_named(pti_enable, dwc_otg_module_params.pti_enable, int, 0444);
1580 module_param_named(mpi_enable, dwc_otg_module_params.mpi_enable, int, 0444);
1581 module_param_named(lpm_enable, dwc_otg_module_params.lpm_enable, int, 0444);
1582 MODULE_PARM_DESC(lpm_enable, "LPM Enable 0=LPM Disabled 1=LPM Enabled");
1584 module_param_named(besl_enable, dwc_otg_module_params.besl_enable, int, 0444);
1585 MODULE_PARM_DESC(besl_enable, "BESL Enable 0=BESL Disabled 1=BESL Enabled");
1586 module_param_named(baseline_besl, dwc_otg_module_params.baseline_besl, int, 0444);
1587 MODULE_PARM_DESC(baseline_besl, "Set the baseline besl value");
1588 module_param_named(deep_besl, dwc_otg_module_params.deep_besl, int, 0444);
1589 MODULE_PARM_DESC(deep_besl, "Set the deep besl value");
1591 module_param_named(ic_usb_cap, dwc_otg_module_params.ic_usb_cap, int, 0444);
1592 MODULE_PARM_DESC(ic_usb_cap,
1593 "IC_USB Capability 0=IC_USB Disabled 1=IC_USB Enabled");
1594 module_param_named(ahb_thr_ratio, dwc_otg_module_params.ahb_thr_ratio, int,
1596 MODULE_PARM_DESC(ahb_thr_ratio, "AHB Threshold Ratio");
1597 module_param_named(power_down, dwc_otg_module_params.power_down, int, 0444);
1598 MODULE_PARM_DESC(power_down, "Power Down Mode");
1599 module_param_named(reload_ctl, dwc_otg_module_params.reload_ctl, int, 0444);
1600 MODULE_PARM_DESC(reload_ctl, "HFIR Reload Control");
1601 module_param_named(dev_out_nak, dwc_otg_module_params.dev_out_nak, int, 0444);
1602 MODULE_PARM_DESC(dev_out_nak, "Enable Device OUT NAK");
1603 module_param_named(cont_on_bna, dwc_otg_module_params.cont_on_bna, int, 0444);
1604 MODULE_PARM_DESC(cont_on_bna, "Enable Enable Continue on BNA");
1605 module_param_named(ahb_single, dwc_otg_module_params.ahb_single, int, 0444);
1606 MODULE_PARM_DESC(ahb_single, "Enable AHB Single Support");
1607 module_param_named(adp_enable, dwc_otg_module_params.adp_enable, int, 0444);
1608 MODULE_PARM_DESC(adp_enable, "ADP Enable 0=ADP Disabled 1=ADP Enabled");
1609 module_param_named(otg_ver, dwc_otg_module_params.otg_ver, int, 0444);
1610 MODULE_PARM_DESC(otg_ver, "OTG revision supported 0=OTG 1.3 1=OTG 2.0");
1612 /** @page "Module Parameters"
1614 * The following parameters may be specified when starting the module.
1615 * These parameters define how the DWC_otg controller should be
1616 * configured. Parameter values are passed to the CIL initialization
1617 * function dwc_otg_cil_init
1619 * Example: <code>modprobe dwc_otg speed=1 otg_cap=1</code>
1623 <tr><td>Parameter Name</td><td>Meaning</td></tr>
1627 <td>Specifies the OTG capabilities. The driver will automatically detect the
1628 value for this parameter if none is specified.
1629 - 0: HNP and SRP capable (default, if available)
1630 - 1: SRP Only capable
1631 - 2: No HNP/SRP capable
1636 <td>Specifies whether to use slave or DMA mode for accessing the data FIFOs.
1637 The driver will automatically detect the value for this parameter if none is
1640 - 1: DMA (default, if available)
1644 <td>dma_burst_size</td>
1645 <td>The DMA Burst size (applicable only for External DMA Mode).
1646 - Values: 1, 4, 8 16, 32, 64, 128, 256 (default 32)
1651 <td>Specifies the maximum speed of operation in host and device mode. The
1652 actual speed depends on the speed of the attached device and the value of
1654 - 0: High Speed (default)
1659 <td>host_support_fs_ls_low_power</td>
1660 <td>Specifies whether low power mode is supported when attached to a Full
1661 Speed or Low Speed device in host mode.
1662 - 0: Don't support low power mode (default)
1663 - 1: Support low power mode
1667 <td>host_ls_low_power_phy_clk</td>
1668 <td>Specifies the PHY clock rate in low power mode when connected to a Low
1669 Speed device in host mode. This parameter is applicable only if
1670 HOST_SUPPORT_FS_LS_LOW_POWER is enabled.
1671 - 0: 48 MHz (default)
1676 <td>enable_dynamic_fifo</td>
1677 <td> Specifies whether FIFOs may be resized by the driver software.
1678 - 0: Use cC FIFO size parameters
1679 - 1: Allow dynamic FIFO sizing (default)
1683 <td>data_fifo_size</td>
1684 <td>Total number of 4-byte words in the data FIFO memory. This memory
1685 includes the Rx FIFO, non-periodic Tx FIFO, and periodic Tx FIFOs.
1686 - Values: 32 to 32768 (default 8192)
1688 Note: The total FIFO memory depth in the FPGA configuration is 8192.
1692 <td>dev_rx_fifo_size</td>
1693 <td>Number of 4-byte words in the Rx FIFO in device mode when dynamic
1694 FIFO sizing is enabled.
1695 - Values: 16 to 32768 (default 1064)
1699 <td>dev_nperio_tx_fifo_size</td>
1700 <td>Number of 4-byte words in the non-periodic Tx FIFO in device mode when
1701 dynamic FIFO sizing is enabled.
1702 - Values: 16 to 32768 (default 1024)
1706 <td>dev_perio_tx_fifo_size_n (n = 1 to 15)</td>
1707 <td>Number of 4-byte words in each of the periodic Tx FIFOs in device mode
1708 when dynamic FIFO sizing is enabled.
1709 - Values: 4 to 768 (default 256)
1713 <td>host_rx_fifo_size</td>
1714 <td>Number of 4-byte words in the Rx FIFO in host mode when dynamic FIFO
1716 - Values: 16 to 32768 (default 1024)
1720 <td>host_nperio_tx_fifo_size</td>
1721 <td>Number of 4-byte words in the non-periodic Tx FIFO in host mode when
1722 dynamic FIFO sizing is enabled in the core.
1723 - Values: 16 to 32768 (default 1024)
1727 <td>host_perio_tx_fifo_size</td>
1728 <td>Number of 4-byte words in the host periodic Tx FIFO when dynamic FIFO
1730 - Values: 16 to 32768 (default 1024)
1734 <td>max_transfer_size</td>
1735 <td>The maximum transfer size supported in bytes.
1736 - Values: 2047 to 65,535 (default 65,535)
1740 <td>max_packet_count</td>
1741 <td>The maximum number of packets in a transfer.
1742 - Values: 15 to 511 (default 511)
1746 <td>host_channels</td>
1747 <td>The number of host channel registers to use.
1748 - Values: 1 to 16 (default 12)
1750 Note: The FPGA configuration supports a maximum of 12 host channels.
1754 <td>dev_endpoints</td>
1755 <td>The number of endpoints in addition to EP0 available for device mode
1757 - Values: 1 to 15 (default 6 IN and OUT)
1759 Note: The FPGA configuration supports a maximum of 6 IN and OUT endpoints in
1765 <td>Specifies the type of PHY interface to use. By default, the driver will
1766 automatically detect the phy_type.
1768 - 1: UTMI+ (default, if available)
1773 <td>phy_utmi_width</td>
1774 <td>Specifies the UTMI+ Data Width. This parameter is applicable for a
1775 phy_type of UTMI+. Also, this parameter is applicable only if the
1776 OTG_HSPHY_WIDTH cC parameter was set to "8 and 16 bits", meaning that the
1777 core has been configured to work at either data path width.
1778 - Values: 8 or 16 bits (default 16)
1782 <td>phy_ulpi_ddr</td>
1783 <td>Specifies whether the ULPI operates at double or single data rate. This
1784 parameter is only applicable if phy_type is ULPI.
1785 - 0: single data rate ULPI interface with 8 bit wide data bus (default)
1786 - 1: double data rate ULPI interface with 4 bit wide data bus
1791 <td>Specifies whether to use the I2C interface for full speed PHY. This
1792 parameter is only applicable if PHY_TYPE is FS.
1793 - 0: Disabled (default)
1799 <td>Specifies whether to use ULPI FS/LS mode only.
1800 - 0: Disabled (default)
1806 <td>Specifies whether term select D-Line pulsing for all PHYs is enabled.
1807 - 0: Disabled (default)
1812 <td>en_multiple_tx_fifo</td>
1813 <td>Specifies whether dedicatedto tx fifos are enabled for non periodic IN EPs.
1814 The driver will automatically detect the value for this parameter if none is
1817 - 1: Enabled (default, if available)
1821 <td>dev_tx_fifo_size_n (n = 1 to 15)</td>
1822 <td>Number of 4-byte words in each of the Tx FIFOs in device mode
1823 when dynamic FIFO sizing is enabled.
1824 - Values: 4 to 768 (default 256)
1828 <td>tx_thr_length</td>
1829 <td>Transmit Threshold length in 32 bit double words
1830 - Values: 8 to 128 (default 64)
1834 <td>rx_thr_length</td>
1835 <td>Receive Threshold length in 32 bit double words
1836 - Values: 8 to 128 (default 64)
1841 <td>Specifies whether to enable Thresholding for Device mode. Bits 0, 1, 2 of
1842 this parmater specifies if thresholding is enabled for non-Iso Tx, Iso Tx and
1843 Rx transfers accordingly.
1844 The driver will automatically detect the value for this parameter if none is
1846 - Values: 0 to 7 (default 0)
1847 Bit values indicate:
1848 - 0: Thresholding disabled
1849 - 1: Thresholding enabled
1853 <td>dma_desc_enable</td>
1854 <td>Specifies whether to enable Descriptor DMA mode.
1855 The driver will automatically detect the value for this parameter if none is
1857 - 0: Descriptor DMA disabled
1858 - 1: Descriptor DMA (default, if available)
1863 <td>Specifies whether to enable MPI enhancement mode.
1864 The driver will automatically detect the value for this parameter if none is
1866 - 0: MPI disabled (default)
1872 <td>Specifies whether to enable PTI enhancement support.
1873 The driver will automatically detect the value for this parameter if none is
1875 - 0: PTI disabled (default)
1881 <td>Specifies whether to enable LPM support.
1882 The driver will automatically detect the value for this parameter if none is
1885 - 1: LPM enable (default, if available)
1889 <td>besl_enable</td>
1890 <td>Specifies whether to enable LPM Errata support.
1891 The driver will automatically detect the value for this parameter if none is
1893 - 0: LPM Errata disabled (default)
1894 - 1: LPM Errata enable
1898 <td>baseline_besl</td>
1899 <td>Specifies the baseline besl value.
1900 - Values: 0 to 15 (default 0)
1905 <td>Specifies the deep besl value.
1906 - Values: 0 to 15 (default 15)
1911 <td>Specifies whether to enable IC_USB capability.
1912 The driver will automatically detect the value for this parameter if none is
1914 - 0: IC_USB disabled (default, if available)
1919 <td>ahb_thr_ratio</td>
1920 <td>Specifies AHB Threshold ratio.
1921 - Values: 0 to 3 (default 0)
1926 <td>Specifies Power Down(Hibernation) Mode.
1927 The driver will automatically detect the value for this parameter if none is
1929 - 0: Power Down disabled (default)
1930 - 2: Power Down enabled
1935 <td>Specifies whether dynamic reloading of the HFIR register is allowed during
1936 run time. The driver will automatically detect the value for this parameter if
1937 none is specified. In case the HFIR value is reloaded when HFIR.RldCtrl == 1'b0
1938 the core might misbehave.
1939 - 0: Reload Control disabled (default)
1940 - 1: Reload Control enabled
1944 <td>dev_out_nak</td>
1945 <td>Specifies whether Device OUT NAK enhancement enabled or no.
1946 The driver will automatically detect the value for this parameter if
1947 none is specified. This parameter is valid only when OTG_EN_DESC_DMA == 1
\92b1.
1948 - 0: The core does not set NAK after Bulk OUT transfer complete (default)
1949 - 1: The core sets NAK after Bulk OUT transfer complete
1953 <td>cont_on_bna</td>
1954 <td>Specifies whether Enable Continue on BNA enabled or no.
1955 After receiving BNA interrupt the core disables the endpoint,when the
1956 endpoint is re-enabled by the application the
1957 - 0: Core starts processing from the DOEPDMA descriptor (default)
1958 - 1: Core starts processing from the descriptor which received the BNA.
1959 This parameter is valid only when OTG_EN_DESC_DMA == 1
\92b1.
1964 <td>This bit when programmed supports SINGLE transfers for remainder data
1965 in a transfer for DMA mode of operation.
1966 - 0: The remainder data will be sent using INCR burst size (default)
1967 - 1: The remainder data will be sent using SINGLE burst size.
1972 <td>Specifies whether ADP feature is enabled.
1973 The driver will automatically detect the value for this parameter if none is
1975 - 0: ADP feature disabled (default)
1976 - 1: ADP feature enabled
1981 <td>Specifies whether OTG is performing as USB OTG Revision 2.0 or Revision 1.3
1983 - 0: OTG 2.0 support disabled (default)
1984 - 1: OTG 2.0 support enabled