2 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
18 #include <linux/module.h>
20 #include <linux/of_address.h>
21 #include <linux/of_irq.h>
22 #include <linux/platform_device.h>
23 #include <linux/reset.h>
24 #include <linux/thermal.h>
25 #include <linux/timer.h>
26 #include <linux/mfd/syscon.h>
27 #include <linux/regmap.h>
28 #include <linux/gpio.h>
29 #include <linux/of_gpio.h>
32 #define thermal_dbg(dev, format, arg...) \
33 dev_printk(KERN_INFO , dev , format , ## arg)
35 #define thermal_dbg(dev, format, arg...)
40 * If the temperature over a period of time High,
41 * the resulting TSHUT gave CRU module,let it reset the entire chip,
42 * or via GPIO give PMIC.
55 * the system Temperature Sensors tshut(tshut) polarity
56 * the bit 8 is tshut polarity.
57 * 0: low active, 1: high active
65 * The system has three Temperature Sensors. channel 0 is reserved,
66 * channel 1 is for CPU, and channel 2 is for GPU.
75 struct rockchip_tsadc_chip {
77 enum tshut_mode tshut_mode;
78 enum tshut_polarity tshut_polarity;
83 /* Chip-wide methods */
84 void (*initialize)(void __iomem *reg, enum tshut_polarity p);
85 void (*irq_ack)(void __iomem *reg);
86 void (*control)(void __iomem *reg, bool on);
88 /* Per-sensor methods */
89 int (*get_temp)(int chn, void __iomem *reg, long *temp);
90 void (*set_alarm_temp)(int chn, void __iomem *reg, long temp);
91 void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
92 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
95 struct rockchip_thermal_sensor {
96 struct rockchip_thermal_data *thermal;
97 struct thermal_zone_device *tzd;
101 #define NUM_SENSORS 2 /* Ignore unused sensor 0 */
103 struct rockchip_thermal_data {
104 const struct rockchip_tsadc_chip *chip;
105 struct kobject *rockchip_thermal_kobj;
106 struct platform_device *pdev;
107 struct reset_control *reset;
109 struct rockchip_thermal_sensor sensors[NUM_SENSORS];
125 enum tshut_mode tshut_mode;
126 enum tshut_polarity tshut_polarity;
129 /* TSADC V2 Sensor info define: */
130 #define TSADCV2_USER_CON 0x00
131 #define TSADCV2_AUTO_CON 0x04
132 #define TSADCV2_INT_EN 0x08
133 #define TSADCV2_INT_PD 0x0c
134 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
135 #define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04)
136 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
137 #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
138 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
139 #define TSADCV2_AUTO_PERIOD 0x68
140 #define TSADCV2_AUTO_PERIOD_HT 0x6c
142 #define TSADCV2_AUTO_EN BIT(0)
143 #define TSADCV2_AUTO_DISABLE ~BIT(0)
144 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
145 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
146 #define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8)
148 #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
149 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
150 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
152 #define TSADCV2_INT_PD_CLEAR ~BIT(8)
154 #define TSADCV2_DATA_MASK 0xfff
155 #define TSADCV3_DATA_MASK 0x3ff
157 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
158 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
160 #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
161 #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
162 #define TSADCV3_AUTO_PERIOD_TIME 1500 /* msec */
163 #define TSADCV3_AUTO_PERIOD_HT_TIME 1000 /* msec */
165 #define TSADC_CPU_GATE
166 /*#define TSADC_GPU_GATE*/
168 #define TSADC_CLK_GATE_DELAY_TIME 50/* usec */
169 #define TSADC_CLK_CYCLE_TIME 30/* usec */
170 #define TSADC_USER_MODE_DELAY_TIME 200/* usec */
173 #define TSADC_TEST_SAMPLE_TIME 200/* msec */
179 static struct rockchip_thermal_data *s_thermal = NULL;
180 static const struct tsadc_table v2_code_table[] = {
181 {TSADCV2_DATA_MASK, -40000},
219 static const struct tsadc_table v3_code_table[] = {
255 {TSADCV3_DATA_MASK, 125000},
258 static u32 rk_tsadcv2_temp_to_code(long temp)
263 high = ARRAY_SIZE(v2_code_table) - 1;
264 mid = (high + low) / 2;
266 if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
269 while (low <= high) {
270 if (temp == v2_code_table[mid].temp)
271 return v2_code_table[mid].code;
272 else if (temp < v2_code_table[mid].temp)
276 mid = (low + high) / 2;
282 static long rk_tsadcv2_code_to_temp(u32 code)
287 high = ARRAY_SIZE(v2_code_table) - 1;
288 mid = (high + low) / 2;
290 if (code > v2_code_table[low].code || code < v2_code_table[high].code)
291 return 125000; /* No code available, return max temperature */
293 while (low <= high) {
294 if (code >= v2_code_table[mid].code && code <
295 v2_code_table[mid - 1].code)
296 return v2_code_table[mid].temp;
297 else if (code < v2_code_table[mid].code)
301 mid = (low + high) / 2;
307 static u32 rk_tsadcv3_temp_to_code(long temp)
313 high = ARRAY_SIZE(v3_code_table) - 1;
314 mid = (high + low) / 2;
316 if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
319 while (low <= high) {
320 if (temp == v3_code_table[mid].temp)
321 return v3_code_table[mid].code;
322 else if (temp < v3_code_table[mid].temp)
326 mid = (low + high) / 2;
332 static long rk_tsadcv3_code_to_temp(u32 code)
337 high = ARRAY_SIZE(v3_code_table) - 1;
338 mid = (high + low) / 2;
340 if (code < v3_code_table[low].code || code > v3_code_table[high].code)
341 return 125000; /* No code available, return max temperature */
343 while (low <= high) {
344 if (code <= v3_code_table[mid].code && code >
345 v3_code_table[mid - 1].code) {
346 return v3_code_table[mid - 1].temp + (v3_code_table[mid].temp -
347 v3_code_table[mid - 1].temp) * (code - v3_code_table[mid - 1].code)
348 / (v3_code_table[mid].code - v3_code_table[mid - 1].code);
349 } else if (code > v3_code_table[mid].code)
353 mid = (low + high) / 2;
360 * rk_tsadcv2_initialize - initialize TASDC Controller
361 * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
362 * every two accessing of TSADC in normal operation.
363 * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
364 * every two accessing of TSADC after the temperature is higher
365 * than COM_SHUT or COM_INT.
366 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
367 * if the temperature is higher than COMP_INT or COMP_SHUT for
368 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
370 static void rk_tsadcv2_initialize(void __iomem *regs,
371 enum tshut_polarity tshut_polarity)
373 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
374 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
375 regs + TSADCV2_AUTO_CON);
377 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
378 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
379 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
380 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
381 regs + TSADCV2_AUTO_PERIOD_HT);
382 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
383 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
386 static void rk_tsadcv3_initialize(void __iomem *regs,
387 enum tshut_polarity tshut_polarity)
389 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
390 writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
391 regs + TSADCV2_AUTO_CON);
393 writel_relaxed(TSADCV3_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
394 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
395 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
396 writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
397 regs + TSADCV2_AUTO_PERIOD_HT);
398 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
399 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
402 static void rk_tsadcv2_irq_ack(void __iomem *regs)
406 val = readl_relaxed(regs + TSADCV2_INT_PD);
407 writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
410 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
414 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
416 val |= TSADCV2_AUTO_EN;
418 val &= ~TSADCV2_AUTO_EN;
420 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
423 static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp)
427 /* the A/D value of the channel last conversion need some time */
428 val = readl_relaxed(regs + TSADCV2_DATA(chn));
432 *temp = rk_tsadcv2_code_to_temp(val);
437 static void rk_tsadcv2_alarm_temp(int chn, void __iomem *regs, long temp)
439 u32 alarm_value, int_en;
441 alarm_value = rk_tsadcv2_temp_to_code(temp);
442 writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
443 regs + TSADCV2_COMP_INT(chn));
445 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
446 int_en |= TSADCV2_INT_SRC_EN(chn);
447 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
450 static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
452 u32 tshut_value, val;
454 tshut_value = rk_tsadcv2_temp_to_code(temp);
455 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
457 /* TSHUT will be valid */
458 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
459 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
462 static int rk_tsadcv3_get_temp(int chn, void __iomem *regs, long *temp)
466 /* the A/D value of the channel last conversion need some time */
467 val = readl_relaxed(regs + TSADCV2_DATA(chn));
471 *temp = rk_tsadcv3_code_to_temp(val);
476 static void rk_tsadcv3_alarm_temp(int chn, void __iomem *regs, long temp)
478 u32 alarm_value, int_en;
480 alarm_value = rk_tsadcv3_temp_to_code(temp);
481 writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
482 regs + TSADCV2_COMP_INT(chn));
484 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
485 int_en |= TSADCV2_INT_SRC_EN(chn);
486 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
489 static void rk_tsadcv3_tshut_temp(int chn, void __iomem *regs, long temp)
491 u32 tshut_value, val;
493 tshut_value = rk_tsadcv3_temp_to_code(temp);
494 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
496 /* TSHUT will be valid */
497 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
498 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
501 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
502 enum tshut_mode mode)
506 val = readl_relaxed(regs + TSADCV2_INT_EN);
507 if (mode == TSHUT_MODE_GPIO) {
508 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
509 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
511 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
512 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
515 writel_relaxed(val, regs + TSADCV2_INT_EN);
518 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
519 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
520 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
521 .hw_shut_temp = 125000,
522 .mode = TSADC_AUTO_MODE,
526 .initialize = rk_tsadcv2_initialize,
527 .irq_ack = rk_tsadcv2_irq_ack,
528 .control = rk_tsadcv2_control,
529 .get_temp = rk_tsadcv2_get_temp,
530 .set_alarm_temp = rk_tsadcv2_alarm_temp,
531 .set_tshut_temp = rk_tsadcv2_tshut_temp,
532 .set_tshut_mode = rk_tsadcv2_tshut_mode,
535 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
536 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
537 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
538 .hw_shut_temp = 125000,
539 .mode = TSHUT_USER_MODE,
543 .initialize = rk_tsadcv3_initialize,
544 .irq_ack = rk_tsadcv2_irq_ack,
545 .control = rk_tsadcv2_control,
546 .get_temp = rk_tsadcv3_get_temp,
547 .set_alarm_temp = rk_tsadcv3_alarm_temp,
548 .set_tshut_temp = rk_tsadcv3_tshut_temp,
549 .set_tshut_mode = rk_tsadcv2_tshut_mode,
552 static const struct of_device_id of_rockchip_thermal_match[] = {
554 .compatible = "rockchip,rk3288-tsadc",
555 .data = (void *)&rk3288_tsadc_data,
558 .compatible = "rockchip,rk3368-tsadc",
559 .data = (void *)&rk3368_tsadc_data,
563 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
565 static void rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor
568 struct thermal_zone_device *tzd = sensor->tzd;
570 tzd->ops->set_mode(tzd,
571 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
574 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
576 struct rockchip_thermal_data *thermal = dev;
579 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
581 thermal->chip->irq_ack(thermal->regs);
583 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
584 thermal_zone_device_update(thermal->sensors[i].tzd);
590 static int rockchip_thermal_set_trips(void *_sensor, long low, long high)
592 struct rockchip_thermal_sensor *sensor = _sensor;
593 struct rockchip_thermal_data *thermal = sensor->thermal;
594 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
596 dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %ld, high %ld\n",
597 __func__, sensor->id, low, high);
599 tsadc->set_alarm_temp(sensor->id, thermal->regs, high);
605 static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
607 struct rockchip_thermal_sensor *sensor = _sensor;
608 struct rockchip_thermal_data *thermal = sensor->thermal;
609 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
612 retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
613 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n",
614 sensor->id, *out_temp, retval);
619 static int rockchip_configure_from_dt(struct device *dev,
620 struct device_node *np,
621 struct rockchip_thermal_data *thermal)
623 u32 shut_temp, tshut_mode, tshut_polarity;
626 if(of_property_read_u32(np, "clock-frequency", &rate))
628 dev_err(dev, "Missing clock-frequency property in the DT.\n");
631 clk_set_rate(thermal->clk, rate);
633 if (of_property_read_u32(np, "hw-shut-temp", &shut_temp)) {
635 "Missing tshut temp property, using default %ld\n",
636 thermal->chip->hw_shut_temp);
637 thermal->hw_shut_temp = thermal->chip->hw_shut_temp;
639 thermal->hw_shut_temp = shut_temp;
642 if (thermal->hw_shut_temp > INT_MAX) {
643 dev_err(dev, "Invalid tshut temperature specified: %ld\n",
644 thermal->hw_shut_temp);
648 if (of_property_read_u32(np, "tsadc-tshut-mode", &tshut_mode)) {
650 "Missing tshut mode property, using default (%s)\n",
651 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
653 thermal->tshut_mode = thermal->chip->tshut_mode;
655 thermal->tshut_mode = tshut_mode;
658 if (thermal->tshut_mode > 1) {
659 dev_err(dev, "Invalid tshut mode specified: %d\n",
660 thermal->tshut_mode);
664 if (of_property_read_u32(np, "tsadc-tshut-polarity", &tshut_polarity)) {
666 "Missing tshut-polarity property, using default (%s)\n",
667 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
669 thermal->tshut_polarity = thermal->chip->tshut_polarity;
671 thermal->tshut_polarity = tshut_polarity;
674 if (thermal->tshut_polarity > 1) {
675 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
676 thermal->tshut_polarity);
684 rockchip_thermal_register_sensor(struct platform_device *pdev,
685 struct rockchip_thermal_data *thermal,
686 struct rockchip_thermal_sensor *sensor,
689 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
692 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
693 tsadc->set_tshut_temp(id, thermal->regs, thermal->hw_shut_temp);
695 sensor->thermal = thermal;
697 sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
698 rockchip_thermal_get_temp,
700 if (IS_ERR(sensor->tzd)) {
701 error = PTR_ERR(sensor->tzd);
702 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
711 * Reset TSADC Controller, reset all tsadc registers.
713 static void rockchip_thermal_reset_controller(struct reset_control *reset)
715 reset_control_assert(reset);
716 usleep_range(10, 20);
717 reset_control_deassert(reset);
720 static struct rockchip_thermal_data *rockchip_thermal_get_data(void)
726 static int rockchip_thermal_user_mode_get_temp(struct rockchip_thermal_data *thermal,
727 int chn, int voltage)
732 local_irq_save(flags);
734 #ifdef TSADC_GPU_GATE
735 /*ret = regmap_write(thermal->cru, 0x210, 0x08000800);*/
736 ret = regmap_write(thermal->cru, 0x210, 0x09d809d8);
738 printk("Couldn't write to cru\n");
739 ret = regmap_write(thermal->cru, 0x214, 0x03000300);
741 printk("Couldn't write to cru\n");
744 /* CPU 24M slow mode*/
745 #ifdef TSADC_CPU_GATE
746 ret = regmap_write(thermal->cru, 0xc, 0x03000000);
748 printk("Couldn't write to cru\n");
749 ret = regmap_write(thermal->cru, 0x1c, 0x03000000);
751 printk("Couldn't write to cru\n");
753 udelay(TSADC_CLK_GATE_DELAY_TIME);
755 #ifdef TSADC_CPU_GATE
758 int val_cpu, temp_cpu;
760 /*power up, channel 0*/
761 writel_relaxed(0x208, thermal->regs + TSADCV2_USER_CON);
764 val_cpu_pd = readl_relaxed(thermal->regs + TSADCV2_INT_PD);
765 udelay(TSADC_CLK_CYCLE_TIME);
766 if ((val_cpu_pd & 0x100) == 0x100) {
767 udelay(TSADC_USER_MODE_DELAY_TIME);
769 writel_relaxed(0x100, thermal->regs + TSADCV2_INT_PD);
771 val_cpu = readl_relaxed(thermal->regs + TSADCV2_DATA(0));
775 /*power down, channel 0*/
776 writel_relaxed(0x200, thermal->regs + TSADCV2_USER_CON);
779 #ifdef TSADC_GPU_GATE
784 int val_gpu, temp_gpu;
786 /*power up, channel */
787 writel_relaxed(0x208 | 0x1, thermal->regs + TSADCV2_USER_CON);
790 val_gpu_pd = readl_relaxed(thermal->regs + TSADCV2_INT_PD);
791 udelay(TSADC_CLK_CYCLE_TIME);
792 if ((val_gpu_pd & 0x100) == 0x100) {
793 udelay(TSADC_USER_MODE_DELAY_TIME);
795 writel_relaxed(0x100, thermal->regs + TSADCV2_INT_PD);
797 val_gpu = readl_relaxed(thermal->regs + TSADCV2_DATA(1));
801 /*power down, channel */
802 writel_relaxed(0x200, thermal->regs + TSADCV2_USER_CON);
806 #ifdef TSADC_CPU_GATE
807 ret = regmap_write(thermal->cru, 0xc, 0x03000100);
809 printk("Couldn't write to cru\n");
810 ret = regmap_write(thermal->cru, 0x1c, 0x03000100);
812 printk("Couldn't write to cru\n");
816 #ifdef TSADC_GPU_GATE
817 ret = regmap_write(thermal->cru, 0x214, 0x03000000);
819 printk("Couldn't write to cru\n");
821 ret = regmap_write(thermal->cru, 0x210, 0x09d80000);
823 printk("Couldn't write to cru\n");
825 local_irq_restore(flags);
827 #ifdef TSADC_CPU_GATE
828 temp_cpu = rk_tsadcv3_code_to_temp((val_cpu * voltage + 500000) / 1000000) / 1000;
829 temp_cpu = temp_cpu + thermal->cpu_temp_adjust;
830 thermal->cpu_temp = temp_cpu;
832 printk("cpu[%d, %d], voltage: %d\n"
833 , val_cpu, temp_cpu, voltage);
839 int rockchip_tsadc_get_temp(int chn, int voltage)
841 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
844 if (thermal->chip->mode == TSADC_AUTO_MODE)
846 thermal->chip->get_temp(chn, thermal->regs, &out_temp);
847 return (int)out_temp/1000;
851 return rockchip_thermal_user_mode_get_temp(thermal, chn, voltage);
854 EXPORT_SYMBOL(rockchip_tsadc_get_temp);
856 static ssize_t rockchip_thermal_temp_adjust_test_store(struct kobject *kobj
857 , struct kobj_attribute *attr, const char *buf, size_t n)
859 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
862 const char *buftmp = buf;
864 sscanf(buftmp, "%c ", &cmd);
867 sscanf(buftmp, "%c %d", &cmd, &getdata);
868 thermal->cpu_temp_adjust = getdata;
869 printk("get cpu_temp_adjust value = %d\n", getdata);
873 sscanf(buftmp, "%c %d", &cmd, &getdata);
874 thermal->gpu_temp_adjust = getdata;
875 printk("get gpu_temp_adjust value = %d\n", getdata);
879 printk("Unknown command\n");
886 static ssize_t rockchip_thermal_temp_adjust_test_show(struct kobject *kobj
887 , struct kobj_attribute *attr, char *buf)
889 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
892 str += sprintf(str, "rockchip_thermal: cpu:%d, gpu:%d\n"
893 , thermal->cpu_temp_adjust, thermal->gpu_temp_adjust);
897 static ssize_t rockchip_thermal_temp_test_store(struct kobject *kobj
898 , struct kobj_attribute *attr, const char *buf, size_t n)
900 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
902 const char *buftmp = buf;
904 sscanf(buftmp, "%c", &cmd);
907 thermal->logout = true;
910 thermal->logout = false;
913 printk("Unknown command\n");
920 static ssize_t rockchip_thermal_temp_test_show(struct kobject *kobj
921 , struct kobj_attribute *attr, char *buf)
923 struct rockchip_thermal_data *thermal = rockchip_thermal_get_data();
926 str += sprintf(str, "current cpu_temp:%d\n"
927 , thermal->cpu_temp);
931 struct rockchip_thermal_attribute {
932 struct attribute attr;
933 ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
935 ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr,
936 const char *buf, size_t n);
939 static struct rockchip_thermal_attribute rockchip_thermal_attrs[] = {
940 /*node_name permision show_func store_func*/
941 __ATTR(temp_adjust, S_IRUGO | S_IWUSR, rockchip_thermal_temp_adjust_test_show
942 , rockchip_thermal_temp_adjust_test_store),
943 __ATTR(temp, S_IRUGO | S_IWUSR, rockchip_thermal_temp_test_show
944 , rockchip_thermal_temp_test_store),
947 static int rockchip_thermal_probe(struct platform_device *pdev)
949 struct device_node *np = pdev->dev.of_node;
950 struct rockchip_thermal_data *thermal;
951 const struct of_device_id *match;
952 struct resource *res;
957 match = of_match_node(of_rockchip_thermal_match, np);
961 irq = platform_get_irq(pdev, 0);
963 dev_err(&pdev->dev, "no irq resource?\n");
967 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
972 thermal->pdev = pdev;
974 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
978 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
979 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
980 if (IS_ERR(thermal->regs))
981 return PTR_ERR(thermal->regs);
983 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
984 if (IS_ERR(thermal->reset)) {
985 error = PTR_ERR(thermal->reset);
986 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
990 thermal->cru = syscon_regmap_lookup_by_phandle(np, "rockchip,cru");
991 if (IS_ERR(thermal->cru)) {
992 dev_err(&pdev->dev, "couldn't find cru regmap\n");
993 return PTR_ERR(thermal->cru);
996 thermal->pmu = syscon_regmap_lookup_by_phandle(np, "rockchip,pmu");
997 if (IS_ERR(thermal->pmu)) {
998 dev_err(&pdev->dev, "couldn't find pmu regmap\n");
999 return PTR_ERR(thermal->pmu);
1002 thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
1003 if (IS_ERR(thermal->grf)) {
1004 dev_err(&pdev->dev, "couldn't find grf regmap\n");
1005 return PTR_ERR(thermal->grf);
1008 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1009 if (IS_ERR(thermal->clk)) {
1010 error = PTR_ERR(thermal->clk);
1011 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1015 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1016 if (IS_ERR(thermal->pclk)) {
1017 error = PTR_ERR(thermal->clk);
1018 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1023 error = clk_prepare_enable(thermal->clk);
1025 dev_err(&pdev->dev, "failed to enable converter clock: %d\n"
1030 error = clk_prepare_enable(thermal->pclk);
1032 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1033 goto err_disable_clk;
1036 rockchip_thermal_reset_controller(thermal->reset);
1037 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1039 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1041 goto err_disable_pclk;
1044 if (thermal->chip->mode == TSADC_AUTO_MODE)
1046 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1047 error = rockchip_thermal_register_sensor(pdev, thermal,
1048 &thermal->sensors[0],
1049 thermal->chip->cpu_id);
1052 "failed to register CPU thermal sensor: %d\n", error);
1053 goto err_disable_pclk;
1056 error = rockchip_thermal_register_sensor(pdev, thermal,
1057 &thermal->sensors[1],
1058 thermal->chip->gpu_id);
1061 "failed to register GPU thermal sensor: %d\n", error);
1062 goto err_unregister_cpu_sensor;
1065 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1066 &rockchip_thermal_alarm_irq_thread,
1068 "rockchip_thermal", thermal);
1071 "failed to request tsadc irq: %d\n", error);
1072 goto err_unregister_gpu_sensor;
1075 thermal->chip->control(thermal->regs, true);
1077 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1078 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1081 thermal->rockchip_thermal_kobj = kobject_create_and_add("rockchip_thermal", NULL);
1082 if (!thermal->rockchip_thermal_kobj)
1084 for (i = 0; i < ARRAY_SIZE(rockchip_thermal_attrs); i++) {
1085 error = sysfs_create_file(thermal->rockchip_thermal_kobj
1086 , &rockchip_thermal_attrs[i].attr);
1088 printk("create index %d error\n", i);
1093 s_thermal = thermal;
1094 platform_set_drvdata(pdev, thermal);
1098 err_unregister_gpu_sensor:
1099 if (thermal->chip->mode == TSADC_AUTO_MODE)
1100 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
1101 err_unregister_cpu_sensor:
1102 if (thermal->chip->mode == TSADC_AUTO_MODE)
1103 thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
1105 clk_disable_unprepare(thermal->pclk);
1107 clk_disable_unprepare(thermal->clk);
1112 static int rockchip_thermal_remove(struct platform_device *pdev)
1114 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1117 if (thermal->chip->mode == TSADC_AUTO_MODE)
1119 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1120 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1122 rockchip_thermal_toggle_sensor(sensor, false);
1123 thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
1126 thermal->chip->control(thermal->regs, false);
1128 clk_disable_unprepare(thermal->pclk);
1129 clk_disable_unprepare(thermal->clk);
1134 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1136 struct platform_device *pdev = to_platform_device(dev);
1137 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1140 if (thermal->chip->mode == TSADC_AUTO_MODE)
1142 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1143 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1145 thermal->chip->control(thermal->regs, false);
1147 clk_disable(thermal->pclk);
1148 clk_disable(thermal->clk);
1153 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1155 struct platform_device *pdev = to_platform_device(dev);
1156 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1160 error = clk_enable(thermal->clk);
1164 error = clk_enable(thermal->pclk);
1168 rockchip_thermal_reset_controller(thermal->reset);
1169 if (thermal->chip->mode == TSADC_AUTO_MODE)
1171 thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
1173 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
1174 int id = thermal->sensors[i].id;
1176 thermal->chip->set_tshut_mode(id, thermal->regs,
1177 thermal->tshut_mode);
1178 thermal->chip->set_tshut_temp(id, thermal->regs,
1179 thermal->hw_shut_temp);
1182 thermal->chip->control(thermal->regs, true);
1184 for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
1185 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1190 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1191 rockchip_thermal_suspend, rockchip_thermal_resume);
1193 static struct platform_driver rockchip_thermal_driver = {
1195 .name = "rockchip-thermal",
1196 .owner = THIS_MODULE,
1197 .pm = &rockchip_thermal_pm_ops,
1198 .of_match_table = of_rockchip_thermal_match,
1200 .probe = rockchip_thermal_probe,
1201 .remove = rockchip_thermal_remove,
1204 module_platform_driver(rockchip_thermal_driver);
1206 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1207 MODULE_AUTHOR("Rockchip, Inc.");
1208 MODULE_LICENSE("GPL v2");
1209 MODULE_ALIAS("platform:rockchip-thermal");