2 * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
3 * Author: Zain Wang <zain.wang@rock-chips.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * Some ideas are from chrome ec and fairchild GPL fusb302 driver.
12 #include <linux/delay.h>
13 #include <linux/extcon.h>
14 #include <linux/freezer.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/module.h>
18 #include <linux/of_gpio.h>
19 #include <linux/regmap.h>
20 #include <linux/power_supply.h>
24 #define FUSB302_MAX_REG (FUSB_REG_FIFO + 50)
25 #define FUSB_MS_TO_NS(x) ((s64)x * 1000 * 1000)
27 #define FUSB_MODE_DRP 0
28 #define FUSB_MODE_UFP 1
29 #define FUSB_MODE_DFP 2
30 #define FUSB_MODE_ASS 3
32 #define TYPEC_CC_VOLT_OPEN 0
33 #define TYPEC_CC_VOLT_RA 1
34 #define TYPEC_CC_VOLT_RD 2
35 #define TYPEC_CC_VOLT_RP 3
37 #define EVENT_CC BIT(0)
38 #define EVENT_RX BIT(1)
39 #define EVENT_TX BIT(2)
40 #define EVENT_REC_RESET BIT(3)
41 #define EVENT_WORK_CONTINUE BIT(5)
42 #define EVENT_TIMER_MUX BIT(6)
43 #define EVENT_TIMER_STATE BIT(7)
44 #define FLAG_EVENT (EVENT_RX | EVENT_TIMER_MUX | \
47 #define PIN_MAP_A BIT(0)
48 #define PIN_MAP_B BIT(1)
49 #define PIN_MAP_C BIT(2)
50 #define PIN_MAP_D BIT(3)
51 #define PIN_MAP_E BIT(4)
52 #define PIN_MAP_F BIT(5)
54 static u8 fusb30x_port_used;
55 static struct fusb30x_chip *fusb30x_port_info[256];
57 static bool is_write_reg(struct device *dev, unsigned int reg)
59 if (reg >= FUSB_REG_FIFO)
62 return ((reg < (FUSB_REG_CONTROL4 + 1)) && (reg > 0x01)) ?
66 static bool is_volatile_reg(struct device *dev, unsigned int reg)
68 if (reg > FUSB_REG_CONTROL4)
72 case FUSB_REG_CONTROL0:
73 case FUSB_REG_CONTROL1:
74 case FUSB_REG_CONTROL3:
81 struct regmap_config fusb302_regmap_config = {
84 .writeable_reg = is_write_reg,
85 .volatile_reg = is_volatile_reg,
86 .max_register = FUSB302_MAX_REG,
87 .cache_type = REGCACHE_RBTREE,
90 static void dump_notify_info(struct fusb30x_chip *chip)
92 dev_dbg(chip->dev, "port %d\n", chip->port_num);
93 dev_dbg(chip->dev, "orientation %d\n", chip->notify.orientation);
94 dev_dbg(chip->dev, "power_role %d\n", chip->notify.power_role);
95 dev_dbg(chip->dev, "data_role %d\n", chip->notify.data_role);
96 dev_dbg(chip->dev, "cc %d\n", chip->notify.is_cc_connected);
97 dev_dbg(chip->dev, "pd %d\n", chip->notify.is_pd_connected);
98 dev_dbg(chip->dev, "enter_mode %d\n", chip->notify.is_enter_mode);
99 dev_dbg(chip->dev, "pin support %d\n",
100 chip->notify.pin_assignment_support);
101 dev_dbg(chip->dev, "pin def %d\n", chip->notify.pin_assignment_def);
102 dev_dbg(chip->dev, "attention %d\n", chip->notify.attention);
105 static const unsigned int fusb302_cable[] = {
118 static void fusb_set_pos_power(struct fusb30x_chip *chip, int max_vol,
126 for (i = PD_HEADER_CNT(chip->rec_head) - 1; i >= 0; i--) {
127 switch (CAP_POWER_TYPE(chip->rec_load[i])) {
130 if ((CAP_FPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
132 (CAP_FPDO_CURRENT(chip->rec_load[i]) * 10) <=
134 chip->pos_power = i + 1;
135 tmp = CAP_FPDO_VOLTAGE(chip->rec_load[i]);
136 chip->pd_output_vol = tmp * 50;
137 tmp = CAP_FPDO_CURRENT(chip->rec_load[i]);
138 chip->pd_output_cur = tmp * 10;
144 if ((CAP_VPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
146 (CAP_VPDO_CURRENT(chip->rec_load[i]) * 10) <=
148 chip->pos_power = i + 1;
149 tmp = CAP_VPDO_VOLTAGE(chip->rec_load[i]);
150 chip->pd_output_vol = tmp * 50;
151 tmp = CAP_VPDO_CURRENT(chip->rec_load[i]);
152 chip->pd_output_cur = tmp * 10;
157 /* not meet battery caps */
165 static int fusb302_set_pos_power_by_charge_ic(struct fusb30x_chip *chip)
167 struct power_supply *psy = NULL;
168 union power_supply_propval val;
169 enum power_supply_property psp;
170 int max_vol, max_cur;
174 psy = power_supply_get_by_phandle(chip->dev->of_node, "charge-dev");
175 if (!psy || IS_ERR(psy))
178 psp = POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX;
179 if (power_supply_get_property(psy, psp, &val) == 0)
180 max_vol = val.intval / 1000;
182 psp = POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT;
183 if (power_supply_get_property(psy, psp, &val) == 0)
184 max_cur = val.intval / 1000;
186 if (max_vol > 0 && max_cur > 0)
187 fusb_set_pos_power(chip, max_vol, max_cur);
192 void fusb_irq_disable(struct fusb30x_chip *chip)
194 unsigned long irqflags = 0;
196 spin_lock_irqsave(&chip->irq_lock, irqflags);
197 if (chip->enable_irq) {
198 disable_irq_nosync(chip->gpio_int_irq);
199 chip->enable_irq = 0;
201 dev_warn(chip->dev, "irq have already disabled\n");
203 spin_unlock_irqrestore(&chip->irq_lock, irqflags);
206 void fusb_irq_enable(struct fusb30x_chip *chip)
208 unsigned long irqflags = 0;
210 spin_lock_irqsave(&chip->irq_lock, irqflags);
211 if (!chip->enable_irq) {
212 enable_irq(chip->gpio_int_irq);
213 chip->enable_irq = 1;
215 spin_unlock_irqrestore(&chip->irq_lock, irqflags);
218 static void platform_fusb_notify(struct fusb30x_chip *chip)
220 bool plugged = 0, flip = 0, dfp = 0, ufp = 0, dp = 0, usb_ss = 0;
221 union extcon_property_value property;
223 if (chip->notify.is_cc_connected)
224 chip->notify.orientation = chip->cc_polarity + 1;
226 /* avoid notify repeated */
227 if (memcmp(&chip->notify, &chip->notify_cmp,
228 sizeof(struct notify_info))) {
229 dump_notify_info(chip);
230 chip->notify.attention = 0;
231 memcpy(&chip->notify_cmp, &chip->notify,
232 sizeof(struct notify_info));
234 plugged = chip->notify.is_cc_connected ||
235 chip->notify.is_pd_connected;
236 flip = chip->notify.orientation ?
237 (chip->notify.orientation - 1) : 0;
238 dp = chip->notify.is_enter_mode;
242 usb_ss = (chip->notify.pin_assignment_def &
243 (PIN_MAP_B | PIN_MAP_D | PIN_MAP_F)) ? 1 : 0;
244 } else if (chip->notify.data_role) {
247 } else if (plugged) {
252 if (chip->notify.power_role == 0 &&
253 chip->notify.is_pd_connected &&
254 chip->pd_output_vol > 0 && chip->pd_output_cur > 0) {
255 extcon_set_state(chip->extcon, EXTCON_CHG_USB_FAST,
258 (chip->pd_output_cur << 15 |
259 chip->pd_output_vol);
260 extcon_set_property(chip->extcon, EXTCON_CHG_USB_FAST,
261 EXTCON_PROP_USB_TYPEC_POLARITY,
263 extcon_sync(chip->extcon, EXTCON_CHG_USB_FAST);
266 #ifdef CONFIG_FREEZER
268 * If system enter PM suspend, we need to wait until
269 * PM resume all of devices completion, then the flag
270 * pm_freezing will be set to false, and we can send
271 * notifier to USB/DP module safety, it make sure that
272 * USB/DP can enable power domain successfully.
275 usleep_range(10000, 11000);
278 property.intval = flip;
279 extcon_set_property(chip->extcon, EXTCON_USB,
280 EXTCON_PROP_USB_TYPEC_POLARITY, property);
281 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
282 EXTCON_PROP_USB_TYPEC_POLARITY, property);
283 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
284 EXTCON_PROP_USB_TYPEC_POLARITY, property);
286 property.intval = usb_ss;
287 extcon_set_property(chip->extcon, EXTCON_USB,
288 EXTCON_PROP_USB_SS, property);
289 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
290 EXTCON_PROP_USB_SS, property);
291 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
292 EXTCON_PROP_USB_SS, property);
293 extcon_set_state(chip->extcon, EXTCON_USB, ufp);
294 extcon_set_state(chip->extcon, EXTCON_USB_HOST, dfp);
295 extcon_set_state(chip->extcon, EXTCON_DISP_DP, dp);
296 extcon_sync(chip->extcon, EXTCON_USB);
297 extcon_sync(chip->extcon, EXTCON_USB_HOST);
298 extcon_sync(chip->extcon, EXTCON_DISP_DP);
302 static bool platform_get_device_irq_state(struct fusb30x_chip *chip)
304 return !gpiod_get_value(chip->gpio_int);
307 static void fusb_timer_start(struct hrtimer *timer, int ms)
311 ktime = ktime_set(0, FUSB_MS_TO_NS(ms));
312 hrtimer_start(timer, ktime, HRTIMER_MODE_REL);
315 static void platform_set_vbus_lvl_enable(struct fusb30x_chip *chip, int vbus_5v,
318 bool gpio_vbus_value = 0;
320 gpio_vbus_value = gpiod_get_value(chip->gpio_vbus_5v);
321 if (chip->gpio_vbus_5v) {
322 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_5v);
323 /* Only set state here, don't sync notifier to PMIC */
324 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
326 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
327 extcon_sync(chip->extcon, EXTCON_USB_VBUS_EN);
328 dev_info(chip->dev, "fusb302 send extcon to %s vbus 5v\n", vbus_5v ? "enable" : "disable");
331 if (chip->gpio_vbus_other)
332 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_other);
334 if (chip->gpio_discharge && !vbus_5v && gpio_vbus_value) {
335 gpiod_set_value(chip->gpio_discharge, 1);
337 gpiod_set_value(chip->gpio_discharge, 0);
341 static void set_state(struct fusb30x_chip *chip, enum connection_state state)
343 dev_dbg(chip->dev, "port %d, state %d\n", chip->port_num, state);
345 dev_info(chip->dev, "PD disabled\n");
346 chip->conn_state = state;
349 chip->work_continue = 1;
352 static int tcpm_get_message(struct fusb30x_chip *chip)
357 regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, 3);
358 chip->rec_head = (buf[1] & 0xff) | ((buf[2] << 8) & 0xff00);
360 len = PD_HEADER_CNT(chip->rec_head) << 2;
361 regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, len + 4);
363 memcpy(chip->rec_load, buf, len);
368 static void fusb302_flush_rx_fifo(struct fusb30x_chip *chip)
370 tcpm_get_message(chip);
373 static int tcpm_get_cc(struct fusb30x_chip *chip, int *CC1, int *CC2)
379 *CC1 = TYPEC_CC_VOLT_OPEN;
380 *CC2 = TYPEC_CC_VOLT_OPEN;
382 if (chip->cc_state & 0x01)
387 if (chip->cc_state & 0x04) {
388 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
389 /* measure cc1 first */
390 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
391 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
392 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
393 SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
394 SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
396 usleep_range(250, 300);
398 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
399 val &= STATUS0_BC_LVL;
403 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
404 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
405 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
406 SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
407 SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
409 usleep_range(250, 300);
411 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
412 val &= STATUS0_BC_LVL;
415 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
416 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
419 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
421 val &= ~(SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
422 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2);
423 if (chip->cc_state & 0x01) {
424 val |= SWITCHES0_MEAS_CC1 | SWITCHES0_PU_EN1;
426 val |= SWITCHES0_MEAS_CC2 | SWITCHES0_PU_EN2;
428 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, val);
430 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
431 usleep_range(250, 300);
433 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
434 if (val & STATUS0_COMP) {
439 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
440 usleep_range(250, 300);
441 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
442 if (val & STATUS0_COMP) {
444 if (comp_times == 3) {
445 *CC_MEASURE = TYPEC_CC_VOLT_OPEN;
446 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
451 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_low);
452 regmap_read(chip->regmap, FUSB_REG_MEASURE, &val);
453 usleep_range(250, 300);
455 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
457 if (val & STATUS0_COMP)
458 *CC_MEASURE = TYPEC_CC_VOLT_RD;
460 *CC_MEASURE = TYPEC_CC_VOLT_RA;
461 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
468 static int tcpm_set_cc(struct fusb30x_chip *chip, int mode)
472 val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
473 SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
479 if (chip->togdone_pullup)
480 val |= SWITCHES0_PU_EN2;
482 val |= SWITCHES0_PU_EN1;
485 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
488 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
494 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0, mask, val);
498 static int tcpm_set_rx_enable(struct fusb30x_chip *chip, int enable)
503 if (chip->cc_polarity)
504 val |= SWITCHES0_MEAS_CC2;
506 val |= SWITCHES0_MEAS_CC1;
507 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
508 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
510 fusb302_flush_rx_fifo(chip);
511 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
512 SWITCHES1_AUTO_CRC, SWITCHES1_AUTO_CRC);
515 * bit of a hack here.
516 * when this function is called to disable rx (enable=0)
517 * using it as an indication of detach (gulp!)
518 * to reset our knowledge of where
519 * the toggle state machine landed.
521 chip->togdone_pullup = 0;
524 tcpm_set_cc(chip, FUSB_MODE_DRP);
525 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
526 CONTROL2_TOG_RD_ONLY,
527 CONTROL2_TOG_RD_ONLY);
529 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
530 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
532 regmap_update_bits(chip->regmap,
533 FUSB_REG_SWITCHES1, SWITCHES1_AUTO_CRC, 0);
539 static int tcpm_set_msg_header(struct fusb30x_chip *chip)
541 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
542 SWITCHES1_POWERROLE | SWITCHES1_DATAROLE,
543 (chip->notify.power_role << 7) |
544 (chip->notify.data_role << 4));
545 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
546 SWITCHES1_SPECREV, 2 << 5);
550 static int tcpm_set_polarity(struct fusb30x_chip *chip, bool polarity)
554 #ifdef FUSB_VCONN_SUPPORT
555 if (chip->vconn_enabled) {
557 val |= SWITCHES0_VCONN_CC1;
559 val |= SWITCHES0_VCONN_CC2;
564 val |= SWITCHES0_MEAS_CC2;
566 val |= SWITCHES0_MEAS_CC1;
568 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
569 SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2 |
570 SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
575 val |= SWITCHES1_TXCC2;
577 val |= SWITCHES1_TXCC1;
578 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
579 SWITCHES1_TXCC1 | SWITCHES1_TXCC2,
582 chip->cc_polarity = polarity;
587 static int tcpm_set_vconn(struct fusb30x_chip *chip, int enable)
592 tcpm_set_polarity(chip, chip->cc_polarity);
594 val &= ~(SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2);
595 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
596 SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2,
599 chip->vconn_enabled = enable;
603 static void fusb302_pd_reset(struct fusb30x_chip *chip)
605 regmap_write(chip->regmap, FUSB_REG_RESET, RESET_PD_RESET);
606 regmap_reinit_cache(chip->regmap, &fusb302_regmap_config);
609 static void tcpm_select_rp_value(struct fusb30x_chip *chip, u32 rp)
613 regmap_read(chip->regmap, FUSB_REG_CONTROL0, &control0_reg);
615 control0_reg &= ~CONTROL0_HOST_CUR;
617 * according to the host current, the compare value is different
620 /* host pull up current is 80ua , high voltage is 1.596v, low is 0.21v */
622 chip->cc_meas_high = 0x26;
623 chip->cc_meas_low = 0x5;
624 control0_reg |= CONTROL0_HOST_CUR_USB;
626 /* host pull up current is 180ua , high voltage is 1.596v, low is 0.42v */
628 chip->cc_meas_high = 0x26;
629 chip->cc_meas_low = 0xa;
630 control0_reg |= CONTROL0_HOST_CUR_1A5;
632 /* host pull up current is 330ua , high voltage is 2.604v, low is 0.798v*/
634 chip->cc_meas_high = 0x26;
635 chip->cc_meas_low = 0x13;
636 control0_reg |= CONTROL0_HOST_CUR_3A0;
639 chip->cc_meas_high = 0x26;
640 chip->cc_meas_low = 0xa;
641 control0_reg |= CONTROL0_HOST_CUR_1A5;
645 regmap_write(chip->regmap, FUSB_REG_CONTROL0, control0_reg);
648 static void tcpm_init(struct fusb30x_chip *chip)
653 regmap_read(chip->regmap, FUSB_REG_DEVICEID, &tmp);
654 chip->chip_id = (u8)tmp;
655 platform_set_vbus_lvl_enable(chip, 0, 0);
656 chip->notify.is_cc_connected = 0;
659 /* restore default settings */
660 regmap_update_bits(chip->regmap, FUSB_REG_RESET, RESET_SW_RESET,
662 fusb302_pd_reset(chip);
663 /* set auto_retry and number of retries */
664 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
665 CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES,
666 CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES),
670 val &= ~(MASK_M_BC_LVL | MASK_M_COLLISION | MASK_M_ALERT |
672 regmap_write(chip->regmap, FUSB_REG_MASK, val);
675 val &= ~(MASKA_M_TOGDONE | MASKA_M_RETRYFAIL | MASKA_M_HARDSENT |
676 MASKA_M_TXSENT | MASKA_M_HARDRST);
677 regmap_write(chip->regmap, FUSB_REG_MASKA, val);
680 val = ~MASKB_M_GCRCSEND;
681 regmap_write(chip->regmap, FUSB_REG_MASKB, val);
684 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
685 CONTROL2_MODE | CONTROL2_TOGGLE,
686 (1 << 1) | CONTROL2_TOGGLE);
688 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
689 CONTROL2_TOG_RD_ONLY,
690 CONTROL2_TOG_RD_ONLY);
693 tcpm_select_rp_value(chip, TYPEC_RP_1A5);
694 /* Interrupts Enable */
695 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL0, CONTROL0_INT_MASK,
698 tcpm_set_polarity(chip, 0);
699 tcpm_set_vconn(chip, 0);
701 regmap_write(chip->regmap, FUSB_REG_POWER, 0xf);
704 static void pd_execute_hard_reset(struct fusb30x_chip *chip)
708 if (chip->notify.power_role)
709 set_state(chip, policy_src_transition_default);
711 set_state(chip, policy_snk_transition_default);
714 static void tcpc_alert(struct fusb30x_chip *chip, int *evt)
716 int interrupt, interrupta, interruptb;
720 regmap_read(chip->regmap, FUSB_REG_INTERRUPT, &interrupt);
721 regmap_read(chip->regmap, FUSB_REG_INTERRUPTA, &interrupta);
722 regmap_read(chip->regmap, FUSB_REG_INTERRUPTB, &interruptb);
724 if (interrupt & INTERRUPT_BC_LVL) {
725 if (chip->notify.is_cc_connected)
729 if (interrupt & INTERRUPT_VBUSOK) {
730 if (chip->notify.is_cc_connected)
734 if (interrupta & INTERRUPTA_TOGDONE) {
736 regmap_read(chip->regmap, FUSB_REG_STATUS1A, &val);
737 chip->cc_state = ((u8)val >> 3) & 0x07;
739 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
743 val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
744 SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
746 if (chip->cc_state & 0x01)
747 val |= SWITCHES0_PU_EN1;
749 val |= SWITCHES0_PU_EN2;
751 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
752 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
753 SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
757 if (interrupta & INTERRUPTA_TXSENT) {
759 fusb302_flush_rx_fifo(chip);
760 chip->tx_state = tx_success;
763 if (interruptb & INTERRUPTB_GCRCSENT)
766 if (interrupta & INTERRUPTA_HARDRST) {
767 fusb302_pd_reset(chip);
768 pd_execute_hard_reset(chip);
769 *evt |= EVENT_REC_RESET;
772 if (interrupta & INTERRUPTA_RETRYFAIL) {
774 chip->tx_state = tx_failed;
777 if (interrupta & INTERRUPTA_HARDSENT) {
779 * The fusb PD should be reset once to sync adapter PD
780 * signal after fusb sent hard reset cmd.This is not PD
781 * device if reset failed.
785 fusb302_pd_reset(chip);
786 pd_execute_hard_reset(chip);
789 chip->tx_state = tx_success;
790 chip->timer_state = T_DISABLED;
796 static void mux_alert(struct fusb30x_chip *chip, int *evt)
798 if (!chip->timer_mux) {
799 *evt |= EVENT_TIMER_MUX;
800 chip->timer_mux = T_DISABLED;
803 if (!chip->timer_state) {
804 *evt |= EVENT_TIMER_STATE;
805 chip->timer_state = T_DISABLED;
808 if (chip->work_continue) {
809 *evt |= EVENT_WORK_CONTINUE;
810 chip->work_continue = 0;
814 static void set_state_unattached(struct fusb30x_chip *chip)
816 dev_info(chip->dev, "connection has disconnected\n");
818 tcpm_set_rx_enable(chip, 0);
819 chip->conn_state = unattached;
820 tcpm_set_cc(chip, FUSB_MODE_DRP);
822 /* claer notify_info */
823 memset(&chip->notify, 0, sizeof(struct notify_info));
824 platform_fusb_notify(chip);
826 if (chip->gpio_discharge)
827 gpiod_set_value(chip->gpio_discharge, 1);
829 if (chip->gpio_discharge)
830 gpiod_set_value(chip->gpio_discharge, 0);
833 static int tcpm_check_vbus(struct fusb30x_chip *chip)
837 /* Read status register */
838 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
840 return (val & STATUS0_VBUSOK) ? 1 : 0;
843 static void set_mesg(struct fusb30x_chip *chip, int cmd, int is_DMT)
846 struct PD_CAP_INFO *pd_cap_info = &chip->pd_cap_info;
848 chip->send_head = ((chip->msg_id & 0x7) << 9) |
849 ((chip->notify.power_role & 0x1) << 8) |
851 ((chip->notify.data_role & 0x1) << 5);
855 case DMT_SOURCECAPABILITIES:
856 chip->send_head |= ((chip->n_caps_used & 0x3) << 12) | (cmd & 0xf);
858 for (i = 0; i < chip->n_caps_used; i++) {
859 chip->send_load[i] = (pd_cap_info->supply_type << 30) |
860 (pd_cap_info->dual_role_power << 29) |
861 (pd_cap_info->usb_suspend_support << 28) |
862 (pd_cap_info->externally_powered << 27) |
863 (pd_cap_info->usb_communications_cap << 26) |
864 (pd_cap_info->data_role_swap << 25) |
865 (pd_cap_info->peak_current << 20) |
866 (chip->source_power_supply[i] << 10) |
867 (chip->source_max_current[i]);
871 chip->send_head |= ((1 << 12) | (cmd & 0xf));
872 /* send request with FVRDO */
873 chip->send_load[0] = (chip->pos_power << 28) |
879 switch (CAP_POWER_TYPE(chip->rec_load[chip->pos_power - 1])) {
882 chip->send_load[0] |= ((CAP_FPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
883 chip->send_load[0] |= (CAP_FPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
887 chip->send_load[0] |= ((CAP_VPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
888 chip->send_load[0] |= (CAP_VPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
891 /* not meet battery caps */
895 case DMT_SINKCAPABILITIES:
897 case DMT_VENDERDEFINED:
903 chip->send_head |= (cmd & 0xf);
907 static void set_vdm_mesg(struct fusb30x_chip *chip, int cmd, int type, int mode)
909 chip->send_head = (chip->msg_id & 0x7) << 9;
910 chip->send_head |= (chip->notify.power_role & 0x1) << 8;
912 chip->send_head = ((chip->msg_id & 0x7) << 9) |
913 ((chip->notify.power_role & 0x1) << 8) |
915 ((chip->notify.data_role & 0x1) << 5) |
916 (DMT_VENDERDEFINED & 0xf);
918 chip->send_load[0] = (1 << 15) |
924 case VDM_DISCOVERY_ID:
925 case VDM_DISCOVERY_SVIDS:
927 chip->send_load[0] |= (0xff00 << 16);
928 chip->send_head |= (1 << 12);
930 case VDM_DISCOVERY_MODES:
931 chip->send_load[0] |=
932 (chip->vdm_svid[chip->val_tmp >> 1] << 16);
933 chip->send_head |= (1 << 12);
936 chip->send_head |= (1 << 12);
937 chip->send_load[0] |= (mode << 8) | (0xff01 << 16);
940 chip->send_head |= (1 << 12);
941 chip->send_load[0] |= (0x0f << 8) | (0xff01 << 16);
943 case VDM_DP_STATUS_UPDATE:
944 chip->send_head |= (2 << 12);
945 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
946 chip->send_load[1] = 5;
949 chip->send_head |= (2 << 12);
950 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
951 chip->send_load[1] = (chip->notify.pin_assignment_def << 8) |
959 static enum tx_state policy_send_hardrst(struct fusb30x_chip *chip, int evt)
961 switch (chip->tx_state) {
963 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
964 CONTROL3_SEND_HARDRESET,
965 CONTROL3_SEND_HARDRESET);
966 chip->tx_state = tx_busy;
967 chip->timer_state = T_BMC_TIMEOUT;
968 fusb_timer_start(&chip->timer_state_machine,
972 if (evt & EVENT_TIMER_STATE)
973 chip->tx_state = tx_success;
976 return chip->tx_state;
979 static enum tx_state policy_send_data(struct fusb30x_chip *chip)
985 switch (chip->tx_state) {
987 senddata[pos++] = FUSB_TKN_SYNC1;
988 senddata[pos++] = FUSB_TKN_SYNC1;
989 senddata[pos++] = FUSB_TKN_SYNC1;
990 senddata[pos++] = FUSB_TKN_SYNC2;
992 len = PD_HEADER_CNT(chip->send_head) << 2;
993 senddata[pos++] = FUSB_TKN_PACKSYM | ((len + 2) & 0x1f);
995 senddata[pos++] = chip->send_head & 0xff;
996 senddata[pos++] = (chip->send_head >> 8) & 0xff;
998 memcpy(&senddata[pos], chip->send_load, len);
1001 senddata[pos++] = FUSB_TKN_JAMCRC;
1002 senddata[pos++] = FUSB_TKN_EOP;
1003 senddata[pos++] = FUSB_TKN_TXOFF;
1004 senddata[pos++] = FUSB_TKN_TXON;
1006 regmap_raw_write(chip->regmap, FUSB_REG_FIFO, senddata, pos);
1007 chip->tx_state = tx_busy;
1011 /* wait Tx result */
1015 return chip->tx_state;
1018 static void process_vdm_msg(struct fusb30x_chip *chip)
1020 u32 vdm_header = chip->rec_load[0];
1024 /* can't procee unstructed vdm msg */
1025 if (!GET_VDMHEAD_STRUCT_TYPE(vdm_header))
1028 switch (GET_VDMHEAD_CMD_TYPE(vdm_header)) {
1030 switch (GET_VDMHEAD_CMD(vdm_header)) {
1032 dev_info(chip->dev, "attention, dp_status %x\n",
1034 chip->notify.attention = 1;
1035 chip->vdm_state = 6;
1038 dev_warn(chip->dev, "rec unknown init vdm msg\n");
1043 switch (GET_VDMHEAD_CMD(vdm_header)) {
1044 case VDM_DISCOVERY_ID:
1045 chip->vdm_id = chip->rec_load[1];
1047 case VDM_DISCOVERY_SVIDS:
1048 for (i = 0; i < 6; i++) {
1049 tmp = (chip->rec_load[i + 1] >> 16) &
1052 chip->vdm_svid[i * 2] = tmp;
1053 chip->vdm_svid_num++;
1058 tmp = (chip->rec_load[i + 1] & 0x0000ffff);
1060 chip->vdm_svid[i * 2 + 1] = tmp;
1061 chip->vdm_svid_num++;
1067 case VDM_DISCOVERY_MODES:
1068 /* indicate there are some vdo modes */
1069 if (PD_HEADER_CNT(chip->rec_head) > 1) {
1071 * store mode config,
1072 * enter first mode default
1074 if (!((chip->rec_load[1] >> 8) & 0x3f)) {
1078 chip->notify.pin_assignment_support = 0;
1079 chip->notify.pin_assignment_def = 0;
1080 chip->notify.pin_assignment_support =
1081 (chip->rec_load[1] >> 8) & 0x3f;
1082 tmp = chip->notify.pin_assignment_support;
1083 for (i = 0; i < 6; i++) {
1089 chip->notify.pin_assignment_def = 0x20 >> i;
1093 case VDM_ENTER_MODE:
1096 case VDM_DP_STATUS_UPDATE:
1097 dev_dbg(chip->dev, "dp_status 0x%x\n",
1104 "DP config successful, pin_assignment 0x%x\n",
1105 chip->notify.pin_assignment_def);
1106 chip->notify.is_enter_mode = 1;
1113 dev_warn(chip->dev, "REC NACK for 0x%x\n",
1114 GET_VDMHEAD_CMD(vdm_header));
1116 chip->vdm_state = 0xff;
1121 static int vdm_send_discoveryid(struct fusb30x_chip *chip, int evt)
1125 switch (chip->vdm_send_state) {
1127 set_vdm_mesg(chip, VDM_DISCOVERY_ID, VDM_TYPE_INIT, 0);
1130 chip->vdm_send_state++;
1132 tmp = policy_send_data(chip);
1133 if (tmp == tx_success) {
1134 chip->vdm_send_state++;
1135 chip->timer_state = T_SENDER_RESPONSE;
1136 fusb_timer_start(&chip->timer_state_machine,
1138 } else if (tmp == tx_failed) {
1139 dev_warn(chip->dev, "VDM_DISCOVERY_ID send failed\n");
1140 /* disable auto_vdm_machine */
1141 chip->vdm_state = 0xff;
1144 if (chip->vdm_send_state != 2)
1147 if (evt & EVENT_TIMER_STATE) {
1148 dev_warn(chip->dev, "VDM_DISCOVERY_ID time out\n");
1149 chip->vdm_state = 0xff;
1150 chip->work_continue = 1;
1155 chip->vdm_send_state = 0;
1158 return -EINPROGRESS;
1161 static int vdm_send_discoverysvid(struct fusb30x_chip *chip, int evt)
1165 switch (chip->vdm_send_state) {
1167 set_vdm_mesg(chip, VDM_DISCOVERY_SVIDS, VDM_TYPE_INIT, 0);
1168 memset(chip->vdm_svid, 0, 12);
1169 chip->vdm_svid_num = 0;
1171 chip->vdm_send_state++;
1173 tmp = policy_send_data(chip);
1174 if (tmp == tx_success) {
1175 chip->vdm_send_state++;
1176 chip->timer_state = T_SENDER_RESPONSE;
1177 fusb_timer_start(&chip->timer_state_machine,
1179 } else if (tmp == tx_failed) {
1180 dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS send failed\n");
1181 /* disable auto_vdm_machine */
1182 chip->vdm_state = 0xff;
1185 if (chip->vdm_send_state != 2)
1188 if (evt & EVENT_TIMER_STATE) {
1189 dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS time out\n");
1190 chip->vdm_state = 0xff;
1191 chip->work_continue = 1;
1194 if (!chip->vdm_svid_num)
1196 chip->vdm_send_state = 0;
1199 return -EINPROGRESS;
1202 static int vdm_send_discoverymodes(struct fusb30x_chip *chip, int evt)
1206 if ((chip->val_tmp >> 1) != chip->vdm_svid_num) {
1207 switch (chip->vdm_send_state) {
1209 set_vdm_mesg(chip, VDM_DISCOVERY_MODES,
1212 chip->vdm_send_state++;
1214 tmp = policy_send_data(chip);
1215 if (tmp == tx_success) {
1216 chip->vdm_send_state++;
1217 chip->timer_state = T_SENDER_RESPONSE;
1218 fusb_timer_start(&chip->timer_state_machine,
1220 } else if (tmp == tx_failed) {
1222 "VDM_DISCOVERY_MODES send failed\n");
1223 chip->vdm_state = 0xff;
1226 if (chip->vdm_send_state != 2)
1229 if (evt & EVENT_TIMER_STATE) {
1231 "VDM_DISCOVERY_MODES time out\n");
1232 chip->vdm_state = 0xff;
1233 chip->work_continue = 1;
1236 if (!(chip->val_tmp & 1))
1238 chip->val_tmp &= 0xfe;
1240 chip->vdm_send_state = 0;
1241 chip->work_continue = 1;
1249 return -EINPROGRESS;
1252 static int vdm_send_entermode(struct fusb30x_chip *chip, int evt)
1256 switch (chip->vdm_send_state) {
1258 set_vdm_mesg(chip, VDM_ENTER_MODE, VDM_TYPE_INIT, 1);
1260 chip->vdm_send_state++;
1261 chip->notify.is_enter_mode = 0;
1263 tmp = policy_send_data(chip);
1264 if (tmp == tx_success) {
1265 chip->vdm_send_state++;
1266 chip->timer_state = T_SENDER_RESPONSE;
1267 fusb_timer_start(&chip->timer_state_machine,
1269 } else if (tmp == tx_failed) {
1270 dev_warn(chip->dev, "VDM_ENTER_MODE send failed\n");
1271 /* disable auto_vdm_machine */
1272 chip->vdm_state = 0xff;
1275 if (chip->vdm_send_state != 2)
1278 if (evt & EVENT_TIMER_STATE) {
1279 dev_warn(chip->dev, "VDM_ENTER_MODE time out\n");
1280 chip->vdm_state = 0xff;
1281 chip->work_continue = 1;
1287 chip->vdm_send_state = 0;
1290 return -EINPROGRESS;
1293 static int vdm_send_getdpstatus(struct fusb30x_chip *chip, int evt)
1297 switch (chip->vdm_send_state) {
1299 set_vdm_mesg(chip, VDM_DP_STATUS_UPDATE, VDM_TYPE_INIT, 1);
1301 chip->vdm_send_state++;
1303 tmp = policy_send_data(chip);
1304 if (tmp == tx_success) {
1305 chip->vdm_send_state++;
1306 chip->timer_state = T_SENDER_RESPONSE;
1307 fusb_timer_start(&chip->timer_state_machine,
1309 } else if (tmp == tx_failed) {
1311 "VDM_DP_STATUS_UPDATE send failed\n");
1312 /* disable auto_vdm_machine */
1313 chip->vdm_state = 0xff;
1316 if (chip->vdm_send_state != 2)
1319 if (evt & EVENT_TIMER_STATE) {
1320 dev_warn(chip->dev, "VDM_DP_STATUS_UPDATE time out\n");
1321 chip->vdm_state = 0xff;
1322 chip->work_continue = 1;
1328 chip->vdm_send_state = 0;
1331 return -EINPROGRESS;
1334 static int vdm_send_dpconfig(struct fusb30x_chip *chip, int evt)
1338 switch (chip->vdm_send_state) {
1340 set_vdm_mesg(chip, VDM_DP_CONFIG, VDM_TYPE_INIT, 0);
1342 chip->vdm_send_state++;
1344 tmp = policy_send_data(chip);
1345 if (tmp == tx_success) {
1346 chip->vdm_send_state++;
1347 chip->timer_state = T_SENDER_RESPONSE;
1348 fusb_timer_start(&chip->timer_state_machine,
1350 } else if (tmp == tx_failed) {
1351 dev_warn(chip->dev, "vdm_send_dpconfig send failed\n");
1352 /* disable auto_vdm_machine */
1353 chip->vdm_state = 0xff;
1356 if (chip->vdm_send_state != 2)
1359 if (evt & EVENT_TIMER_STATE) {
1360 dev_warn(chip->dev, "vdm_send_dpconfig time out\n");
1361 chip->vdm_state = 0xff;
1362 chip->work_continue = 1;
1368 chip->vdm_send_state = 0;
1371 return -EINPROGRESS;
1374 static void auto_vdm_machine(struct fusb30x_chip *chip, int evt)
1376 switch (chip->vdm_state) {
1378 if (vdm_send_discoveryid(chip, evt))
1383 if (vdm_send_discoverysvid(chip, evt))
1388 if (vdm_send_discoverymodes(chip, evt))
1393 if (vdm_send_entermode(chip, evt))
1398 if (vdm_send_dpconfig(chip, evt))
1400 chip->vdm_state = 6;
1403 if (vdm_send_getdpstatus(chip, evt))
1408 platform_fusb_notify(chip);
1413 static void fusb_state_disabled(struct fusb30x_chip *chip, int evt)
1415 platform_fusb_notify(chip);
1418 static void fusb_state_unattached(struct fusb30x_chip *chip, int evt)
1420 chip->notify.is_cc_connected = 0;
1421 if ((evt & EVENT_CC) && chip->cc_state) {
1422 if (chip->cc_state & 0x04)
1423 set_state(chip, attach_wait_sink);
1425 set_state(chip, attach_wait_source);
1427 tcpm_get_cc(chip, &chip->cc1, &chip->cc2);
1428 chip->debounce_cnt = 0;
1429 chip->timer_mux = 2;
1430 fusb_timer_start(&chip->timer_mux_machine, chip->timer_mux);
1434 static void fusb_state_attach_wait_sink(struct fusb30x_chip *chip, int evt)
1438 if (evt & EVENT_TIMER_MUX) {
1439 tcpm_get_cc(chip, &cc1, &cc2);
1441 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1442 chip->debounce_cnt++;
1446 chip->debounce_cnt = 0;
1449 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1450 if ((chip->cc1 != chip->cc2) &&
1451 ((!chip->cc1) || (!chip->cc2))) {
1452 set_state(chip, attached_sink);
1454 set_state_unattached(chip);
1459 chip->timer_mux = 2;
1460 fusb_timer_start(&chip->timer_mux_machine,
1465 static void fusb_state_attach_wait_source(struct fusb30x_chip *chip, int evt)
1469 if (evt & EVENT_TIMER_MUX) {
1470 tcpm_get_cc(chip, &cc1, &cc2);
1472 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1473 if (chip->debounce_cnt++ == 0)
1474 platform_set_vbus_lvl_enable(chip, 1, 0);
1478 chip->debounce_cnt = 0;
1481 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1482 if (((!chip->cc1) || (!chip->cc2)) &&
1483 ((chip->cc1 == TYPEC_CC_VOLT_RD) ||
1484 (chip->cc2 == TYPEC_CC_VOLT_RD))) {
1485 set_state(chip, attached_source);
1487 set_state_unattached(chip);
1493 chip->timer_mux = 2;
1494 fusb_timer_start(&chip->timer_mux_machine,
1499 static void fusb_state_attached_source(struct fusb30x_chip *chip, int evt)
1501 tcpm_set_polarity(chip, !(chip->cc_state & 0x01));
1502 tcpm_set_vconn(chip, 1);
1504 chip->notify.is_cc_connected = 1;
1505 if (chip->cc_state & 0x01)
1506 chip->cc_polarity = 0;
1508 chip->cc_polarity = 1;
1510 chip->notify.power_role = 1;
1511 chip->notify.data_role = 1;
1512 chip->hardrst_count = 0;
1513 set_state(chip, policy_src_startup);
1514 dev_info(chip->dev, "CC connected in %d as DFP\n", chip->cc_polarity);
1517 static void fusb_state_attached_sink(struct fusb30x_chip *chip, int evt)
1519 chip->notify.is_cc_connected = 1;
1520 if (chip->cc_state & 0x01)
1521 chip->cc_polarity = 0;
1523 chip->cc_polarity = 1;
1525 chip->notify.power_role = 0;
1526 chip->notify.data_role = 0;
1527 chip->hardrst_count = 0;
1528 set_state(chip, policy_snk_startup);
1529 dev_info(chip->dev, "CC connected in %d as UFP\n", chip->cc_polarity);
1532 static void fusb_state_src_startup(struct fusb30x_chip *chip, int evt)
1534 chip->caps_counter = 0;
1535 chip->notify.is_pd_connected = 0;
1537 chip->vdm_state = 0;
1538 chip->vdm_substate = 0;
1539 chip->vdm_send_state = 0;
1542 memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1544 tcpm_set_msg_header(chip);
1545 tcpm_set_polarity(chip, chip->cc_polarity);
1546 tcpm_set_rx_enable(chip, 1);
1548 set_state(chip, policy_src_send_caps);
1551 static void fusb_state_src_discovery(struct fusb30x_chip *chip, int evt)
1553 switch (chip->sub_state) {
1555 chip->caps_counter++;
1557 if (chip->caps_counter < N_CAPS_COUNT) {
1558 chip->timer_state = T_TYPEC_SEND_SOURCECAP;
1559 fusb_timer_start(&chip->timer_state_machine,
1561 chip->sub_state = 1;
1563 set_state(chip, disabled);
1567 if (evt & EVENT_TIMER_STATE) {
1568 set_state(chip, policy_src_send_caps);
1569 } else if ((evt & EVENT_TIMER_MUX) &&
1570 (chip->hardrst_count > N_HARDRESET_COUNT)) {
1571 if (chip->notify.is_pd_connected)
1572 set_state(chip, error_recovery);
1574 set_state(chip, disabled);
1580 static void fusb_state_src_send_caps(struct fusb30x_chip *chip, int evt)
1584 switch (chip->sub_state) {
1586 set_mesg(chip, DMT_SOURCECAPABILITIES, DATAMESSAGE);
1587 chip->sub_state = 1;
1588 chip->tx_state = tx_idle;
1591 tmp = policy_send_data(chip);
1593 if (tmp == tx_success) {
1594 chip->hardrst_count = 0;
1595 chip->caps_counter = 0;
1596 chip->timer_state = T_SENDER_RESPONSE;
1597 fusb_timer_start(&chip->timer_state_machine,
1599 chip->timer_mux = T_DISABLED;
1601 } else if (tmp == tx_failed) {
1602 set_state(chip, policy_src_discovery);
1606 if (!(evt & FLAG_EVENT))
1609 if (evt & EVENT_RX) {
1610 if ((PD_HEADER_CNT(chip->rec_head) == 1) &&
1611 (PD_HEADER_TYPE(chip->rec_head) == DMT_REQUEST)) {
1612 set_state(chip, policy_src_negotiate_cap);
1614 set_state(chip, policy_src_send_softrst);
1616 } else if (evt & EVENT_TIMER_STATE) {
1617 if (chip->hardrst_count <= N_HARDRESET_COUNT)
1618 set_state(chip, policy_src_send_hardrst);
1620 set_state(chip, disabled);
1621 } else if (evt & EVENT_TIMER_MUX) {
1622 if (chip->notify.is_pd_connected)
1623 set_state(chip, disabled);
1625 set_state(chip, error_recovery);
1631 static void fusb_state_src_negotiate_cap(struct fusb30x_chip *chip, int evt)
1636 tmp = (chip->rec_load[0] >> 28) & 0x07;
1637 if (tmp > chip->n_caps_used)
1638 set_state(chip, policy_src_cap_response);
1640 set_state(chip, policy_src_transition_supply);
1643 static void fusb_state_src_transition_supply(struct fusb30x_chip *chip,
1648 switch (chip->sub_state) {
1650 set_mesg(chip, CMT_ACCEPT, CONTROLMESSAGE);
1651 chip->tx_state = tx_idle;
1655 tmp = policy_send_data(chip);
1656 if (tmp == tx_success) {
1657 chip->timer_state = T_SRC_TRANSITION;
1659 fusb_timer_start(&chip->timer_state_machine,
1661 } else if (tmp == tx_failed) {
1662 set_state(chip, policy_src_send_softrst);
1666 if (evt & EVENT_TIMER_STATE) {
1667 chip->notify.is_pd_connected = 1;
1668 platform_set_vbus_lvl_enable(chip, 1, 0);
1669 set_mesg(chip, CMT_PS_RDY, CONTROLMESSAGE);
1670 chip->tx_state = tx_idle;
1672 chip->work_continue = 1;
1676 tmp = policy_send_data(chip);
1677 if (tmp == tx_success) {
1679 "PD connected as DFP, supporting 5V\n");
1680 set_state(chip, policy_src_ready);
1681 } else if (tmp == tx_failed) {
1682 set_state(chip, policy_src_send_softrst);
1688 static void fusb_state_src_cap_response(struct fusb30x_chip *chip, int evt)
1692 switch (chip->sub_state) {
1694 set_mesg(chip, CMT_REJECT, CONTROLMESSAGE);
1695 chip->tx_state = tx_idle;
1699 tmp = policy_send_data(chip);
1700 if (tmp == tx_success) {
1701 if (chip->notify.is_pd_connected) {
1703 "PD connected as DFP, supporting 5V\n");
1704 set_state(chip, policy_src_ready);
1706 set_state(chip, policy_src_send_hardrst);
1708 } else if (tmp == tx_failed) {
1709 set_state(chip, policy_src_send_softrst);
1715 static void fusb_state_src_transition_default(struct fusb30x_chip *chip,
1718 switch (chip->sub_state) {
1720 chip->notify.is_pd_connected = 0;
1721 platform_set_vbus_lvl_enable(chip, 0, 0);
1722 if (chip->notify.data_role)
1723 regmap_update_bits(chip->regmap,
1726 SWITCHES1_DATAROLE);
1728 regmap_update_bits(chip->regmap,
1733 chip->timer_state = T_SRC_RECOVER;
1734 fusb_timer_start(&chip->timer_state_machine,
1739 if (evt & EVENT_TIMER_STATE) {
1740 platform_set_vbus_lvl_enable(chip, 1, 0);
1741 chip->timer_mux = T_NO_RESPONSE;
1742 fusb_timer_start(&chip->timer_mux_machine,
1744 set_state(chip, policy_src_startup);
1745 dev_dbg(chip->dev, "reset over-> src startup\n");
1751 static void fusb_state_src_ready(struct fusb30x_chip *chip, int evt)
1753 if (evt & EVENT_RX) {
1754 if ((PD_HEADER_CNT(chip->rec_head)) &&
1755 (PD_HEADER_TYPE(chip->rec_head) == DMT_VENDERDEFINED)) {
1756 process_vdm_msg(chip);
1757 chip->work_continue = 1;
1758 chip->timer_state = T_DISABLED;
1762 /* TODO: swap function would be added here later on*/
1764 if (!chip->partner_cap[0])
1765 set_state(chip, policy_src_get_sink_caps);
1767 auto_vdm_machine(chip, evt);
1770 static void fusb_state_src_get_sink_cap(struct fusb30x_chip *chip, int evt)
1774 switch (chip->sub_state) {
1776 set_mesg(chip, CMT_GETSINKCAP, CONTROLMESSAGE);
1777 chip->tx_state = tx_idle;
1781 tmp = policy_send_data(chip);
1782 if (tmp == tx_success) {
1783 chip->timer_state = T_SENDER_RESPONSE;
1785 fusb_timer_start(&chip->timer_state_machine,
1787 } else if (tmp == tx_failed) {
1788 set_state(chip, policy_src_send_softrst);
1791 if (!(evt & FLAG_EVENT))
1794 if (evt & EVENT_RX) {
1795 if ((PD_HEADER_CNT(chip->rec_head)) &&
1796 (PD_HEADER_TYPE(chip->rec_head) ==
1797 DMT_SINKCAPABILITIES)) {
1799 tmp < PD_HEADER_CNT(chip->rec_head);
1801 chip->partner_cap[tmp] =
1802 chip->rec_load[tmp];
1804 set_state(chip, policy_src_ready);
1806 chip->partner_cap[0] = 0xffffffff;
1807 set_state(chip, policy_src_ready);
1809 } else if (evt & EVENT_TIMER_STATE) {
1810 dev_warn(chip->dev, "Get sink cap time out\n");
1811 chip->partner_cap[0] = 0xffffffff;
1812 set_state(chip, policy_src_ready);
1817 static void fusb_state_src_send_hardreset(struct fusb30x_chip *chip, int evt)
1821 switch (chip->sub_state) {
1823 chip->tx_state = tx_idle;
1827 tmp = policy_send_hardrst(chip, evt);
1828 if (tmp == tx_success) {
1829 chip->hardrst_count++;
1830 set_state(chip, policy_src_transition_default);
1831 } else if (tmp == tx_failed) {
1832 /* can't reach here */
1833 set_state(chip, error_recovery);
1839 static void fusb_state_src_send_softreset(struct fusb30x_chip *chip, int evt)
1843 switch (chip->sub_state) {
1845 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
1846 chip->tx_state = tx_idle;
1850 tmp = policy_send_data(chip);
1851 if (tmp == tx_success) {
1852 chip->timer_state = T_SENDER_RESPONSE;
1854 fusb_timer_start(&chip->timer_state_machine,
1856 } else if (tmp == tx_failed) {
1857 set_state(chip, policy_src_send_hardrst);
1860 if (!(evt & FLAG_EVENT))
1863 if (evt & EVENT_RX) {
1864 if ((!PD_HEADER_CNT(chip->rec_head)) &&
1865 (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
1866 set_state(chip, policy_src_send_caps);
1867 } else if (evt & EVENT_TIMER_STATE) {
1868 set_state(chip, policy_src_send_hardrst);
1874 static void fusb_state_snk_startup(struct fusb30x_chip *chip, int evt)
1876 chip->notify.is_pd_connected = 0;
1878 chip->vdm_state = 0;
1879 chip->vdm_substate = 0;
1880 chip->vdm_send_state = 0;
1882 chip->pos_power = 0;
1884 memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1886 tcpm_set_msg_header(chip);
1887 tcpm_set_polarity(chip, chip->cc_polarity);
1888 tcpm_set_rx_enable(chip, 1);
1889 set_state(chip, policy_snk_discovery);
1892 static void fusb_state_snk_discovery(struct fusb30x_chip *chip, int evt)
1894 set_state(chip, policy_snk_wait_caps);
1895 chip->timer_state = T_TYPEC_SINK_WAIT_CAP;
1896 fusb_timer_start(&chip->timer_state_machine,
1900 static void fusb_state_snk_wait_caps(struct fusb30x_chip *chip, int evt)
1902 if (evt & EVENT_RX) {
1903 if (PD_HEADER_CNT(chip->rec_head) &&
1904 PD_HEADER_TYPE(chip->rec_head) == DMT_SOURCECAPABILITIES) {
1905 chip->timer_mux = T_DISABLED;
1906 set_state(chip, policy_snk_evaluate_caps);
1908 } else if (evt & EVENT_TIMER_STATE) {
1909 if (chip->hardrst_count <= N_HARDRESET_COUNT)
1910 set_state(chip, policy_snk_send_hardrst);
1912 set_state(chip, disabled);
1913 } else if ((evt & EVENT_TIMER_MUX) &&
1914 (chip->hardrst_count > N_HARDRESET_COUNT)) {
1915 if (chip->notify.is_pd_connected)
1916 set_state(chip, error_recovery);
1918 set_state(chip, disabled);
1922 static void fusb_state_snk_evaluate_caps(struct fusb30x_chip *chip, int evt)
1926 chip->hardrst_count = 0;
1927 chip->pos_power = 0;
1929 for (tmp = 0; tmp < PD_HEADER_CNT(chip->rec_head); tmp++) {
1930 switch (CAP_POWER_TYPE(chip->rec_load[tmp])) {
1933 if (CAP_FPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1934 chip->pos_power = tmp + 1;
1938 if (CAP_VPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1939 chip->pos_power = tmp + 1;
1942 /* not meet battery caps */
1946 fusb302_set_pos_power_by_charge_ic(chip);
1948 if ((!chip->pos_power) || (chip->pos_power > 7)) {
1949 chip->pos_power = 0;
1950 set_state(chip, policy_snk_wait_caps);
1952 set_state(chip, policy_snk_select_cap);
1956 static void fusb_state_snk_select_cap(struct fusb30x_chip *chip, int evt)
1960 switch (chip->sub_state) {
1962 set_mesg(chip, DMT_REQUEST, DATAMESSAGE);
1963 chip->sub_state = 1;
1964 chip->tx_state = tx_idle;
1967 tmp = policy_send_data(chip);
1969 if (tmp == tx_success) {
1970 chip->timer_state = T_SENDER_RESPONSE;
1971 fusb_timer_start(&chip->timer_state_machine,
1974 } else if (tmp == tx_failed) {
1975 set_state(chip, policy_snk_discovery);
1979 if (!(evt & FLAG_EVENT))
1982 if (evt & EVENT_RX) {
1983 if (!PD_HEADER_CNT(chip->rec_head)) {
1984 switch (PD_HEADER_TYPE(chip->rec_head)) {
1987 policy_snk_transition_sink);
1988 chip->timer_state = T_PS_TRANSITION;
1989 fusb_timer_start(&chip->timer_state_machine,
1994 if (chip->notify.is_pd_connected) {
1996 "PD connected as UFP, fetching 5V\n");
2001 policy_snk_wait_caps);
2003 * make sure don't send
2004 * hard reset to prevent
2007 chip->hardrst_count =
2008 N_HARDRESET_COUNT + 1;
2015 } else if (evt & EVENT_TIMER_STATE) {
2016 set_state(chip, policy_snk_send_hardrst);
2022 static void fusb_state_snk_transition_sink(struct fusb30x_chip *chip, int evt)
2024 if (evt & EVENT_RX) {
2025 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2026 (PD_HEADER_TYPE(chip->rec_head) == CMT_PS_RDY)) {
2027 chip->notify.is_pd_connected = 1;
2029 "PD connected as UFP, fetching 5V\n");
2030 set_state(chip, policy_snk_ready);
2031 } else if ((PD_HEADER_CNT(chip->rec_head)) &&
2032 (PD_HEADER_TYPE(chip->rec_head) ==
2033 DMT_SOURCECAPABILITIES)) {
2034 set_state(chip, policy_snk_evaluate_caps);
2036 } else if (evt & EVENT_TIMER_STATE) {
2037 set_state(chip, policy_snk_send_hardrst);
2041 static void fusb_state_snk_transition_default(struct fusb30x_chip *chip,
2044 switch (chip->sub_state) {
2046 chip->notify.is_pd_connected = 0;
2047 chip->timer_mux = T_NO_RESPONSE;
2048 fusb_timer_start(&chip->timer_mux_machine,
2050 chip->timer_state = T_PS_HARD_RESET_MAX + T_SAFE_0V;
2051 fusb_timer_start(&chip->timer_state_machine,
2053 if (chip->notify.data_role)
2054 tcpm_set_msg_header(chip);
2058 if (!tcpm_check_vbus(chip)) {
2060 chip->timer_state = T_SRC_RECOVER_MAX + T_SRC_TURN_ON;
2061 fusb_timer_start(&chip->timer_state_machine,
2063 } else if (evt & EVENT_TIMER_STATE) {
2064 set_state(chip, policy_snk_startup);
2068 if (tcpm_check_vbus(chip)) {
2069 chip->timer_state = T_DISABLED;
2070 set_state(chip, policy_snk_startup);
2071 } else if (evt & EVENT_TIMER_STATE) {
2072 set_state(chip, policy_snk_startup);
2078 static void fusb_state_snk_ready(struct fusb30x_chip *chip, int evt)
2080 /* TODO: snk_ready_function would be added later on*/
2081 platform_fusb_notify(chip);
2084 static void fusb_state_snk_send_hardreset(struct fusb30x_chip *chip, int evt)
2088 switch (chip->sub_state) {
2090 chip->tx_state = tx_idle;
2093 tmp = policy_send_hardrst(chip, evt);
2094 if (tmp == tx_success) {
2095 chip->hardrst_count++;
2096 set_state(chip, policy_snk_transition_default);
2097 } else if (tmp == tx_failed) {
2098 set_state(chip, error_recovery);
2104 static void fusb_state_snk_send_softreset(struct fusb30x_chip *chip, int evt)
2108 switch (chip->sub_state) {
2110 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
2111 chip->tx_state = tx_idle;
2114 tmp = policy_send_data(chip);
2115 if (tmp == tx_success) {
2116 chip->timer_state = T_SENDER_RESPONSE;
2118 fusb_timer_start(&chip->timer_state_machine,
2120 } else if (tmp == tx_failed) {
2121 /* can't reach here */
2122 set_state(chip, policy_snk_send_hardrst);
2125 if (!(evt & FLAG_EVENT))
2128 if (evt & EVENT_RX) {
2129 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2130 (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
2131 set_state(chip, policy_snk_wait_caps);
2132 } else if (evt & EVENT_TIMER_STATE) {
2133 set_state(chip, policy_snk_send_hardrst);
2139 static void state_machine_typec(struct fusb30x_chip *chip)
2144 tcpc_alert(chip, &evt);
2145 mux_alert(chip, &evt);
2149 if (chip->notify.is_cc_connected) {
2150 if (evt & EVENT_CC) {
2151 if ((chip->cc_state & 0x04) &&
2152 (chip->conn_state !=
2153 policy_snk_transition_default)) {
2154 if (!tcpm_check_vbus(chip))
2155 set_state_unattached(chip);
2156 } else if (chip->conn_state !=
2157 policy_src_transition_default) {
2158 tcpm_get_cc(chip, &cc1, &cc2);
2159 if (!(chip->cc_state & 0x01))
2161 if (cc1 == TYPEC_CC_VOLT_OPEN)
2162 set_state_unattached(chip);
2167 if (evt & EVENT_RX) {
2168 tcpm_get_message(chip);
2169 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2170 (PD_HEADER_TYPE(chip->rec_head) == CMT_SOFTRESET)) {
2171 if (chip->notify.power_role)
2172 set_state(chip, policy_src_send_softrst);
2174 set_state(chip, policy_snk_send_softrst);
2178 if (evt & EVENT_TX) {
2179 if (chip->tx_state == tx_success)
2182 switch (chip->conn_state) {
2184 fusb_state_disabled(chip, evt);
2186 case error_recovery:
2187 set_state_unattached(chip);
2190 fusb_state_unattached(chip, evt);
2192 case attach_wait_sink:
2193 fusb_state_attach_wait_sink(chip, evt);
2195 case attach_wait_source:
2196 fusb_state_attach_wait_source(chip, evt);
2198 case attached_source:
2199 fusb_state_attached_source(chip, evt);
2202 fusb_state_attached_sink(chip, evt);
2205 /* POWER DELIVERY */
2206 case policy_src_startup:
2207 fusb_state_src_startup(chip, evt);
2209 case policy_src_discovery:
2210 fusb_state_src_discovery(chip, evt);
2212 case policy_src_send_caps:
2213 fusb_state_src_send_caps(chip, evt);
2214 if (chip->conn_state != policy_src_negotiate_cap)
2216 case policy_src_negotiate_cap:
2217 fusb_state_src_negotiate_cap(chip, evt);
2219 case policy_src_transition_supply:
2220 fusb_state_src_transition_supply(chip, evt);
2222 case policy_src_cap_response:
2223 fusb_state_src_cap_response(chip, evt);
2225 case policy_src_transition_default:
2226 fusb_state_src_transition_default(chip, evt);
2228 case policy_src_ready:
2229 fusb_state_src_ready(chip, evt);
2231 case policy_src_get_sink_caps:
2232 fusb_state_src_get_sink_cap(chip, evt);
2234 case policy_src_send_hardrst:
2235 fusb_state_src_send_hardreset(chip, evt);
2237 case policy_src_send_softrst:
2238 fusb_state_src_send_softreset(chip, evt);
2242 case policy_snk_startup:
2243 fusb_state_snk_startup(chip, evt);
2245 case policy_snk_discovery:
2246 fusb_state_snk_discovery(chip, evt);
2248 case policy_snk_wait_caps:
2249 fusb_state_snk_wait_caps(chip, evt);
2251 case policy_snk_evaluate_caps:
2252 fusb_state_snk_evaluate_caps(chip, evt);
2254 case policy_snk_select_cap:
2255 fusb_state_snk_select_cap(chip, evt);
2257 case policy_snk_transition_sink:
2258 fusb_state_snk_transition_sink(chip, evt);
2260 case policy_snk_transition_default:
2261 fusb_state_snk_transition_default(chip, evt);
2263 case policy_snk_ready:
2264 fusb_state_snk_ready(chip, evt);
2266 case policy_snk_send_hardrst:
2267 fusb_state_snk_send_hardreset(chip, evt);
2269 case policy_snk_send_softrst:
2270 fusb_state_snk_send_softreset(chip, evt);
2278 if (chip->work_continue) {
2279 queue_work(chip->fusb30x_wq, &chip->work);
2283 if (!platform_get_device_irq_state(chip))
2284 fusb_irq_enable(chip);
2286 queue_work(chip->fusb30x_wq, &chip->work);
2289 static irqreturn_t cc_interrupt_handler(int irq, void *dev_id)
2291 struct fusb30x_chip *chip = dev_id;
2293 queue_work(chip->fusb30x_wq, &chip->work);
2294 fusb_irq_disable(chip);
2298 static int fusb_initialize_gpio(struct fusb30x_chip *chip)
2300 chip->gpio_int = devm_gpiod_get_optional(chip->dev, "int-n", GPIOD_IN);
2301 if (IS_ERR(chip->gpio_int))
2302 return PTR_ERR(chip->gpio_int);
2304 /* some board support vbus with other ways */
2305 chip->gpio_vbus_5v = devm_gpiod_get_optional(chip->dev, "vbus-5v",
2307 if (IS_ERR(chip->gpio_vbus_5v))
2309 "Could not get named GPIO for VBus5V!\n");
2311 gpiod_set_raw_value(chip->gpio_vbus_5v, 0);
2313 chip->gpio_vbus_other = devm_gpiod_get_optional(chip->dev,
2316 if (IS_ERR(chip->gpio_vbus_other))
2318 "Could not get named GPIO for VBusOther!\n");
2320 gpiod_set_raw_value(chip->gpio_vbus_other, 0);
2322 chip->gpio_discharge = devm_gpiod_get_optional(chip->dev, "discharge",
2324 if (IS_ERR(chip->gpio_discharge)) {
2326 "Could not get named GPIO for discharge!\n");
2327 chip->gpio_discharge = NULL;
2333 static enum hrtimer_restart fusb_timer_handler(struct hrtimer *timer)
2337 for (i = 0; i < fusb30x_port_used; i++) {
2338 if (timer == &fusb30x_port_info[i]->timer_state_machine) {
2339 if (fusb30x_port_info[i]->timer_state != T_DISABLED)
2340 fusb30x_port_info[i]->timer_state = 0;
2344 if (timer == &fusb30x_port_info[i]->timer_mux_machine) {
2345 if (fusb30x_port_info[i]->timer_mux != T_DISABLED)
2346 fusb30x_port_info[i]->timer_mux = 0;
2351 if (i != fusb30x_port_used)
2352 queue_work(fusb30x_port_info[i]->fusb30x_wq,
2353 &fusb30x_port_info[i]->work);
2355 return HRTIMER_NORESTART;
2358 static void fusb_initialize_timer(struct fusb30x_chip *chip)
2360 hrtimer_init(&chip->timer_state_machine, CLOCK_MONOTONIC,
2362 chip->timer_state_machine.function = fusb_timer_handler;
2364 hrtimer_init(&chip->timer_mux_machine, CLOCK_MONOTONIC,
2366 chip->timer_mux_machine.function = fusb_timer_handler;
2368 chip->timer_state = T_DISABLED;
2369 chip->timer_mux = T_DISABLED;
2372 static void fusb302_work_func(struct work_struct *work)
2374 struct fusb30x_chip *chip;
2376 chip = container_of(work, struct fusb30x_chip, work);
2377 state_machine_typec(chip);
2380 static int fusb30x_probe(struct i2c_client *client,
2381 const struct i2c_device_id *id)
2383 struct fusb30x_chip *chip;
2384 struct PD_CAP_INFO *pd_cap_info;
2387 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
2391 if (fusb30x_port_used == 0xff)
2394 chip->port_num = fusb30x_port_used++;
2395 fusb30x_port_info[chip->port_num] = chip;
2397 chip->dev = &client->dev;
2398 chip->regmap = devm_regmap_init_i2c(client, &fusb302_regmap_config);
2399 if (IS_ERR(chip->regmap)) {
2400 dev_err(&client->dev, "Failed to allocate regmap!\n");
2401 return PTR_ERR(chip->regmap);
2404 ret = fusb_initialize_gpio(chip);
2408 fusb_initialize_timer(chip);
2410 chip->fusb30x_wq = create_workqueue("fusb302_wq");
2411 INIT_WORK(&chip->work, fusb302_work_func);
2414 tcpm_set_rx_enable(chip, 0);
2415 chip->conn_state = unattached;
2416 tcpm_set_cc(chip, FUSB_MODE_DRP);
2418 chip->n_caps_used = 1;
2419 chip->source_power_supply[0] = 0x64;
2420 chip->source_max_current[0] = 0x96;
2423 * these two variable should be 1 if support DRP,
2424 * but now we do not support swap,
2425 * it will be blanked in future
2427 pd_cap_info = &chip->pd_cap_info;
2428 pd_cap_info->dual_role_power = 0;
2429 pd_cap_info->data_role_swap = 0;
2431 pd_cap_info->externally_powered = 1;
2432 pd_cap_info->usb_suspend_support = 0;
2433 pd_cap_info->usb_communications_cap = 0;
2434 pd_cap_info->supply_type = 0;
2435 pd_cap_info->peak_current = 0;
2437 chip->extcon = devm_extcon_dev_allocate(&client->dev, fusb302_cable);
2438 if (IS_ERR(chip->extcon)) {
2439 dev_err(&client->dev, "allocat extcon failed\n");
2440 return PTR_ERR(chip->extcon);
2443 ret = devm_extcon_dev_register(&client->dev, chip->extcon);
2445 dev_err(&client->dev, "failed to register extcon: %d\n",
2450 ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2451 EXTCON_PROP_USB_TYPEC_POLARITY);
2453 dev_err(&client->dev,
2454 "failed to set USB property capability: %d\n",
2459 ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2460 EXTCON_PROP_USB_TYPEC_POLARITY);
2462 dev_err(&client->dev,
2463 "failed to set USB_HOST property capability: %d\n",
2468 ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2469 EXTCON_PROP_USB_TYPEC_POLARITY);
2471 dev_err(&client->dev,
2472 "failed to set DISP_DP property capability: %d\n",
2477 ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2478 EXTCON_PROP_USB_SS);
2480 dev_err(&client->dev,
2481 "failed to set USB USB_SS property capability: %d\n",
2486 ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2487 EXTCON_PROP_USB_SS);
2489 dev_err(&client->dev,
2490 "failed to set USB_HOST USB_SS property capability: %d\n",
2495 ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2496 EXTCON_PROP_USB_SS);
2498 dev_err(&client->dev,
2499 "failed to set DISP_DP USB_SS property capability: %d\n",
2504 ret = extcon_set_property_capability(chip->extcon, EXTCON_CHG_USB_FAST,
2505 EXTCON_PROP_USB_TYPEC_POLARITY);
2507 dev_err(&client->dev,
2508 "failed to set USB_PD property capability: %d\n", ret);
2512 i2c_set_clientdata(client, chip);
2514 spin_lock_init(&chip->irq_lock);
2515 chip->enable_irq = 1;
2517 chip->gpio_int_irq = gpiod_to_irq(chip->gpio_int);
2518 if (chip->gpio_int_irq < 0) {
2519 dev_err(&client->dev,
2520 "Unable to request IRQ for INT_N GPIO! %d\n",
2522 ret = chip->gpio_int_irq;
2526 ret = devm_request_threaded_irq(&client->dev,
2529 cc_interrupt_handler,
2530 IRQF_ONESHOT | IRQF_TRIGGER_LOW,
2534 dev_err(&client->dev, "irq request failed\n");
2538 dev_info(chip->dev, "port %d probe success\n", chip->port_num);
2543 destroy_workqueue(chip->fusb30x_wq);
2547 static int fusb30x_remove(struct i2c_client *client)
2549 struct fusb30x_chip *chip = i2c_get_clientdata(client);
2551 destroy_workqueue(chip->fusb30x_wq);
2555 static void fusb30x_shutdown(struct i2c_client *client)
2557 struct fusb30x_chip *chip = i2c_get_clientdata(client);
2559 if (chip->gpio_vbus_5v)
2560 gpiod_set_value(chip->gpio_vbus_5v, 0);
2561 if (chip->gpio_discharge) {
2562 gpiod_set_value(chip->gpio_discharge, 1);
2564 gpiod_set_value(chip->gpio_discharge, 0);
2568 static const struct of_device_id fusb30x_dt_match[] = {
2569 { .compatible = FUSB30X_I2C_DEVICETREE_NAME },
2572 MODULE_DEVICE_TABLE(of, fusb30x_dt_match);
2574 static const struct i2c_device_id fusb30x_i2c_device_id[] = {
2575 { FUSB30X_I2C_DRIVER_NAME, 0 },
2578 MODULE_DEVICE_TABLE(i2c, fusb30x_i2c_device_id);
2580 static struct i2c_driver fusb30x_driver = {
2582 .name = FUSB30X_I2C_DRIVER_NAME,
2583 .of_match_table = of_match_ptr(fusb30x_dt_match),
2585 .probe = fusb30x_probe,
2586 .remove = fusb30x_remove,
2587 .shutdown = fusb30x_shutdown,
2588 .id_table = fusb30x_i2c_device_id,
2591 module_i2c_driver(fusb30x_driver);
2593 MODULE_LICENSE("GPL");
2594 MODULE_AUTHOR("zain wang <zain.wang@rock-chips.com>");
2595 MODULE_DESCRIPTION("fusb302 typec pd driver");