drivers/mfd/fusb302.c

   1 /*
   2  * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd
   3  * Author: Zain Wang <zain.wang@rock-chips.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * Some ideas are from chrome ec and fairchild GPL fusb302 driver.
  10  */
  11
  12 #include <linux/delay.h>
  13 #include <linux/extcon.h>
  14 #include <linux/freezer.h>
  15 #include <linux/gpio.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/module.h>
  18 #include <linux/of_gpio.h>
  19 #include <linux/regmap.h>
  20 #include <linux/power_supply.h>
  21
  22 #include "fusb302.h"
  23
  24 #define FUSB302_MAX_REG         (FUSB_REG_FIFO + 50)
  25 #define FUSB_MS_TO_NS(x)        ((s64)x * 1000 * 1000)
  26
  27 #define FUSB_MODE_DRP           0
  28 #define FUSB_MODE_UFP           1
  29 #define FUSB_MODE_DFP           2
  30 #define FUSB_MODE_ASS           3
  31
  32 #define TYPEC_CC_VOLT_OPEN      0
  33 #define TYPEC_CC_VOLT_RA        1
  34 #define TYPEC_CC_VOLT_RD        2
  35 #define TYPEC_CC_VOLT_RP        3
  36
  37 #define EVENT_CC                BIT(0)
  38 #define EVENT_RX                BIT(1)
  39 #define EVENT_TX                BIT(2)
  40 #define EVENT_REC_RESET         BIT(3)
  41 #define EVENT_WORK_CONTINUE     BIT(5)
  42 #define EVENT_TIMER_MUX         BIT(6)
  43 #define EVENT_TIMER_STATE       BIT(7)
  44 #define FLAG_EVENT              (EVENT_RX | EVENT_TIMER_MUX | \
  45                                  EVENT_TIMER_STATE)
  46
  47 #define PIN_MAP_A               BIT(0)
  48 #define PIN_MAP_B               BIT(1)
  49 #define PIN_MAP_C               BIT(2)
  50 #define PIN_MAP_D               BIT(3)
  51 #define PIN_MAP_E               BIT(4)
  52 #define PIN_MAP_F               BIT(5)
  53
  54 static u8 fusb30x_port_used;
  55 static struct fusb30x_chip *fusb30x_port_info[256];
  56
  57 static bool is_write_reg(struct device *dev, unsigned int reg)
  58 {
  59         if (reg >= FUSB_REG_FIFO)
  60                 return true;
  61         else
  62                 return ((reg < (FUSB_REG_CONTROL4 + 1)) && (reg > 0x01)) ?
  63                         true : false;
  64 }
  65
  66 static bool is_volatile_reg(struct device *dev, unsigned int reg)
  67 {
  68         if (reg > FUSB_REG_CONTROL4)
  69                 return true;
  70
  71         switch (reg) {
  72         case FUSB_REG_CONTROL0:
  73         case FUSB_REG_CONTROL1:
  74         case FUSB_REG_CONTROL3:
  75         case FUSB_REG_RESET:
  76                 return true;
  77         }
  78         return false;
  79 }
  80
  81 struct regmap_config fusb302_regmap_config = {
  82         .reg_bits = 8,
  83         .val_bits = 8,
  84         .writeable_reg = is_write_reg,
  85         .volatile_reg = is_volatile_reg,
  86         .max_register = FUSB302_MAX_REG,
  87         .cache_type = REGCACHE_RBTREE,
  88 };
  89
  90 static void dump_notify_info(struct fusb30x_chip *chip)
  91 {
  92         dev_dbg(chip->dev, "port        %d\n", chip->port_num);
  93         dev_dbg(chip->dev, "orientation %d\n", chip->notify.orientation);
  94         dev_dbg(chip->dev, "power_role  %d\n", chip->notify.power_role);
  95         dev_dbg(chip->dev, "data_role   %d\n", chip->notify.data_role);
  96         dev_dbg(chip->dev, "cc          %d\n", chip->notify.is_cc_connected);
  97         dev_dbg(chip->dev, "pd          %d\n", chip->notify.is_pd_connected);
  98         dev_dbg(chip->dev, "enter_mode  %d\n", chip->notify.is_enter_mode);
  99         dev_dbg(chip->dev, "pin support %d\n",
 100                 chip->notify.pin_assignment_support);
 101         dev_dbg(chip->dev, "pin def     %d\n", chip->notify.pin_assignment_def);
 102         dev_dbg(chip->dev, "attention   %d\n", chip->notify.attention);
 103 }
 104
 105 static const unsigned int fusb302_cable[] = {
 106         EXTCON_USB,
 107         EXTCON_USB_HOST,
 108         EXTCON_USB_VBUS_EN,
 109         EXTCON_CHG_USB_SDP,
 110         EXTCON_CHG_USB_CDP,
 111         EXTCON_CHG_USB_DCP,
 112         EXTCON_CHG_USB_SLOW,
 113         EXTCON_CHG_USB_FAST,
 114         EXTCON_DISP_DP,
 115         EXTCON_NONE,
 116 };
 117
 118 static void fusb_set_pos_power(struct fusb30x_chip *chip, int max_vol,
 119                                int max_cur)
 120 {
 121         int i;
 122         int pos_find;
 123         int tmp;
 124
 125         pos_find = 0;
 126         for (i = PD_HEADER_CNT(chip->rec_head) - 1; i >= 0; i--) {
 127                 switch (CAP_POWER_TYPE(chip->rec_load[i])) {
 128                 case 0:
 129                         /* Fixed Supply */
 130                         if ((CAP_FPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
 131                             max_vol &&
 132                             (CAP_FPDO_CURRENT(chip->rec_load[i]) * 10) <=
 133                             max_cur) {
 134                                 chip->pos_power = i + 1;
 135                                 tmp = CAP_FPDO_VOLTAGE(chip->rec_load[i]);
 136                                 chip->pd_output_vol = tmp * 50;
 137                                 tmp = CAP_FPDO_CURRENT(chip->rec_load[i]);
 138                                 chip->pd_output_cur = tmp * 10;
 139                                 pos_find = 1;
 140                         }
 141                         break;
 142                 case 1:
 143                         /* Battery */
 144                         if ((CAP_VPDO_VOLTAGE(chip->rec_load[i]) * 50) <=
 145                             max_vol &&
 146                             (CAP_VPDO_CURRENT(chip->rec_load[i]) * 10) <=
 147                             max_cur) {
 148                                 chip->pos_power = i + 1;
 149                                 tmp = CAP_VPDO_VOLTAGE(chip->rec_load[i]);
 150                                 chip->pd_output_vol = tmp * 50;
 151                                 tmp = CAP_VPDO_CURRENT(chip->rec_load[i]);
 152                                 chip->pd_output_cur = tmp * 10;
 153                                 pos_find = 1;
 154                         }
 155                         break;
 156                 default:
 157                         /* not meet battery caps */
 158                         break;
 159                 }
 160                 if (pos_find)
 161                         break;
 162         }
 163 }
 164
 165 static int fusb302_set_pos_power_by_charge_ic(struct fusb30x_chip *chip)
 166 {
 167         struct power_supply *psy = NULL;
 168         union power_supply_propval val;
 169         enum power_supply_property psp;
 170         int max_vol, max_cur;
 171
 172         max_vol = 0;
 173         max_cur = 0;
 174         psy = power_supply_get_by_phandle(chip->dev->of_node, "charge-dev");
 175         if (!psy || IS_ERR(psy))
 176                 return -1;
 177
 178         psp = POWER_SUPPLY_PROP_CHARGE_CONTROL_LIMIT_MAX;
 179         if (power_supply_get_property(psy, psp, &val) == 0)
 180                 max_vol = val.intval / 1000;
 181
 182         psp = POWER_SUPPLY_PROP_INPUT_CURRENT_LIMIT;
 183         if (power_supply_get_property(psy, psp, &val) == 0)
 184                 max_cur = val.intval / 1000;
 185
 186         if (max_vol > 0 && max_cur > 0)
 187                 fusb_set_pos_power(chip, max_vol, max_cur);
 188
 189         return 0;
 190 }
 191
 192 void fusb_irq_disable(struct fusb30x_chip *chip)
 193 {
 194         unsigned long irqflags = 0;
 195
 196         spin_lock_irqsave(&chip->irq_lock, irqflags);
 197         if (chip->enable_irq) {
 198                 disable_irq_nosync(chip->gpio_int_irq);
 199                 chip->enable_irq = 0;
 200         } else {
 201                 dev_warn(chip->dev, "irq have already disabled\n");
 202         }
 203         spin_unlock_irqrestore(&chip->irq_lock, irqflags);
 204 }
 205
 206 void fusb_irq_enable(struct fusb30x_chip *chip)
 207 {
 208         unsigned long irqflags = 0;
 209
 210         spin_lock_irqsave(&chip->irq_lock, irqflags);
 211         if (!chip->enable_irq) {
 212                 enable_irq(chip->gpio_int_irq);
 213                 chip->enable_irq = 1;
 214         }
 215         spin_unlock_irqrestore(&chip->irq_lock, irqflags);
 216 }
 217
 218 static void platform_fusb_notify(struct fusb30x_chip *chip)
 219 {
 220         bool plugged = 0, flip = 0, dfp = 0, ufp = 0, dp = 0, usb_ss = 0;
 221         union extcon_property_value property;
 222
 223         if (chip->notify.is_cc_connected)
 224                 chip->notify.orientation = chip->cc_polarity + 1;
 225
 226         /* avoid notify repeated */
 227         if (memcmp(&chip->notify, &chip->notify_cmp,
 228                    sizeof(struct notify_info))) {
 229                 dump_notify_info(chip);
 230                 chip->notify.attention = 0;
 231                 memcpy(&chip->notify_cmp, &chip->notify,
 232                        sizeof(struct notify_info));
 233
 234                 plugged = chip->notify.is_cc_connected ||
 235                           chip->notify.is_pd_connected;
 236                 flip = chip->notify.orientation ?
 237                        (chip->notify.orientation - 1) : 0;
 238                 dp = chip->notify.is_enter_mode;
 239
 240                 if (dp) {
 241                         dfp = 1;
 242                         usb_ss = (chip->notify.pin_assignment_def &
 243                                 (PIN_MAP_B | PIN_MAP_D | PIN_MAP_F)) ? 1 : 0;
 244                 } else if (chip->notify.data_role) {
 245                         dfp = 1;
 246                         usb_ss = 1;
 247                 } else if (plugged) {
 248                         ufp = 1;
 249                         usb_ss = 1;
 250                 }
 251
 252                 if (chip->notify.power_role == 0 &&
 253                     chip->notify.is_pd_connected &&
 254                     chip->pd_output_vol > 0 && chip->pd_output_cur > 0) {
 255                         extcon_set_state(chip->extcon, EXTCON_CHG_USB_FAST,
 256                                          true);
 257                         property.intval =
 258                                 (chip->pd_output_cur << 15 |
 259                                  chip->pd_output_vol);
 260                         extcon_set_property(chip->extcon, EXTCON_CHG_USB_FAST,
 261                                             EXTCON_PROP_USB_TYPEC_POLARITY,
 262                                             property);
 263                         extcon_sync(chip->extcon, EXTCON_CHG_USB_FAST);
 264                 }
 265
 266 #ifdef CONFIG_FREEZER
 267                 /*
 268                  * If system enter PM suspend, we need to wait until
 269                  * PM resume all of devices completion, then the flag
 270                  * pm_freezing will be set to false, and we can send
 271                  * notifier to USB/DP module safety, it make sure that
 272                  * USB/DP can enable power domain successfully.
 273                  */
 274                 while (pm_freezing)
 275                         usleep_range(10000, 11000);
 276 #endif
 277
 278                 property.intval = flip;
 279                 extcon_set_property(chip->extcon, EXTCON_USB,
 280                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 281                 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
 282                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 283                 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
 284                                     EXTCON_PROP_USB_TYPEC_POLARITY, property);
 285
 286                 property.intval = usb_ss;
 287                 extcon_set_property(chip->extcon, EXTCON_USB,
 288                                     EXTCON_PROP_USB_SS, property);
 289                 extcon_set_property(chip->extcon, EXTCON_USB_HOST,
 290                                     EXTCON_PROP_USB_SS, property);
 291                 extcon_set_property(chip->extcon, EXTCON_DISP_DP,
 292                                     EXTCON_PROP_USB_SS, property);
 293                 extcon_set_state(chip->extcon, EXTCON_USB, ufp);
 294                 extcon_set_state(chip->extcon, EXTCON_USB_HOST, dfp);
 295                 extcon_set_state(chip->extcon, EXTCON_DISP_DP, dp);
 296                 extcon_sync(chip->extcon, EXTCON_USB);
 297                 extcon_sync(chip->extcon, EXTCON_USB_HOST);
 298                 extcon_sync(chip->extcon, EXTCON_DISP_DP);
 299         }
 300 }
 301
 302 static bool platform_get_device_irq_state(struct fusb30x_chip *chip)
 303 {
 304         return !gpiod_get_value(chip->gpio_int);
 305 }
 306
 307 static void fusb_timer_start(struct hrtimer *timer, int ms)
 308 {
 309         ktime_t ktime;
 310
 311         ktime = ktime_set(0, FUSB_MS_TO_NS(ms));
 312         hrtimer_start(timer, ktime, HRTIMER_MODE_REL);
 313 }
 314
 315 static void platform_set_vbus_lvl_enable(struct fusb30x_chip *chip, int vbus_5v,
 316                                          int vbus_other)
 317 {
 318         bool gpio_vbus_value = 0;
 319
 320         gpio_vbus_value = gpiod_get_value(chip->gpio_vbus_5v);
 321         if (chip->gpio_vbus_5v) {
 322                 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_5v);
 323                 /* Only set state here, don't sync notifier to PMIC */
 324                 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
 325         } else {
 326                 extcon_set_state(chip->extcon, EXTCON_USB_VBUS_EN, vbus_5v);
 327                 extcon_sync(chip->extcon, EXTCON_USB_VBUS_EN);
 328                 dev_info(chip->dev, "fusb302 send extcon to %s vbus 5v\n", vbus_5v ? "enable" : "disable");
 329         }
 330
 331         if (chip->gpio_vbus_other)
 332                 gpiod_set_raw_value(chip->gpio_vbus_5v, vbus_other);
 333
 334         if (chip->gpio_discharge && !vbus_5v && gpio_vbus_value) {
 335                 gpiod_set_value(chip->gpio_discharge, 1);
 336                 msleep(20);
 337                 gpiod_set_value(chip->gpio_discharge, 0);
 338         }
 339 }
 340
 341 static void set_state(struct fusb30x_chip *chip, enum connection_state state)
 342 {
 343         dev_dbg(chip->dev, "port %d, state %d\n", chip->port_num, state);
 344         if (!state)
 345                 dev_info(chip->dev, "PD disabled\n");
 346         chip->conn_state = state;
 347         chip->sub_state = 0;
 348         chip->val_tmp = 0;
 349         chip->work_continue = 1;
 350 }
 351
 352 static int tcpm_get_message(struct fusb30x_chip *chip)
 353 {
 354         u8 buf[32];
 355         int len;
 356
 357         regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, 3);
 358         chip->rec_head = (buf[1] & 0xff) | ((buf[2] << 8) & 0xff00);
 359
 360         len = PD_HEADER_CNT(chip->rec_head) << 2;
 361         regmap_raw_read(chip->regmap, FUSB_REG_FIFO, buf, len + 4);
 362
 363         memcpy(chip->rec_load, buf, len);
 364
 365         return 0;
 366 }
 367
 368 static void fusb302_flush_rx_fifo(struct fusb30x_chip *chip)
 369 {
 370         tcpm_get_message(chip);
 371 }
 372
 373 static int tcpm_get_cc(struct fusb30x_chip *chip, int *CC1, int *CC2)
 374 {
 375         u32 val;
 376         int *CC_MEASURE;
 377         u32 store;
 378
 379         *CC1 = TYPEC_CC_VOLT_OPEN;
 380         *CC2 = TYPEC_CC_VOLT_OPEN;
 381
 382         if (chip->cc_state & 0x01)
 383                 CC_MEASURE = CC1;
 384         else
 385                 CC_MEASURE = CC2;
 386
 387         if (chip->cc_state & 0x04) {
 388                 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
 389                 /* measure cc1 first */
 390                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 391                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 392                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 393                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 394                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
 395                                    SWITCHES0_MEAS_CC1);
 396                 usleep_range(250, 300);
 397
 398                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 399                 val &= STATUS0_BC_LVL;
 400                 if (val)
 401                         *CC1 = val;
 402
 403                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 404                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 405                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 406                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 407                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2 |
 408                                    SWITCHES0_MEAS_CC2);
 409                 usleep_range(250, 300);
 410
 411                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 412                 val &= STATUS0_BC_LVL;
 413                 if (val)
 414                         *CC2 = val;
 415                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 416                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 417                                    store);
 418         } else {
 419                 regmap_read(chip->regmap, FUSB_REG_SWITCHES0, &store);
 420                 val = store;
 421                 val &= ~(SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2 |
 422                                 SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2);
 423                 if (chip->cc_state & 0x01) {
 424                         val |= SWITCHES0_MEAS_CC1 | SWITCHES0_PU_EN1;
 425                 } else {
 426                         val |= SWITCHES0_MEAS_CC2 | SWITCHES0_PU_EN2;
 427                 }
 428                 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, val);
 429
 430                 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
 431                 usleep_range(250, 300);
 432
 433                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 434                 if (val & STATUS0_COMP) {
 435                         int retry = 3;
 436                         int comp_times = 0;
 437
 438                         while (retry--) {
 439                                 regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_high);
 440                                 usleep_range(250, 300);
 441                                 regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 442                                 if (val & STATUS0_COMP) {
 443                                         comp_times++;
 444                                         if (comp_times == 3) {
 445                                                 *CC_MEASURE = TYPEC_CC_VOLT_OPEN;
 446                                                 regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
 447                                         }
 448                                 }
 449                         }
 450                 } else {
 451                         regmap_write(chip->regmap, FUSB_REG_MEASURE, chip->cc_meas_low);
 452                         regmap_read(chip->regmap, FUSB_REG_MEASURE, &val);
 453                         usleep_range(250, 300);
 454
 455                         regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 456
 457                         if (val & STATUS0_COMP)
 458                                 *CC_MEASURE = TYPEC_CC_VOLT_RD;
 459                         else
 460                                 *CC_MEASURE = TYPEC_CC_VOLT_RA;
 461                         regmap_write(chip->regmap, FUSB_REG_SWITCHES0, store);
 462                 }
 463         }
 464
 465         return 0;
 466 }
 467
 468 static int tcpm_set_cc(struct fusb30x_chip *chip, int mode)
 469 {
 470         u8 val = 0, mask;
 471
 472         val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 473                  SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
 474
 475         mask = ~val;
 476
 477         switch (mode) {
 478         case FUSB_MODE_DFP:
 479                 if (chip->togdone_pullup)
 480                         val |= SWITCHES0_PU_EN2;
 481                 else
 482                         val |= SWITCHES0_PU_EN1;
 483                 break;
 484         case FUSB_MODE_UFP:
 485                 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
 486                 break;
 487         case FUSB_MODE_DRP:
 488                 val |= SWITCHES0_PDWN1 | SWITCHES0_PDWN2;
 489                 break;
 490         case FUSB_MODE_ASS:
 491                 break;
 492         }
 493
 494         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0, mask, val);
 495         return 0;
 496 }
 497
 498 static int tcpm_set_rx_enable(struct fusb30x_chip *chip, int enable)
 499 {
 500         u8 val = 0;
 501
 502         if (enable) {
 503                 if (chip->cc_polarity)
 504                         val |= SWITCHES0_MEAS_CC2;
 505                 else
 506                         val |= SWITCHES0_MEAS_CC1;
 507                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 508                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 509                                    val);
 510                 fusb302_flush_rx_fifo(chip);
 511                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 512                                    SWITCHES1_AUTO_CRC, SWITCHES1_AUTO_CRC);
 513         } else {
 514                 /*
 515                  * bit of a hack here.
 516                  * when this function is called to disable rx (enable=0)
 517                  * using it as an indication of detach (gulp!)
 518                  * to reset our knowledge of where
 519                  * the toggle state machine landed.
 520                  */
 521                 chip->togdone_pullup = 0;
 522
 523 #ifdef  FUSB_HAVE_DRP
 524                 tcpm_set_cc(chip, FUSB_MODE_DRP);
 525                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 526                                    CONTROL2_TOG_RD_ONLY,
 527                                    CONTROL2_TOG_RD_ONLY);
 528 #endif
 529                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 530                                    SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 531                                    0);
 532                 regmap_update_bits(chip->regmap,
 533                                    FUSB_REG_SWITCHES1, SWITCHES1_AUTO_CRC, 0);
 534         }
 535
 536         return 0;
 537 }
 538
 539 static int tcpm_set_msg_header(struct fusb30x_chip *chip)
 540 {
 541         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 542                            SWITCHES1_POWERROLE | SWITCHES1_DATAROLE,
 543                            (chip->notify.power_role << 7) |
 544                            (chip->notify.data_role << 4));
 545         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 546                            SWITCHES1_SPECREV, 2 << 5);
 547         return 0;
 548 }
 549
 550 static int tcpm_set_polarity(struct fusb30x_chip *chip, bool polarity)
 551 {
 552         u8 val = 0;
 553
 554 #ifdef FUSB_VCONN_SUPPORT
 555         if (chip->vconn_enabled) {
 556                 if (polarity)
 557                         val |= SWITCHES0_VCONN_CC1;
 558                 else
 559                         val |= SWITCHES0_VCONN_CC2;
 560         }
 561 #endif
 562
 563         if (polarity)
 564                 val |= SWITCHES0_MEAS_CC2;
 565         else
 566                 val |= SWITCHES0_MEAS_CC1;
 567
 568         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 569                            SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2 |
 570                            SWITCHES0_MEAS_CC1 | SWITCHES0_MEAS_CC2,
 571                            val);
 572
 573         val = 0;
 574         if (polarity)
 575                 val |= SWITCHES1_TXCC2;
 576         else
 577                 val |= SWITCHES1_TXCC1;
 578         regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES1,
 579                            SWITCHES1_TXCC1 | SWITCHES1_TXCC2,
 580                            val);
 581
 582         chip->cc_polarity = polarity;
 583
 584         return 0;
 585 }
 586
 587 static int tcpm_set_vconn(struct fusb30x_chip *chip, int enable)
 588 {
 589         u8 val = 0;
 590
 591         if (enable) {
 592                 tcpm_set_polarity(chip, chip->cc_polarity);
 593         } else {
 594                 val &= ~(SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2);
 595                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 596                                    SWITCHES0_VCONN_CC1 | SWITCHES0_VCONN_CC2,
 597                                    val);
 598         }
 599         chip->vconn_enabled = enable;
 600         return 0;
 601 }
 602
 603 static void fusb302_pd_reset(struct fusb30x_chip *chip)
 604 {
 605         regmap_write(chip->regmap, FUSB_REG_RESET, RESET_PD_RESET);
 606         regmap_reinit_cache(chip->regmap, &fusb302_regmap_config);
 607 }
 608
 609 static void tcpm_select_rp_value(struct fusb30x_chip *chip, u32 rp)
 610 {
 611         u32 control0_reg;
 612
 613         regmap_read(chip->regmap, FUSB_REG_CONTROL0, &control0_reg);
 614
 615         control0_reg &= ~CONTROL0_HOST_CUR;
 616         /*
 617          * according to the host current, the compare value is different
 618         */
 619         switch (rp) {
 620         /* host pull up current is 80ua , high voltage is 1.596v, low is 0.21v */
 621         case TYPEC_RP_USB:
 622                 chip->cc_meas_high = 0x26;
 623                 chip->cc_meas_low = 0x5;
 624                 control0_reg |= CONTROL0_HOST_CUR_USB;
 625                 break;
 626         /* host pull up current is 180ua , high voltage is 1.596v, low is 0.42v */
 627         case TYPEC_RP_1A5:
 628                 chip->cc_meas_high = 0x26;
 629                 chip->cc_meas_low = 0xa;
 630                 control0_reg |= CONTROL0_HOST_CUR_1A5;
 631                 break;
 632         /* host pull up current is 330ua , high voltage is 2.604v, low is 0.798v*/
 633         case TYPEC_RP_3A0:
 634                 chip->cc_meas_high = 0x26;
 635                 chip->cc_meas_low = 0x13;
 636                 control0_reg |= CONTROL0_HOST_CUR_3A0;
 637                 break;
 638         default:
 639                 chip->cc_meas_high = 0x26;
 640                 chip->cc_meas_low = 0xa;
 641                 control0_reg |= CONTROL0_HOST_CUR_1A5;
 642                 break;
 643         }
 644
 645         regmap_write(chip->regmap, FUSB_REG_CONTROL0, control0_reg);
 646 }
 647
 648 static void tcpm_init(struct fusb30x_chip *chip)
 649 {
 650         u8 val;
 651         u32 tmp;
 652
 653         regmap_read(chip->regmap, FUSB_REG_DEVICEID, &tmp);
 654         chip->chip_id = (u8)tmp;
 655         platform_set_vbus_lvl_enable(chip, 0, 0);
 656         chip->notify.is_cc_connected = 0;
 657         chip->cc_state = 0;
 658
 659         /* restore default settings */
 660         regmap_update_bits(chip->regmap, FUSB_REG_RESET, RESET_SW_RESET,
 661                            RESET_SW_RESET);
 662         fusb302_pd_reset(chip);
 663         /* set auto_retry and number of retries */
 664         regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
 665                            CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES,
 666                            CONTROL3_AUTO_RETRY | CONTROL3_N_RETRIES),
 667
 668         /* set interrupts */
 669         val = 0xff;
 670         val &= ~(MASK_M_BC_LVL | MASK_M_COLLISION | MASK_M_ALERT |
 671                  MASK_M_VBUSOK);
 672         regmap_write(chip->regmap, FUSB_REG_MASK, val);
 673
 674         val = 0xff;
 675         val &= ~(MASKA_M_TOGDONE | MASKA_M_RETRYFAIL | MASKA_M_HARDSENT |
 676                  MASKA_M_TXSENT | MASKA_M_HARDRST);
 677         regmap_write(chip->regmap, FUSB_REG_MASKA, val);
 678
 679         val = 0xff;
 680         val = ~MASKB_M_GCRCSEND;
 681         regmap_write(chip->regmap, FUSB_REG_MASKB, val);
 682
 683 #ifdef  FUSB_HAVE_DRP
 684                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 685                                    CONTROL2_MODE | CONTROL2_TOGGLE,
 686                                    (1 << 1) | CONTROL2_TOGGLE);
 687
 688                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 689                                    CONTROL2_TOG_RD_ONLY,
 690                                    CONTROL2_TOG_RD_ONLY);
 691 #endif
 692
 693         tcpm_select_rp_value(chip, TYPEC_RP_1A5);
 694         /* Interrupts Enable */
 695         regmap_update_bits(chip->regmap, FUSB_REG_CONTROL0, CONTROL0_INT_MASK,
 696                            ~CONTROL0_INT_MASK);
 697
 698         tcpm_set_polarity(chip, 0);
 699         tcpm_set_vconn(chip, 0);
 700
 701         regmap_write(chip->regmap, FUSB_REG_POWER, 0xf);
 702 }
 703
 704 static void pd_execute_hard_reset(struct fusb30x_chip *chip)
 705 {
 706         chip->msg_id = 0;
 707         chip->vdm_state = 0;
 708         if (chip->notify.power_role)
 709                 set_state(chip, policy_src_transition_default);
 710         else
 711                 set_state(chip, policy_snk_transition_default);
 712 }
 713
 714 static void tcpc_alert(struct fusb30x_chip *chip, int *evt)
 715 {
 716         int interrupt, interrupta, interruptb;
 717         u32 val;
 718         static int retry;
 719
 720         regmap_read(chip->regmap, FUSB_REG_INTERRUPT, &interrupt);
 721         regmap_read(chip->regmap, FUSB_REG_INTERRUPTA, &interrupta);
 722         regmap_read(chip->regmap, FUSB_REG_INTERRUPTB, &interruptb);
 723
 724         if (interrupt & INTERRUPT_BC_LVL) {
 725                 if (chip->notify.is_cc_connected)
 726                         *evt |= EVENT_CC;
 727         }
 728
 729         if (interrupt & INTERRUPT_VBUSOK) {
 730                 if (chip->notify.is_cc_connected)
 731                         *evt |= EVENT_CC;
 732         }
 733
 734         if (interrupta & INTERRUPTA_TOGDONE) {
 735                 *evt |= EVENT_CC;
 736                 regmap_read(chip->regmap, FUSB_REG_STATUS1A, &val);
 737                 chip->cc_state = ((u8)val >> 3) & 0x07;
 738
 739                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL2,
 740                                    CONTROL2_TOGGLE,
 741                                    0);
 742
 743                 val &= ~(SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 744                          SWITCHES0_PDWN1 | SWITCHES0_PDWN2);
 745
 746                 if (chip->cc_state & 0x01)
 747                         val |= SWITCHES0_PU_EN1;
 748                 else
 749                         val |= SWITCHES0_PU_EN2;
 750
 751                 regmap_update_bits(chip->regmap, FUSB_REG_SWITCHES0,
 752                                    SWITCHES0_PU_EN1 | SWITCHES0_PU_EN2 |
 753                                    SWITCHES0_PDWN1 | SWITCHES0_PDWN2,
 754                                    val);
 755         }
 756
 757         if (interrupta & INTERRUPTA_TXSENT) {
 758                 *evt |= EVENT_TX;
 759                 fusb302_flush_rx_fifo(chip);
 760                 chip->tx_state = tx_success;
 761         }
 762
 763         if (interruptb & INTERRUPTB_GCRCSENT)
 764                 *evt |= EVENT_RX;
 765
 766         if (interrupta & INTERRUPTA_HARDRST) {
 767                 fusb302_pd_reset(chip);
 768                 pd_execute_hard_reset(chip);
 769                 *evt |= EVENT_REC_RESET;
 770         }
 771
 772         if (interrupta & INTERRUPTA_RETRYFAIL) {
 773                 *evt |= EVENT_TX;
 774                 chip->tx_state = tx_failed;
 775         }
 776
 777         if (interrupta & INTERRUPTA_HARDSENT) {
 778                 /*
 779                  * The fusb PD should be reset once to sync adapter PD
 780                  * signal after fusb sent hard reset cmd.This is not PD
 781                  * device if reset failed.
 782                  */
 783                 if (!retry) {
 784                         retry = 1;
 785                         fusb302_pd_reset(chip);
 786                         pd_execute_hard_reset(chip);
 787                 } else {
 788                         retry = 0;
 789                         chip->tx_state = tx_success;
 790                         chip->timer_state = T_DISABLED;
 791                         *evt |= EVENT_TX;
 792                 }
 793         }
 794 }
 795
 796 static void mux_alert(struct fusb30x_chip *chip, int *evt)
 797 {
 798         if (!chip->timer_mux) {
 799                 *evt |= EVENT_TIMER_MUX;
 800                 chip->timer_mux = T_DISABLED;
 801         }
 802
 803         if (!chip->timer_state) {
 804                 *evt |= EVENT_TIMER_STATE;
 805                 chip->timer_state = T_DISABLED;
 806         }
 807
 808         if (chip->work_continue) {
 809                 *evt |= EVENT_WORK_CONTINUE;
 810                 chip->work_continue = 0;
 811         }
 812 }
 813
 814 static void set_state_unattached(struct fusb30x_chip *chip)
 815 {
 816         dev_info(chip->dev, "connection has disconnected\n");
 817         tcpm_init(chip);
 818         tcpm_set_rx_enable(chip, 0);
 819         chip->conn_state = unattached;
 820         tcpm_set_cc(chip, FUSB_MODE_DRP);
 821
 822         /* claer notify_info */
 823         memset(&chip->notify, 0, sizeof(struct notify_info));
 824         platform_fusb_notify(chip);
 825
 826         if (chip->gpio_discharge)
 827                 gpiod_set_value(chip->gpio_discharge, 1);
 828         msleep(100);
 829         if (chip->gpio_discharge)
 830                 gpiod_set_value(chip->gpio_discharge, 0);
 831 }
 832
 833 static int tcpm_check_vbus(struct fusb30x_chip *chip)
 834 {
 835         u32 val;
 836
 837         /* Read status register */
 838         regmap_read(chip->regmap, FUSB_REG_STATUS0, &val);
 839
 840         return (val & STATUS0_VBUSOK) ? 1 : 0;
 841 }
 842
 843 static void set_mesg(struct fusb30x_chip *chip, int cmd, int is_DMT)
 844 {
 845         int i;
 846         struct PD_CAP_INFO *pd_cap_info = &chip->pd_cap_info;
 847
 848         chip->send_head = ((chip->msg_id & 0x7) << 9) |
 849                          ((chip->notify.power_role & 0x1) << 8) |
 850                          (1 << 6) |
 851                          ((chip->notify.data_role & 0x1) << 5);
 852
 853         if (is_DMT) {
 854                 switch (cmd) {
 855                 case DMT_SOURCECAPABILITIES:
 856                         chip->send_head |= ((chip->n_caps_used & 0x3) << 12) | (cmd & 0xf);
 857
 858                         for (i = 0; i < chip->n_caps_used; i++) {
 859                                 chip->send_load[i] = (pd_cap_info->supply_type << 30) |
 860                                                     (pd_cap_info->dual_role_power << 29) |
 861                                                     (pd_cap_info->usb_suspend_support << 28) |
 862                                                     (pd_cap_info->externally_powered << 27) |
 863                                                     (pd_cap_info->usb_communications_cap << 26) |
 864                                                     (pd_cap_info->data_role_swap << 25) |
 865                                                     (pd_cap_info->peak_current << 20) |
 866                                                     (chip->source_power_supply[i] << 10) |
 867                                                     (chip->source_max_current[i]);
 868                         }
 869                         break;
 870                 case DMT_REQUEST:
 871                         chip->send_head |= ((1 << 12) | (cmd & 0xf));
 872                         /* send request with FVRDO */
 873                         chip->send_load[0] = (chip->pos_power << 28) |
 874                                             (0 << 27) |
 875                                             (1 << 26) |
 876                                             (0 << 25) |
 877                                             (0 << 24);
 878
 879                         switch (CAP_POWER_TYPE(chip->rec_load[chip->pos_power - 1])) {
 880                         case 0:
 881                                 /* Fixed Supply */
 882                                 chip->send_load[0] |= ((CAP_FPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
 883                                 chip->send_load[0] |= (CAP_FPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
 884                                 break;
 885                         case 1:
 886                                 /* Battery */
 887                                 chip->send_load[0] |= ((CAP_VPDO_VOLTAGE(chip->rec_load[chip->pos_power - 1]) << 10) & 0x3ff);
 888                                 chip->send_load[0] |= (CAP_VPDO_CURRENT(chip->rec_load[chip->pos_power - 1]) & 0x3ff);
 889                                 break;
 890                         default:
 891                                 /* not meet battery caps */
 892                                 break;
 893                         }
 894                         break;
 895                 case DMT_SINKCAPABILITIES:
 896                         break;
 897                 case DMT_VENDERDEFINED:
 898                         break;
 899                 default:
 900                         break;
 901                 }
 902         } else {
 903                 chip->send_head |= (cmd & 0xf);
 904         }
 905 }
 906
 907 static void set_vdm_mesg(struct fusb30x_chip *chip, int cmd, int type, int mode)
 908 {
 909         chip->send_head = (chip->msg_id & 0x7) << 9;
 910         chip->send_head |= (chip->notify.power_role & 0x1) << 8;
 911
 912         chip->send_head = ((chip->msg_id & 0x7) << 9) |
 913                          ((chip->notify.power_role & 0x1) << 8) |
 914                          (1 << 6) |
 915                          ((chip->notify.data_role & 0x1) << 5) |
 916                          (DMT_VENDERDEFINED & 0xf);
 917
 918         chip->send_load[0] = (1 << 15) |
 919                             (0 << 13) |
 920                             (type << 6) |
 921                             (cmd);
 922
 923         switch (cmd) {
 924         case VDM_DISCOVERY_ID:
 925         case VDM_DISCOVERY_SVIDS:
 926         case VDM_ATTENTION:
 927                 chip->send_load[0] |= (0xff00 << 16);
 928                 chip->send_head |= (1 << 12);
 929                 break;
 930         case VDM_DISCOVERY_MODES:
 931                 chip->send_load[0] |=
 932                         (chip->vdm_svid[chip->val_tmp >> 1] << 16);
 933                 chip->send_head |= (1 << 12);
 934                 break;
 935         case VDM_ENTER_MODE:
 936                 chip->send_head |= (1 << 12);
 937                 chip->send_load[0] |= (mode << 8) | (0xff01 << 16);
 938                 break;
 939         case VDM_EXIT_MODE:
 940                 chip->send_head |= (1 << 12);
 941                 chip->send_load[0] |= (0x0f << 8) | (0xff01 << 16);
 942                 break;
 943         case VDM_DP_STATUS_UPDATE:
 944                 chip->send_head |= (2 << 12);
 945                 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 946                 chip->send_load[1] = 5;
 947                 break;
 948         case VDM_DP_CONFIG:
 949                 chip->send_head |= (2 << 12);
 950                 chip->send_load[0] |= (1 << 8) | (0xff01 << 16);
 951                 chip->send_load[1] = (chip->notify.pin_assignment_def << 8) |
 952                                     (1 << 2) | 2;
 953                 break;
 954         default:
 955                 break;
 956         }
 957 }
 958
 959 static enum tx_state policy_send_hardrst(struct fusb30x_chip *chip, int evt)
 960 {
 961         switch (chip->tx_state) {
 962         case 0:
 963                 regmap_update_bits(chip->regmap, FUSB_REG_CONTROL3,
 964                                    CONTROL3_SEND_HARDRESET,
 965                                    CONTROL3_SEND_HARDRESET);
 966                 chip->tx_state = tx_busy;
 967                 chip->timer_state = T_BMC_TIMEOUT;
 968                 fusb_timer_start(&chip->timer_state_machine,
 969                                  chip->timer_state);
 970                 break;
 971         default:
 972                 if (evt & EVENT_TIMER_STATE)
 973                         chip->tx_state = tx_success;
 974                 break;
 975         }
 976         return chip->tx_state;
 977 }
 978
 979 static enum tx_state policy_send_data(struct fusb30x_chip *chip)
 980 {
 981         u8 senddata[40];
 982         int pos = 0;
 983         u8 len;
 984
 985         switch (chip->tx_state) {
 986         case 0:
 987                 senddata[pos++] = FUSB_TKN_SYNC1;
 988                 senddata[pos++] = FUSB_TKN_SYNC1;
 989                 senddata[pos++] = FUSB_TKN_SYNC1;
 990                 senddata[pos++] = FUSB_TKN_SYNC2;
 991
 992                 len = PD_HEADER_CNT(chip->send_head) << 2;
 993                 senddata[pos++] = FUSB_TKN_PACKSYM | ((len + 2) & 0x1f);
 994
 995                 senddata[pos++] = chip->send_head & 0xff;
 996                 senddata[pos++] = (chip->send_head >> 8) & 0xff;
 997
 998                 memcpy(&senddata[pos], chip->send_load, len);
 999                 pos += len;
1000
1001                 senddata[pos++] = FUSB_TKN_JAMCRC;
1002                 senddata[pos++] = FUSB_TKN_EOP;
1003                 senddata[pos++] = FUSB_TKN_TXOFF;
1004                 senddata[pos++] = FUSB_TKN_TXON;
1005
1006                 regmap_raw_write(chip->regmap, FUSB_REG_FIFO, senddata, pos);
1007                 chip->tx_state = tx_busy;
1008                 break;
1009
1010         default:
1011                 /* wait Tx result */
1012                 break;
1013         }
1014
1015         return chip->tx_state;
1016 }
1017
1018 static void process_vdm_msg(struct fusb30x_chip *chip)
1019 {
1020         u32 vdm_header = chip->rec_load[0];
1021         int i;
1022         u32 tmp;
1023
1024         /* can't procee unstructed vdm msg */
1025         if (!GET_VDMHEAD_STRUCT_TYPE(vdm_header))
1026                 return;
1027
1028         switch (GET_VDMHEAD_CMD_TYPE(vdm_header)) {
1029         case VDM_TYPE_INIT:
1030                 switch (GET_VDMHEAD_CMD(vdm_header)) {
1031                 case VDM_ATTENTION:
1032                         dev_info(chip->dev, "attention, dp_status %x\n",
1033                                  chip->rec_load[1]);
1034                         chip->notify.attention = 1;
1035                         chip->vdm_state = 6;
1036                         break;
1037                 default:
1038                         dev_warn(chip->dev, "rec unknown init vdm msg\n");
1039                         break;
1040                 }
1041                 break;
1042         case VDM_TYPE_ACK:
1043                 switch (GET_VDMHEAD_CMD(vdm_header)) {
1044                 case VDM_DISCOVERY_ID:
1045                         chip->vdm_id = chip->rec_load[1];
1046                         break;
1047                 case VDM_DISCOVERY_SVIDS:
1048                         for (i = 0; i < 6; i++) {
1049                                 tmp = (chip->rec_load[i + 1] >> 16) &
1050                                       0x0000ffff;
1051                                 if (tmp) {
1052                                         chip->vdm_svid[i * 2] = tmp;
1053                                         chip->vdm_svid_num++;
1054                                 } else {
1055                                         break;
1056                                 }
1057
1058                                 tmp = (chip->rec_load[i + 1] & 0x0000ffff);
1059                                 if (tmp) {
1060                                         chip->vdm_svid[i * 2 + 1] = tmp;
1061                                         chip->vdm_svid_num++;
1062                                 } else {
1063                                         break;
1064                                 }
1065                         }
1066                         break;
1067                 case VDM_DISCOVERY_MODES:
1068                         /* indicate there are some vdo modes */
1069                         if (PD_HEADER_CNT(chip->rec_head) > 1) {
1070                                 /*
1071                                  * store mode config,
1072                                  * enter first mode default
1073                                  */
1074                                 if (!((chip->rec_load[1] >> 8) & 0x3f)) {
1075                                         chip->val_tmp |= 1;
1076                                         break;
1077                                 }
1078                                 chip->notify.pin_assignment_support = 0;
1079                                 chip->notify.pin_assignment_def = 0;
1080                                 chip->notify.pin_assignment_support =
1081                                         (chip->rec_load[1] >> 8) & 0x3f;
1082                                 tmp = chip->notify.pin_assignment_support;
1083                                 for (i = 0; i < 6; i++) {
1084                                         if (!(tmp & 0x20))
1085                                                 tmp = tmp << 1;
1086                                         else
1087                                                 break;
1088                                 }
1089                                 chip->notify.pin_assignment_def = 0x20 >> i;
1090                                 chip->val_tmp |= 1;
1091                         }
1092                         break;
1093                 case VDM_ENTER_MODE:
1094                         chip->val_tmp = 1;
1095                         break;
1096                 case VDM_DP_STATUS_UPDATE:
1097                         dev_dbg(chip->dev, "dp_status 0x%x\n",
1098                                 chip->rec_load[1]);
1099                         chip->val_tmp = 1;
1100                         break;
1101                 case VDM_DP_CONFIG:
1102                         chip->val_tmp = 1;
1103                         dev_info(chip->dev,
1104                                  "DP config successful, pin_assignment 0x%x\n",
1105                                  chip->notify.pin_assignment_def);
1106                         chip->notify.is_enter_mode = 1;
1107                         break;
1108                 default:
1109                         break;
1110                 }
1111                 break;
1112         case VDM_TYPE_NACK:
1113                         dev_warn(chip->dev, "REC NACK for 0x%x\n",
1114                                  GET_VDMHEAD_CMD(vdm_header));
1115                         /* disable vdm */
1116                         chip->vdm_state = 0xff;
1117                 break;
1118         }
1119 }
1120
1121 static int vdm_send_discoveryid(struct fusb30x_chip *chip, int evt)
1122 {
1123         int tmp;
1124
1125         switch (chip->vdm_send_state) {
1126         case 0:
1127                 set_vdm_mesg(chip, VDM_DISCOVERY_ID, VDM_TYPE_INIT, 0);
1128                 chip->vdm_id = 0;
1129                 chip->tx_state = 0;
1130                 chip->vdm_send_state++;
1131         case 1:
1132                 tmp = policy_send_data(chip);
1133                 if (tmp == tx_success) {
1134                         chip->vdm_send_state++;
1135                         chip->timer_state = T_SENDER_RESPONSE;
1136                         fusb_timer_start(&chip->timer_state_machine,
1137                                          chip->timer_state);
1138                 } else if (tmp == tx_failed) {
1139                         dev_warn(chip->dev, "VDM_DISCOVERY_ID send failed\n");
1140                         /* disable auto_vdm_machine */
1141                         chip->vdm_state = 0xff;
1142                 }
1143
1144                 if (chip->vdm_send_state != 2)
1145                         break;
1146         default:
1147                 if (evt & EVENT_TIMER_STATE) {
1148                         dev_warn(chip->dev, "VDM_DISCOVERY_ID time out\n");
1149                         chip->vdm_state = 0xff;
1150                         chip->work_continue = 1;
1151                 }
1152
1153                 if (!chip->vdm_id)
1154                         break;
1155                 chip->vdm_send_state = 0;
1156                 return 0;
1157         }
1158         return -EINPROGRESS;
1159 }
1160
1161 static int vdm_send_discoverysvid(struct fusb30x_chip *chip, int evt)
1162 {
1163         int tmp;
1164
1165         switch (chip->vdm_send_state) {
1166         case 0:
1167                 set_vdm_mesg(chip, VDM_DISCOVERY_SVIDS, VDM_TYPE_INIT, 0);
1168                 memset(chip->vdm_svid, 0, 12);
1169                 chip->vdm_svid_num = 0;
1170                 chip->tx_state = 0;
1171                 chip->vdm_send_state++;
1172         case 1:
1173                 tmp = policy_send_data(chip);
1174                 if (tmp == tx_success) {
1175                         chip->vdm_send_state++;
1176                         chip->timer_state = T_SENDER_RESPONSE;
1177                         fusb_timer_start(&chip->timer_state_machine,
1178                                          chip->timer_state);
1179                 } else if (tmp == tx_failed) {
1180                         dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS send failed\n");
1181                         /* disable auto_vdm_machine */
1182                         chip->vdm_state = 0xff;
1183                 }
1184
1185                 if (chip->vdm_send_state != 2)
1186                         break;
1187         default:
1188                 if (evt & EVENT_TIMER_STATE) {
1189                         dev_warn(chip->dev, "VDM_DISCOVERY_SVIDS time out\n");
1190                         chip->vdm_state = 0xff;
1191                         chip->work_continue = 1;
1192                 }
1193
1194                 if (!chip->vdm_svid_num)
1195                         break;
1196                 chip->vdm_send_state = 0;
1197                 return 0;
1198         }
1199         return -EINPROGRESS;
1200 }
1201
1202 static int vdm_send_discoverymodes(struct fusb30x_chip *chip, int evt)
1203 {
1204         int tmp;
1205
1206         if ((chip->val_tmp >> 1) != chip->vdm_svid_num) {
1207                 switch (chip->vdm_send_state) {
1208                 case 0:
1209                         set_vdm_mesg(chip, VDM_DISCOVERY_MODES,
1210                                      VDM_TYPE_INIT, 0);
1211                         chip->tx_state = 0;
1212                         chip->vdm_send_state++;
1213                 case 1:
1214                         tmp = policy_send_data(chip);
1215                         if (tmp == tx_success) {
1216                                 chip->vdm_send_state++;
1217                                 chip->timer_state = T_SENDER_RESPONSE;
1218                                 fusb_timer_start(&chip->timer_state_machine,
1219                                                  chip->timer_state);
1220                         } else if (tmp == tx_failed) {
1221                                 dev_warn(chip->dev,
1222                                          "VDM_DISCOVERY_MODES send failed\n");
1223                                 chip->vdm_state = 0xff;
1224                         }
1225
1226                         if (chip->vdm_send_state != 2)
1227                                 break;
1228                 default:
1229                         if (evt & EVENT_TIMER_STATE) {
1230                                 dev_warn(chip->dev,
1231                                          "VDM_DISCOVERY_MODES time out\n");
1232                                 chip->vdm_state = 0xff;
1233                                 chip->work_continue = 1;
1234                         }
1235
1236                         if (!(chip->val_tmp & 1))
1237                                 break;
1238                         chip->val_tmp &= 0xfe;
1239                         chip->val_tmp += 2;
1240                         chip->vdm_send_state = 0;
1241                         chip->work_continue = 1;
1242                         break;
1243                 }
1244         } else {
1245                 chip->val_tmp = 0;
1246                 return 0;
1247         }
1248
1249         return -EINPROGRESS;
1250 }
1251
1252 static int vdm_send_entermode(struct fusb30x_chip *chip, int evt)
1253 {
1254         int tmp;
1255
1256         switch (chip->vdm_send_state) {
1257         case 0:
1258                 set_vdm_mesg(chip, VDM_ENTER_MODE, VDM_TYPE_INIT, 1);
1259                 chip->tx_state = 0;
1260                 chip->vdm_send_state++;
1261                 chip->notify.is_enter_mode = 0;
1262         case 1:
1263                 tmp = policy_send_data(chip);
1264                 if (tmp == tx_success) {
1265                         chip->vdm_send_state++;
1266                         chip->timer_state = T_SENDER_RESPONSE;
1267                         fusb_timer_start(&chip->timer_state_machine,
1268                                          chip->timer_state);
1269                 } else if (tmp == tx_failed) {
1270                         dev_warn(chip->dev, "VDM_ENTER_MODE send failed\n");
1271                         /* disable auto_vdm_machine */
1272                         chip->vdm_state = 0xff;
1273                 }
1274
1275                 if (chip->vdm_send_state != 2)
1276                         break;
1277         default:
1278                 if (evt & EVENT_TIMER_STATE) {
1279                         dev_warn(chip->dev, "VDM_ENTER_MODE time out\n");
1280                         chip->vdm_state = 0xff;
1281                         chip->work_continue = 1;
1282                 }
1283
1284                 if (!chip->val_tmp)
1285                         break;
1286                 chip->val_tmp = 0;
1287                 chip->vdm_send_state = 0;
1288                 return 0;
1289         }
1290         return -EINPROGRESS;
1291 }
1292
1293 static int vdm_send_getdpstatus(struct fusb30x_chip *chip, int evt)
1294 {
1295         int tmp;
1296
1297         switch (chip->vdm_send_state) {
1298         case 0:
1299                 set_vdm_mesg(chip, VDM_DP_STATUS_UPDATE, VDM_TYPE_INIT, 1);
1300                 chip->tx_state = 0;
1301                 chip->vdm_send_state++;
1302         case 1:
1303                 tmp = policy_send_data(chip);
1304                 if (tmp == tx_success) {
1305                         chip->vdm_send_state++;
1306                         chip->timer_state = T_SENDER_RESPONSE;
1307                         fusb_timer_start(&chip->timer_state_machine,
1308                                          chip->timer_state);
1309                 } else if (tmp == tx_failed) {
1310                         dev_warn(chip->dev,
1311                                  "VDM_DP_STATUS_UPDATE send failed\n");
1312                         /* disable auto_vdm_machine */
1313                         chip->vdm_state = 0xff;
1314                 }
1315
1316                 if (chip->vdm_send_state != 2)
1317                         break;
1318         default:
1319                 if (evt & EVENT_TIMER_STATE) {
1320                         dev_warn(chip->dev, "VDM_DP_STATUS_UPDATE time out\n");
1321                         chip->vdm_state = 0xff;
1322                         chip->work_continue = 1;
1323                 }
1324
1325                 if (!chip->val_tmp)
1326                         break;
1327                 chip->val_tmp = 0;
1328                 chip->vdm_send_state = 0;
1329                 return 0;
1330         }
1331         return -EINPROGRESS;
1332 }
1333
1334 static int vdm_send_dpconfig(struct fusb30x_chip *chip, int evt)
1335 {
1336         int tmp;
1337
1338         switch (chip->vdm_send_state) {
1339         case 0:
1340                 set_vdm_mesg(chip, VDM_DP_CONFIG, VDM_TYPE_INIT, 0);
1341                 chip->tx_state = 0;
1342                 chip->vdm_send_state++;
1343         case 1:
1344                 tmp = policy_send_data(chip);
1345                 if (tmp == tx_success) {
1346                         chip->vdm_send_state++;
1347                         chip->timer_state = T_SENDER_RESPONSE;
1348                         fusb_timer_start(&chip->timer_state_machine,
1349                                          chip->timer_state);
1350                 } else if (tmp == tx_failed) {
1351                         dev_warn(chip->dev, "vdm_send_dpconfig send failed\n");
1352                         /* disable auto_vdm_machine */
1353                         chip->vdm_state = 0xff;
1354                 }
1355
1356                 if (chip->vdm_send_state != 2)
1357                         break;
1358         default:
1359                 if (evt & EVENT_TIMER_STATE) {
1360                         dev_warn(chip->dev, "vdm_send_dpconfig time out\n");
1361                         chip->vdm_state = 0xff;
1362                         chip->work_continue = 1;
1363                 }
1364
1365                 if (!chip->val_tmp)
1366                         break;
1367                 chip->val_tmp = 0;
1368                 chip->vdm_send_state = 0;
1369                 return 0;
1370         }
1371         return -EINPROGRESS;
1372 }
1373
1374 static void auto_vdm_machine(struct fusb30x_chip *chip, int evt)
1375 {
1376         switch (chip->vdm_state) {
1377         case 0:
1378                 if (vdm_send_discoveryid(chip, evt))
1379                         break;
1380                 chip->vdm_state++;
1381                 /* without break */
1382         case 1:
1383                 if (vdm_send_discoverysvid(chip, evt))
1384                         break;
1385                 chip->vdm_state++;
1386                 /* without break */
1387         case 2:
1388                 if (vdm_send_discoverymodes(chip, evt))
1389                         break;
1390                 chip->vdm_state++;
1391                 /* without break */
1392         case 3:
1393                 if (vdm_send_entermode(chip, evt))
1394                         break;
1395                 chip->vdm_state++;
1396                 /* without break */
1397         case 4:
1398                 if (vdm_send_dpconfig(chip, evt))
1399                         break;
1400                 chip->vdm_state = 6;
1401                 /* without break */
1402         case 5:
1403                 if (vdm_send_getdpstatus(chip, evt))
1404                         break;
1405                 chip->vdm_state++;
1406                 /* without break */
1407         default:
1408                 platform_fusb_notify(chip);
1409                 break;
1410         }
1411 }
1412
1413 static void fusb_state_disabled(struct fusb30x_chip *chip, int evt)
1414 {
1415         platform_fusb_notify(chip);
1416 }
1417
1418 static void fusb_state_unattached(struct fusb30x_chip *chip, int evt)
1419 {
1420         chip->notify.is_cc_connected = 0;
1421         if ((evt & EVENT_CC) && chip->cc_state) {
1422                 if (chip->cc_state & 0x04)
1423                         set_state(chip, attach_wait_sink);
1424                 else
1425                         set_state(chip, attach_wait_source);
1426
1427                 tcpm_get_cc(chip, &chip->cc1, &chip->cc2);
1428                 chip->debounce_cnt = 0;
1429                 chip->timer_mux = 2;
1430                 fusb_timer_start(&chip->timer_mux_machine, chip->timer_mux);
1431         }
1432 }
1433
1434 static void fusb_state_attach_wait_sink(struct fusb30x_chip *chip, int evt)
1435 {
1436         int cc1, cc2;
1437
1438         if (evt & EVENT_TIMER_MUX) {
1439                 tcpm_get_cc(chip, &cc1, &cc2);
1440
1441                 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1442                         chip->debounce_cnt++;
1443                 } else {
1444                         chip->cc1 = cc1;
1445                         chip->cc2 = cc2;
1446                         chip->debounce_cnt = 0;
1447                 }
1448
1449                 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1450                         if ((chip->cc1 != chip->cc2) &&
1451                             ((!chip->cc1) || (!chip->cc2))) {
1452                                 set_state(chip, attached_sink);
1453                         } else {
1454                                 set_state_unattached(chip);
1455                         }
1456                         return;
1457                 }
1458
1459                 chip->timer_mux = 2;
1460                 fusb_timer_start(&chip->timer_mux_machine,
1461                                  chip->timer_mux);
1462         }
1463 }
1464
1465 static void fusb_state_attach_wait_source(struct fusb30x_chip *chip, int evt)
1466 {
1467         int cc1, cc2;
1468
1469         if (evt & EVENT_TIMER_MUX) {
1470                 tcpm_get_cc(chip, &cc1, &cc2);
1471
1472                 if ((chip->cc1 == cc1) && (chip->cc2 == cc2)) {
1473                         if (chip->debounce_cnt++ == 0)
1474                                 platform_set_vbus_lvl_enable(chip, 1, 0);
1475                 } else {
1476                         chip->cc1 = cc1;
1477                         chip->cc2 = cc2;
1478                         chip->debounce_cnt = 0;
1479                 }
1480
1481                 if (chip->debounce_cnt > N_DEBOUNCE_CNT) {
1482                         if (((!chip->cc1) || (!chip->cc2)) &&
1483                             ((chip->cc1 == TYPEC_CC_VOLT_RD) ||
1484                              (chip->cc2 == TYPEC_CC_VOLT_RD))) {
1485                                 set_state(chip, attached_source);
1486                         } else {
1487                                 set_state_unattached(chip);
1488                         }
1489
1490                         return;
1491                 }
1492
1493                 chip->timer_mux = 2;
1494                 fusb_timer_start(&chip->timer_mux_machine,
1495                                  chip->timer_mux);
1496         }
1497 }
1498
1499 static void fusb_state_attached_source(struct fusb30x_chip *chip, int evt)
1500 {
1501         tcpm_set_polarity(chip, !(chip->cc_state & 0x01));
1502         tcpm_set_vconn(chip, 1);
1503
1504         chip->notify.is_cc_connected = 1;
1505         if (chip->cc_state & 0x01)
1506                 chip->cc_polarity = 0;
1507         else
1508                 chip->cc_polarity = 1;
1509
1510         chip->notify.power_role = 1;
1511         chip->notify.data_role = 1;
1512         chip->hardrst_count = 0;
1513         set_state(chip, policy_src_startup);
1514         dev_info(chip->dev, "CC connected in %d as DFP\n", chip->cc_polarity);
1515 }
1516
1517 static void fusb_state_attached_sink(struct fusb30x_chip *chip, int evt)
1518 {
1519         chip->notify.is_cc_connected = 1;
1520         if (chip->cc_state & 0x01)
1521                 chip->cc_polarity = 0;
1522         else
1523                 chip->cc_polarity = 1;
1524
1525         chip->notify.power_role = 0;
1526         chip->notify.data_role = 0;
1527         chip->hardrst_count = 0;
1528         set_state(chip, policy_snk_startup);
1529         dev_info(chip->dev, "CC connected in %d as UFP\n", chip->cc_polarity);
1530 }
1531
1532 static void fusb_state_src_startup(struct fusb30x_chip *chip, int evt)
1533 {
1534         chip->caps_counter = 0;
1535         chip->notify.is_pd_connected = 0;
1536         chip->msg_id = 0;
1537         chip->vdm_state = 0;
1538         chip->vdm_substate = 0;
1539         chip->vdm_send_state = 0;
1540         chip->val_tmp = 0;
1541
1542         memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1543
1544         tcpm_set_msg_header(chip);
1545         tcpm_set_polarity(chip, chip->cc_polarity);
1546         tcpm_set_rx_enable(chip, 1);
1547
1548         set_state(chip, policy_src_send_caps);
1549 }
1550
1551 static void fusb_state_src_discovery(struct fusb30x_chip *chip, int evt)
1552 {
1553         switch (chip->sub_state) {
1554         case 0:
1555                 chip->caps_counter++;
1556
1557                 if (chip->caps_counter < N_CAPS_COUNT) {
1558                         chip->timer_state = T_TYPEC_SEND_SOURCECAP;
1559                         fusb_timer_start(&chip->timer_state_machine,
1560                                          chip->timer_state);
1561                         chip->sub_state = 1;
1562                 } else {
1563                         set_state(chip, disabled);
1564                 }
1565                 break;
1566         default:
1567                 if (evt & EVENT_TIMER_STATE) {
1568                         set_state(chip, policy_src_send_caps);
1569                 } else if ((evt & EVENT_TIMER_MUX) &&
1570                            (chip->hardrst_count > N_HARDRESET_COUNT)) {
1571                         if (chip->notify.is_pd_connected)
1572                                 set_state(chip, error_recovery);
1573                         else
1574                                 set_state(chip, disabled);
1575                 }
1576                 break;
1577         }
1578 }
1579
1580 static void fusb_state_src_send_caps(struct fusb30x_chip *chip, int evt)
1581 {
1582         u32 tmp;
1583
1584         switch (chip->sub_state) {
1585         case 0:
1586                 set_mesg(chip, DMT_SOURCECAPABILITIES, DATAMESSAGE);
1587                 chip->sub_state = 1;
1588                 chip->tx_state = tx_idle;
1589                 /* without break */
1590         case 1:
1591                 tmp = policy_send_data(chip);
1592
1593                 if (tmp == tx_success) {
1594                         chip->hardrst_count = 0;
1595                         chip->caps_counter = 0;
1596                         chip->timer_state = T_SENDER_RESPONSE;
1597                         fusb_timer_start(&chip->timer_state_machine,
1598                                          chip->timer_state);
1599                         chip->timer_mux = T_DISABLED;
1600                         chip->sub_state++;
1601                 } else if (tmp == tx_failed) {
1602                         set_state(chip, policy_src_discovery);
1603                         break;
1604                 }
1605
1606                 if (!(evt & FLAG_EVENT))
1607                         break;
1608         default:
1609                 if (evt & EVENT_RX) {
1610                         if ((PD_HEADER_CNT(chip->rec_head) == 1) &&
1611                             (PD_HEADER_TYPE(chip->rec_head) == DMT_REQUEST)) {
1612                                 set_state(chip, policy_src_negotiate_cap);
1613                         } else {
1614                                 set_state(chip, policy_src_send_softrst);
1615                         }
1616                 } else if (evt & EVENT_TIMER_STATE) {
1617                         if (chip->hardrst_count <= N_HARDRESET_COUNT)
1618                                 set_state(chip, policy_src_send_hardrst);
1619                         else
1620                                 set_state(chip, disabled);
1621                 } else if (evt & EVENT_TIMER_MUX) {
1622                         if (chip->notify.is_pd_connected)
1623                                 set_state(chip, disabled);
1624                         else
1625                                 set_state(chip, error_recovery);
1626                 }
1627                 break;
1628         }
1629 }
1630
1631 static void fusb_state_src_negotiate_cap(struct fusb30x_chip *chip, int evt)
1632 {
1633         u32 tmp;
1634
1635         /* base on evb1 */
1636         tmp = (chip->rec_load[0] >> 28) & 0x07;
1637         if (tmp > chip->n_caps_used)
1638                 set_state(chip, policy_src_cap_response);
1639         else
1640                 set_state(chip, policy_src_transition_supply);
1641 }
1642
1643 static void fusb_state_src_transition_supply(struct fusb30x_chip *chip,
1644                                              int evt)
1645 {
1646         u32 tmp;
1647
1648         switch (chip->sub_state) {
1649         case 0:
1650                 set_mesg(chip, CMT_ACCEPT, CONTROLMESSAGE);
1651                 chip->tx_state = tx_idle;
1652                 chip->sub_state++;
1653                 /* without break */
1654         case 1:
1655                 tmp = policy_send_data(chip);
1656                 if (tmp == tx_success) {
1657                         chip->timer_state = T_SRC_TRANSITION;
1658                         chip->sub_state++;
1659                         fusb_timer_start(&chip->timer_state_machine,
1660                                          chip->timer_state);
1661                 } else if (tmp == tx_failed) {
1662                         set_state(chip, policy_src_send_softrst);
1663                 }
1664                 break;
1665         case 2:
1666                 if (evt & EVENT_TIMER_STATE) {
1667                         chip->notify.is_pd_connected = 1;
1668                         platform_set_vbus_lvl_enable(chip, 1, 0);
1669                         set_mesg(chip, CMT_PS_RDY, CONTROLMESSAGE);
1670                         chip->tx_state = tx_idle;
1671                         chip->sub_state++;
1672                         chip->work_continue = 1;
1673                 }
1674                 break;
1675         default:
1676                 tmp = policy_send_data(chip);
1677                 if (tmp == tx_success) {
1678                         dev_info(chip->dev,
1679                                  "PD connected as DFP, supporting 5V\n");
1680                         set_state(chip, policy_src_ready);
1681                 } else if (tmp == tx_failed) {
1682                         set_state(chip, policy_src_send_softrst);
1683                 }
1684                 break;
1685         }
1686 }
1687
1688 static void fusb_state_src_cap_response(struct fusb30x_chip *chip, int evt)
1689 {
1690         u32 tmp;
1691
1692         switch (chip->sub_state) {
1693         case 0:
1694                 set_mesg(chip, CMT_REJECT, CONTROLMESSAGE);
1695                 chip->tx_state = tx_idle;
1696                 chip->sub_state++;
1697                 /* without break */
1698         default:
1699                 tmp = policy_send_data(chip);
1700                 if (tmp == tx_success) {
1701                         if (chip->notify.is_pd_connected) {
1702                                 dev_info(chip->dev,
1703                                          "PD connected as DFP, supporting 5V\n");
1704                                 set_state(chip, policy_src_ready);
1705                         } else {
1706                                 set_state(chip, policy_src_send_hardrst);
1707                         }
1708                 } else if (tmp == tx_failed) {
1709                         set_state(chip, policy_src_send_softrst);
1710                 }
1711                 break;
1712         }
1713 }
1714
1715 static void fusb_state_src_transition_default(struct fusb30x_chip *chip,
1716                                               int evt)
1717 {
1718         switch (chip->sub_state) {
1719         case 0:
1720                 chip->notify.is_pd_connected = 0;
1721                 platform_set_vbus_lvl_enable(chip, 0, 0);
1722                 if (chip->notify.data_role)
1723                         regmap_update_bits(chip->regmap,
1724                                            FUSB_REG_SWITCHES1,
1725                                            SWITCHES1_DATAROLE,
1726                                            SWITCHES1_DATAROLE);
1727                 else
1728                         regmap_update_bits(chip->regmap,
1729                                            FUSB_REG_SWITCHES1,
1730                                            SWITCHES1_DATAROLE,
1731                                            0);
1732
1733                 chip->timer_state = T_SRC_RECOVER;
1734                 fusb_timer_start(&chip->timer_state_machine,
1735                                  chip->timer_state);
1736                 chip->sub_state++;
1737                 break;
1738         default:
1739                 if (evt & EVENT_TIMER_STATE) {
1740                         platform_set_vbus_lvl_enable(chip, 1, 0);
1741                         chip->timer_mux = T_NO_RESPONSE;
1742                         fusb_timer_start(&chip->timer_mux_machine,
1743                                          chip->timer_mux);
1744                         set_state(chip, policy_src_startup);
1745                         dev_dbg(chip->dev, "reset over-> src startup\n");
1746                 }
1747                 break;
1748         }
1749 }
1750
1751 static void fusb_state_src_ready(struct fusb30x_chip *chip, int evt)
1752 {
1753         if (evt & EVENT_RX) {
1754                 if ((PD_HEADER_CNT(chip->rec_head)) &&
1755                     (PD_HEADER_TYPE(chip->rec_head) == DMT_VENDERDEFINED)) {
1756                         process_vdm_msg(chip);
1757                         chip->work_continue = 1;
1758                         chip->timer_state = T_DISABLED;
1759                 }
1760         }
1761
1762         /* TODO: swap function would be added here later on*/
1763
1764         if (!chip->partner_cap[0])
1765                 set_state(chip, policy_src_get_sink_caps);
1766         else
1767                 auto_vdm_machine(chip, evt);
1768 }
1769
1770 static void fusb_state_src_get_sink_cap(struct fusb30x_chip *chip, int evt)
1771 {
1772         u32 tmp;
1773
1774         switch (chip->sub_state) {
1775         case 0:
1776                 set_mesg(chip, CMT_GETSINKCAP, CONTROLMESSAGE);
1777                 chip->tx_state = tx_idle;
1778                 chip->sub_state++;
1779                 /* without break */
1780         case 1:
1781                 tmp = policy_send_data(chip);
1782                 if (tmp == tx_success) {
1783                         chip->timer_state = T_SENDER_RESPONSE;
1784                         chip->sub_state++;
1785                         fusb_timer_start(&chip->timer_state_machine,
1786                                          chip->timer_state);
1787                 } else if (tmp == tx_failed) {
1788                         set_state(chip, policy_src_send_softrst);
1789                 }
1790
1791                 if (!(evt & FLAG_EVENT))
1792                         break;
1793         default:
1794                 if (evt & EVENT_RX) {
1795                         if ((PD_HEADER_CNT(chip->rec_head)) &&
1796                             (PD_HEADER_TYPE(chip->rec_head) ==
1797                              DMT_SINKCAPABILITIES)) {
1798                                 for (tmp = 0;
1799                                      tmp < PD_HEADER_CNT(chip->rec_head);
1800                                      tmp++) {
1801                                         chip->partner_cap[tmp] =
1802                                                 chip->rec_load[tmp];
1803                                 }
1804                                 set_state(chip, policy_src_ready);
1805                         } else {
1806                                 chip->partner_cap[0] = 0xffffffff;
1807                                 set_state(chip, policy_src_ready);
1808                         }
1809                 } else if (evt & EVENT_TIMER_STATE) {
1810                         dev_warn(chip->dev, "Get sink cap time out\n");
1811                         chip->partner_cap[0] = 0xffffffff;
1812                         set_state(chip, policy_src_ready);
1813                 }
1814         }
1815 }
1816
1817 static void fusb_state_src_send_hardreset(struct fusb30x_chip *chip, int evt)
1818 {
1819         u32 tmp;
1820
1821         switch (chip->sub_state) {
1822         case 0:
1823                 chip->tx_state = tx_idle;
1824                 chip->sub_state++;
1825                 /* without break */
1826         default:
1827                 tmp = policy_send_hardrst(chip, evt);
1828                 if (tmp == tx_success) {
1829                         chip->hardrst_count++;
1830                         set_state(chip, policy_src_transition_default);
1831                 } else if (tmp == tx_failed) {
1832                         /* can't reach here */
1833                         set_state(chip, error_recovery);
1834                 }
1835                 break;
1836         }
1837 }
1838
1839 static void fusb_state_src_send_softreset(struct fusb30x_chip *chip, int evt)
1840 {
1841         u32 tmp;
1842
1843         switch (chip->sub_state) {
1844         case 0:
1845                 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
1846                 chip->tx_state = tx_idle;
1847                 chip->sub_state++;
1848                 /* without break */
1849         case 1:
1850                 tmp = policy_send_data(chip);
1851                 if (tmp == tx_success) {
1852                         chip->timer_state = T_SENDER_RESPONSE;
1853                         chip->sub_state++;
1854                         fusb_timer_start(&chip->timer_state_machine,
1855                                          chip->timer_state);
1856                 } else if (tmp == tx_failed) {
1857                         set_state(chip, policy_src_send_hardrst);
1858                 }
1859
1860                 if (!(evt & FLAG_EVENT))
1861                         break;
1862         default:
1863                 if (evt & EVENT_RX) {
1864                         if ((!PD_HEADER_CNT(chip->rec_head)) &&
1865                             (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
1866                                 set_state(chip, policy_src_send_caps);
1867                 } else if (evt & EVENT_TIMER_STATE) {
1868                         set_state(chip, policy_src_send_hardrst);
1869                 }
1870                 break;
1871         }
1872 }
1873
1874 static void fusb_state_snk_startup(struct fusb30x_chip *chip, int evt)
1875 {
1876         chip->notify.is_pd_connected = 0;
1877         chip->msg_id = 0;
1878         chip->vdm_state = 0;
1879         chip->vdm_substate = 0;
1880         chip->vdm_send_state = 0;
1881         chip->val_tmp = 0;
1882         chip->pos_power = 0;
1883
1884         memset(chip->partner_cap, 0, sizeof(chip->partner_cap));
1885
1886         tcpm_set_msg_header(chip);
1887         tcpm_set_polarity(chip, chip->cc_polarity);
1888         tcpm_set_rx_enable(chip, 1);
1889         set_state(chip, policy_snk_discovery);
1890 }
1891
1892 static void fusb_state_snk_discovery(struct fusb30x_chip *chip, int evt)
1893 {
1894         set_state(chip, policy_snk_wait_caps);
1895         chip->timer_state = T_TYPEC_SINK_WAIT_CAP;
1896         fusb_timer_start(&chip->timer_state_machine,
1897                          chip->timer_state);
1898 }
1899
1900 static void fusb_state_snk_wait_caps(struct fusb30x_chip *chip, int evt)
1901 {
1902         if (evt & EVENT_RX) {
1903                 if (PD_HEADER_CNT(chip->rec_head) &&
1904                     PD_HEADER_TYPE(chip->rec_head) == DMT_SOURCECAPABILITIES) {
1905                         chip->timer_mux = T_DISABLED;
1906                         set_state(chip, policy_snk_evaluate_caps);
1907                 }
1908         } else if (evt & EVENT_TIMER_STATE) {
1909                 if (chip->hardrst_count <= N_HARDRESET_COUNT)
1910                         set_state(chip, policy_snk_send_hardrst);
1911                 else
1912                         set_state(chip, disabled);
1913         } else if ((evt & EVENT_TIMER_MUX) &&
1914                    (chip->hardrst_count > N_HARDRESET_COUNT)) {
1915                 if (chip->notify.is_pd_connected)
1916                         set_state(chip, error_recovery);
1917                 else
1918                         set_state(chip, disabled);
1919         }
1920 }
1921
1922 static void fusb_state_snk_evaluate_caps(struct fusb30x_chip *chip, int evt)
1923 {
1924         u32 tmp;
1925
1926         chip->hardrst_count = 0;
1927         chip->pos_power = 0;
1928
1929         for (tmp = 0; tmp < PD_HEADER_CNT(chip->rec_head); tmp++) {
1930                 switch (CAP_POWER_TYPE(chip->rec_load[tmp])) {
1931                 case 0:
1932                         /* Fixed Supply */
1933                         if (CAP_FPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1934                                 chip->pos_power = tmp + 1;
1935                         break;
1936                 case 1:
1937                         /* Battery */
1938                         if (CAP_VPDO_VOLTAGE(chip->rec_load[tmp]) <= 100)
1939                                 chip->pos_power = tmp + 1;
1940                         break;
1941                 default:
1942                         /* not meet battery caps */
1943                         break;
1944                 }
1945         }
1946         fusb302_set_pos_power_by_charge_ic(chip);
1947
1948         if ((!chip->pos_power) || (chip->pos_power > 7)) {
1949                 chip->pos_power = 0;
1950                 set_state(chip, policy_snk_wait_caps);
1951         } else {
1952                 set_state(chip, policy_snk_select_cap);
1953         }
1954 }
1955
1956 static void fusb_state_snk_select_cap(struct fusb30x_chip *chip, int evt)
1957 {
1958         u32 tmp;
1959
1960         switch (chip->sub_state) {
1961         case 0:
1962                 set_mesg(chip, DMT_REQUEST, DATAMESSAGE);
1963                 chip->sub_state = 1;
1964                 chip->tx_state = tx_idle;
1965                 /* without break */
1966         case 1:
1967                 tmp = policy_send_data(chip);
1968
1969                 if (tmp == tx_success) {
1970                         chip->timer_state = T_SENDER_RESPONSE;
1971                         fusb_timer_start(&chip->timer_state_machine,
1972                                          chip->timer_state);
1973                         chip->sub_state++;
1974                 } else if (tmp == tx_failed) {
1975                         set_state(chip, policy_snk_discovery);
1976                         break;
1977                 }
1978
1979                 if (!(evt & FLAG_EVENT))
1980                         break;
1981         default:
1982                 if (evt & EVENT_RX) {
1983                         if (!PD_HEADER_CNT(chip->rec_head)) {
1984                                 switch (PD_HEADER_TYPE(chip->rec_head)) {
1985                                 case CMT_ACCEPT:
1986                                         set_state(chip,
1987                                                   policy_snk_transition_sink);
1988                                         chip->timer_state = T_PS_TRANSITION;
1989                                         fusb_timer_start(&chip->timer_state_machine,
1990                                                          chip->timer_state);
1991                                         break;
1992                                 case CMT_WAIT:
1993                                 case CMT_REJECT:
1994                                         if (chip->notify.is_pd_connected) {
1995                                                 dev_info(chip->dev,
1996                                                          "PD connected as UFP, fetching 5V\n");
1997                                                 set_state(chip,
1998                                                           policy_snk_ready);
1999                                         } else {
2000                                                 set_state(chip,
2001                                                           policy_snk_wait_caps);
2002                                                 /*
2003                                                  * make sure don't send
2004                                                  * hard reset to prevent
2005                                                  * infinite loop
2006                                                  */
2007                                                 chip->hardrst_count =
2008                                                         N_HARDRESET_COUNT + 1;
2009                                         }
2010                                         break;
2011                                 default:
2012                                         break;
2013                                 }
2014                         }
2015                 } else if (evt & EVENT_TIMER_STATE) {
2016                         set_state(chip, policy_snk_send_hardrst);
2017                 }
2018                 break;
2019         }
2020 }
2021
2022 static void fusb_state_snk_transition_sink(struct fusb30x_chip *chip, int evt)
2023 {
2024         if (evt & EVENT_RX) {
2025                 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2026                     (PD_HEADER_TYPE(chip->rec_head) == CMT_PS_RDY)) {
2027                         chip->notify.is_pd_connected = 1;
2028                         dev_info(chip->dev,
2029                                  "PD connected as UFP, fetching 5V\n");
2030                         set_state(chip, policy_snk_ready);
2031                 } else if ((PD_HEADER_CNT(chip->rec_head)) &&
2032                            (PD_HEADER_TYPE(chip->rec_head) ==
2033                             DMT_SOURCECAPABILITIES)) {
2034                         set_state(chip, policy_snk_evaluate_caps);
2035                 }
2036         } else if (evt & EVENT_TIMER_STATE) {
2037                 set_state(chip, policy_snk_send_hardrst);
2038         }
2039 }
2040
2041 static void fusb_state_snk_transition_default(struct fusb30x_chip *chip,
2042                                               int evt)
2043 {
2044         switch (chip->sub_state) {
2045         case 0:
2046                 chip->notify.is_pd_connected = 0;
2047                 chip->timer_mux = T_NO_RESPONSE;
2048                 fusb_timer_start(&chip->timer_mux_machine,
2049                                  chip->timer_mux);
2050                 chip->timer_state = T_PS_HARD_RESET_MAX + T_SAFE_0V;
2051                 fusb_timer_start(&chip->timer_state_machine,
2052                                  chip->timer_state);
2053                 if (chip->notify.data_role)
2054                         tcpm_set_msg_header(chip);
2055
2056                 chip->sub_state++;
2057         case 1:
2058                 if (!tcpm_check_vbus(chip)) {
2059                         chip->sub_state++;
2060                         chip->timer_state = T_SRC_RECOVER_MAX + T_SRC_TURN_ON;
2061                         fusb_timer_start(&chip->timer_state_machine,
2062                                          chip->timer_state);
2063                 } else if (evt & EVENT_TIMER_STATE) {
2064                         set_state(chip, policy_snk_startup);
2065                 }
2066                 break;
2067         default:
2068                 if (tcpm_check_vbus(chip)) {
2069                         chip->timer_state = T_DISABLED;
2070                         set_state(chip, policy_snk_startup);
2071                 } else if (evt & EVENT_TIMER_STATE) {
2072                         set_state(chip, policy_snk_startup);
2073                 }
2074                 break;
2075         }
2076 }
2077
2078 static void fusb_state_snk_ready(struct fusb30x_chip *chip, int evt)
2079 {
2080         /* TODO: snk_ready_function would be added later on*/
2081         platform_fusb_notify(chip);
2082 }
2083
2084 static void fusb_state_snk_send_hardreset(struct fusb30x_chip *chip, int evt)
2085 {
2086         u32 tmp;
2087
2088         switch (chip->sub_state) {
2089         case 0:
2090                 chip->tx_state = tx_idle;
2091                 chip->sub_state++;
2092         default:
2093                 tmp = policy_send_hardrst(chip, evt);
2094                 if (tmp == tx_success) {
2095                         chip->hardrst_count++;
2096                         set_state(chip, policy_snk_transition_default);
2097                 } else if (tmp == tx_failed) {
2098                         set_state(chip, error_recovery);
2099                 }
2100                 break;
2101         }
2102 }
2103
2104 static void fusb_state_snk_send_softreset(struct fusb30x_chip *chip, int evt)
2105 {
2106         u32 tmp;
2107
2108         switch (chip->sub_state) {
2109         case 0:
2110                 set_mesg(chip, CMT_SOFTRESET, CONTROLMESSAGE);
2111                 chip->tx_state = tx_idle;
2112                 chip->sub_state++;
2113         case 1:
2114                 tmp = policy_send_data(chip);
2115                 if (tmp == tx_success) {
2116                         chip->timer_state = T_SENDER_RESPONSE;
2117                         chip->sub_state++;
2118                         fusb_timer_start(&chip->timer_state_machine,
2119                                          chip->timer_state);
2120                 } else if (tmp == tx_failed) {
2121                         /* can't reach here */
2122                         set_state(chip, policy_snk_send_hardrst);
2123                 }
2124
2125                 if (!(evt & FLAG_EVENT))
2126                         break;
2127         default:
2128                 if (evt & EVENT_RX) {
2129                         if ((!PD_HEADER_CNT(chip->rec_head)) &&
2130                             (PD_HEADER_TYPE(chip->rec_head) == CMT_ACCEPT))
2131                                 set_state(chip, policy_snk_wait_caps);
2132                 } else if (evt & EVENT_TIMER_STATE) {
2133                         set_state(chip, policy_snk_send_hardrst);
2134                 }
2135                 break;
2136         }
2137 }
2138
2139 static void state_machine_typec(struct fusb30x_chip *chip)
2140 {
2141         int evt = 0;
2142         int cc1, cc2;
2143
2144         tcpc_alert(chip, &evt);
2145         mux_alert(chip, &evt);
2146         if (!evt)
2147                 goto BACK;
2148
2149         if (chip->notify.is_cc_connected) {
2150                 if (evt & EVENT_CC) {
2151                         if ((chip->cc_state & 0x04) &&
2152                             (chip->conn_state !=
2153                              policy_snk_transition_default)) {
2154                                 if (!tcpm_check_vbus(chip))
2155                                         set_state_unattached(chip);
2156                         } else if (chip->conn_state !=
2157                                    policy_src_transition_default) {
2158                                 tcpm_get_cc(chip, &cc1, &cc2);
2159                                 if (!(chip->cc_state & 0x01))
2160                                         cc1 = cc2;
2161                                 if (cc1 == TYPEC_CC_VOLT_OPEN)
2162                                         set_state_unattached(chip);
2163                         }
2164                 }
2165         }
2166
2167         if (evt & EVENT_RX) {
2168                 tcpm_get_message(chip);
2169                 if ((!PD_HEADER_CNT(chip->rec_head)) &&
2170                     (PD_HEADER_TYPE(chip->rec_head) == CMT_SOFTRESET)) {
2171                         if (chip->notify.power_role)
2172                                 set_state(chip, policy_src_send_softrst);
2173                         else
2174                                 set_state(chip, policy_snk_send_softrst);
2175                 }
2176         }
2177
2178         if (evt & EVENT_TX) {
2179                 if (chip->tx_state == tx_success)
2180                         chip->msg_id++;
2181         }
2182         switch (chip->conn_state) {
2183         case disabled:
2184                 fusb_state_disabled(chip, evt);
2185                 break;
2186         case error_recovery:
2187                 set_state_unattached(chip);
2188                 break;
2189         case unattached:
2190                 fusb_state_unattached(chip, evt);
2191                 break;
2192         case attach_wait_sink:
2193                 fusb_state_attach_wait_sink(chip, evt);
2194                 break;
2195         case attach_wait_source:
2196                 fusb_state_attach_wait_source(chip, evt);
2197                 break;
2198         case attached_source:
2199                 fusb_state_attached_source(chip, evt);
2200                 break;
2201         case attached_sink:
2202                 fusb_state_attached_sink(chip, evt);
2203                 break;
2204
2205         /* POWER DELIVERY */
2206         case policy_src_startup:
2207                 fusb_state_src_startup(chip, evt);
2208                 break;
2209         case policy_src_discovery:
2210                 fusb_state_src_discovery(chip, evt);
2211                 break;
2212         case policy_src_send_caps:
2213                 fusb_state_src_send_caps(chip, evt);
2214                 if (chip->conn_state != policy_src_negotiate_cap)
2215                         break;
2216         case policy_src_negotiate_cap:
2217                 fusb_state_src_negotiate_cap(chip, evt);
2218
2219         case policy_src_transition_supply:
2220                 fusb_state_src_transition_supply(chip, evt);
2221                 break;
2222         case policy_src_cap_response:
2223                 fusb_state_src_cap_response(chip, evt);
2224                 break;
2225         case policy_src_transition_default:
2226                 fusb_state_src_transition_default(chip, evt);
2227                 break;
2228         case policy_src_ready:
2229                 fusb_state_src_ready(chip, evt);
2230                 break;
2231         case policy_src_get_sink_caps:
2232                 fusb_state_src_get_sink_cap(chip, evt);
2233                 break;
2234         case policy_src_send_hardrst:
2235                 fusb_state_src_send_hardreset(chip, evt);
2236                 break;
2237         case policy_src_send_softrst:
2238                 fusb_state_src_send_softreset(chip, evt);
2239                 break;
2240
2241         /* UFP */
2242         case policy_snk_startup:
2243                 fusb_state_snk_startup(chip, evt);
2244                 break;
2245         case policy_snk_discovery:
2246                 fusb_state_snk_discovery(chip, evt);
2247                 break;
2248         case policy_snk_wait_caps:
2249                 fusb_state_snk_wait_caps(chip, evt);
2250                 break;
2251         case policy_snk_evaluate_caps:
2252                 fusb_state_snk_evaluate_caps(chip, evt);
2253                 /* without break */
2254         case policy_snk_select_cap:
2255                 fusb_state_snk_select_cap(chip, evt);
2256                 break;
2257         case policy_snk_transition_sink:
2258                 fusb_state_snk_transition_sink(chip, evt);
2259                 break;
2260         case policy_snk_transition_default:
2261                 fusb_state_snk_transition_default(chip, evt);
2262                 break;
2263         case policy_snk_ready:
2264                 fusb_state_snk_ready(chip, evt);
2265                 break;
2266         case policy_snk_send_hardrst:
2267                 fusb_state_snk_send_hardreset(chip, evt);
2268                 break;
2269         case policy_snk_send_softrst:
2270                 fusb_state_snk_send_softreset(chip, evt);
2271                 break;
2272
2273         default:
2274                 break;
2275         }
2276
2277 BACK:
2278         if (chip->work_continue) {
2279                 queue_work(chip->fusb30x_wq, &chip->work);
2280                 return;
2281         }
2282
2283         if (!platform_get_device_irq_state(chip))
2284                 fusb_irq_enable(chip);
2285         else
2286                 queue_work(chip->fusb30x_wq, &chip->work);
2287 }
2288
2289 static irqreturn_t cc_interrupt_handler(int irq, void *dev_id)
2290 {
2291         struct fusb30x_chip *chip = dev_id;
2292
2293         queue_work(chip->fusb30x_wq, &chip->work);
2294         fusb_irq_disable(chip);
2295         return IRQ_HANDLED;
2296 }
2297
2298 static int fusb_initialize_gpio(struct fusb30x_chip *chip)
2299 {
2300         chip->gpio_int = devm_gpiod_get_optional(chip->dev, "int-n", GPIOD_IN);
2301         if (IS_ERR(chip->gpio_int))
2302                 return PTR_ERR(chip->gpio_int);
2303
2304         /* some board support vbus with other ways */
2305         chip->gpio_vbus_5v = devm_gpiod_get_optional(chip->dev, "vbus-5v",
2306                                                      GPIOD_OUT_LOW);
2307         if (IS_ERR(chip->gpio_vbus_5v))
2308                 dev_warn(chip->dev,
2309                          "Could not get named GPIO for VBus5V!\n");
2310         else
2311                 gpiod_set_raw_value(chip->gpio_vbus_5v, 0);
2312
2313         chip->gpio_vbus_other = devm_gpiod_get_optional(chip->dev,
2314                                                         "vbus-other",
2315                                                         GPIOD_OUT_LOW);
2316         if (IS_ERR(chip->gpio_vbus_other))
2317                 dev_warn(chip->dev,
2318                          "Could not get named GPIO for VBusOther!\n");
2319         else
2320                 gpiod_set_raw_value(chip->gpio_vbus_other, 0);
2321
2322         chip->gpio_discharge = devm_gpiod_get_optional(chip->dev, "discharge",
2323                                                        GPIOD_OUT_LOW);
2324         if (IS_ERR(chip->gpio_discharge)) {
2325                 dev_warn(chip->dev,
2326                          "Could not get named GPIO for discharge!\n");
2327                 chip->gpio_discharge = NULL;
2328         }
2329
2330         return 0;
2331 }
2332
2333 static enum hrtimer_restart fusb_timer_handler(struct hrtimer *timer)
2334 {
2335         int i;
2336
2337         for (i = 0; i < fusb30x_port_used; i++) {
2338                 if (timer == &fusb30x_port_info[i]->timer_state_machine) {
2339                         if (fusb30x_port_info[i]->timer_state != T_DISABLED)
2340                                 fusb30x_port_info[i]->timer_state = 0;
2341                         break;
2342                 }
2343
2344                 if (timer == &fusb30x_port_info[i]->timer_mux_machine) {
2345                         if (fusb30x_port_info[i]->timer_mux != T_DISABLED)
2346                                 fusb30x_port_info[i]->timer_mux = 0;
2347                         break;
2348                 }
2349         }
2350
2351         if (i != fusb30x_port_used)
2352                 queue_work(fusb30x_port_info[i]->fusb30x_wq,
2353                            &fusb30x_port_info[i]->work);
2354
2355         return HRTIMER_NORESTART;
2356 }
2357
2358 static void fusb_initialize_timer(struct fusb30x_chip *chip)
2359 {
2360         hrtimer_init(&chip->timer_state_machine, CLOCK_MONOTONIC,
2361                      HRTIMER_MODE_REL);
2362         chip->timer_state_machine.function = fusb_timer_handler;
2363
2364         hrtimer_init(&chip->timer_mux_machine, CLOCK_MONOTONIC,
2365                      HRTIMER_MODE_REL);
2366         chip->timer_mux_machine.function = fusb_timer_handler;
2367
2368         chip->timer_state = T_DISABLED;
2369         chip->timer_mux = T_DISABLED;
2370 }
2371
2372 static void fusb302_work_func(struct work_struct *work)
2373 {
2374         struct fusb30x_chip *chip;
2375
2376         chip = container_of(work, struct fusb30x_chip, work);
2377         state_machine_typec(chip);
2378 }
2379
2380 static int fusb30x_probe(struct i2c_client *client,
2381                          const struct i2c_device_id *id)
2382 {
2383         struct fusb30x_chip *chip;
2384         struct PD_CAP_INFO *pd_cap_info;
2385         int ret;
2386
2387         chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
2388         if (!chip)
2389                 return -ENOMEM;
2390
2391         if (fusb30x_port_used == 0xff)
2392                 return -1;
2393
2394         chip->port_num = fusb30x_port_used++;
2395         fusb30x_port_info[chip->port_num] = chip;
2396
2397         chip->dev = &client->dev;
2398         chip->regmap = devm_regmap_init_i2c(client, &fusb302_regmap_config);
2399         if (IS_ERR(chip->regmap)) {
2400                 dev_err(&client->dev, "Failed to allocate regmap!\n");
2401                 return PTR_ERR(chip->regmap);
2402         }
2403
2404         ret = fusb_initialize_gpio(chip);
2405         if (ret)
2406                 return ret;
2407
2408         fusb_initialize_timer(chip);
2409
2410         chip->fusb30x_wq = create_workqueue("fusb302_wq");
2411         INIT_WORK(&chip->work, fusb302_work_func);
2412
2413         tcpm_init(chip);
2414         tcpm_set_rx_enable(chip, 0);
2415         chip->conn_state = unattached;
2416         tcpm_set_cc(chip, FUSB_MODE_DRP);
2417
2418         chip->n_caps_used = 1;
2419         chip->source_power_supply[0] = 0x64;
2420         chip->source_max_current[0] = 0x96;
2421
2422         /*
2423          * these two variable should be 1 if support DRP,
2424          * but now we do not support swap,
2425          * it will be blanked in future
2426          */
2427         pd_cap_info = &chip->pd_cap_info;
2428         pd_cap_info->dual_role_power = 0;
2429         pd_cap_info->data_role_swap = 0;
2430
2431         pd_cap_info->externally_powered = 1;
2432         pd_cap_info->usb_suspend_support = 0;
2433         pd_cap_info->usb_communications_cap = 0;
2434         pd_cap_info->supply_type = 0;
2435         pd_cap_info->peak_current = 0;
2436
2437         chip->extcon = devm_extcon_dev_allocate(&client->dev, fusb302_cable);
2438         if (IS_ERR(chip->extcon)) {
2439                 dev_err(&client->dev, "allocat extcon failed\n");
2440                 return PTR_ERR(chip->extcon);
2441         }
2442
2443         ret = devm_extcon_dev_register(&client->dev, chip->extcon);
2444         if (ret) {
2445                 dev_err(&client->dev, "failed to register extcon: %d\n",
2446                         ret);
2447                 return ret;
2448         }
2449
2450         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2451                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2452         if (ret) {
2453                 dev_err(&client->dev,
2454                         "failed to set USB property capability: %d\n",
2455                         ret);
2456                 return ret;
2457         }
2458
2459         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2460                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2461         if (ret) {
2462                 dev_err(&client->dev,
2463                         "failed to set USB_HOST property capability: %d\n",
2464                         ret);
2465                 return ret;
2466         }
2467
2468         ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2469                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2470         if (ret) {
2471                 dev_err(&client->dev,
2472                         "failed to set DISP_DP property capability: %d\n",
2473                         ret);
2474                 return ret;
2475         }
2476
2477         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB,
2478                                              EXTCON_PROP_USB_SS);
2479         if (ret) {
2480                 dev_err(&client->dev,
2481                         "failed to set USB USB_SS property capability: %d\n",
2482                         ret);
2483                 return ret;
2484         }
2485
2486         ret = extcon_set_property_capability(chip->extcon, EXTCON_USB_HOST,
2487                                              EXTCON_PROP_USB_SS);
2488         if (ret) {
2489                 dev_err(&client->dev,
2490                         "failed to set USB_HOST USB_SS property capability: %d\n",
2491                         ret);
2492                 return ret;
2493         }
2494
2495         ret = extcon_set_property_capability(chip->extcon, EXTCON_DISP_DP,
2496                                              EXTCON_PROP_USB_SS);
2497         if (ret) {
2498                 dev_err(&client->dev,
2499                         "failed to set DISP_DP USB_SS property capability: %d\n",
2500                         ret);
2501                 return ret;
2502         }
2503
2504         ret = extcon_set_property_capability(chip->extcon, EXTCON_CHG_USB_FAST,
2505                                              EXTCON_PROP_USB_TYPEC_POLARITY);
2506         if (ret) {
2507                 dev_err(&client->dev,
2508                         "failed to set USB_PD property capability: %d\n", ret);
2509                 return ret;
2510         }
2511
2512         i2c_set_clientdata(client, chip);
2513
2514         spin_lock_init(&chip->irq_lock);
2515         chip->enable_irq = 1;
2516
2517         chip->gpio_int_irq = gpiod_to_irq(chip->gpio_int);
2518         if (chip->gpio_int_irq < 0) {
2519                 dev_err(&client->dev,
2520                         "Unable to request IRQ for INT_N GPIO! %d\n",
2521                         ret);
2522                 ret = chip->gpio_int_irq;
2523                 goto IRQ_ERR;
2524         }
2525
2526         ret = devm_request_threaded_irq(&client->dev,
2527                                         chip->gpio_int_irq,
2528                                         NULL,
2529                                         cc_interrupt_handler,
2530                                         IRQF_ONESHOT | IRQF_TRIGGER_LOW,
2531                                         client->name,
2532                                         chip);
2533         if (ret) {
2534                 dev_err(&client->dev, "irq request failed\n");
2535                 goto IRQ_ERR;
2536         }
2537
2538         dev_info(chip->dev, "port %d probe success\n", chip->port_num);
2539
2540         return 0;
2541
2542 IRQ_ERR:
2543         destroy_workqueue(chip->fusb30x_wq);
2544         return ret;
2545 }
2546
2547 static int fusb30x_remove(struct i2c_client *client)
2548 {
2549         struct fusb30x_chip *chip = i2c_get_clientdata(client);
2550
2551         destroy_workqueue(chip->fusb30x_wq);
2552         return 0;
2553 }
2554
2555 static void fusb30x_shutdown(struct i2c_client *client)
2556 {
2557         struct fusb30x_chip *chip = i2c_get_clientdata(client);
2558
2559         if (chip->gpio_vbus_5v)
2560                 gpiod_set_value(chip->gpio_vbus_5v, 0);
2561         if (chip->gpio_discharge) {
2562                 gpiod_set_value(chip->gpio_discharge, 1);
2563                 msleep(100);
2564                 gpiod_set_value(chip->gpio_discharge, 0);
2565         }
2566 }
2567
2568 static const struct of_device_id fusb30x_dt_match[] = {
2569         { .compatible = FUSB30X_I2C_DEVICETREE_NAME },
2570         {},
2571 };
2572 MODULE_DEVICE_TABLE(of, fusb30x_dt_match);
2573
2574 static const struct i2c_device_id fusb30x_i2c_device_id[] = {
2575         { FUSB30X_I2C_DRIVER_NAME, 0 },
2576         {}
2577 };
2578 MODULE_DEVICE_TABLE(i2c, fusb30x_i2c_device_id);
2579
2580 static struct i2c_driver fusb30x_driver = {
2581         .driver = {
2582                 .name = FUSB30X_I2C_DRIVER_NAME,
2583                 .of_match_table = of_match_ptr(fusb30x_dt_match),
2584         },
2585         .probe = fusb30x_probe,
2586         .remove = fusb30x_remove,
2587         .shutdown = fusb30x_shutdown,
2588         .id_table = fusb30x_i2c_device_id,
2589 };
2590
2591 module_i2c_driver(fusb30x_driver);
2592
2593 MODULE_LICENSE("GPL");
2594 MODULE_AUTHOR("zain wang <zain.wang@rock-chips.com>");
2595 MODULE_DESCRIPTION("fusb302 typec pd driver");