2 * System Control and Power Interface (SCPI) Message Protocol driver
4 * Copyright (C) 2014 ARM Ltd.
5 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
19 #include <linux/of_device.h>
20 #include <linux/platform_device.h>
21 #include <linux/err.h>
22 #include <linux/export.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/printk.h>
26 #include <linux/mailbox_client.h>
27 #include <linux/scpi_protocol.h>
28 #include <linux/slab.h>
29 #include <linux/rockchip-mailbox.h>
30 #include <linux/rockchip/common.h>
34 #define CMD_ID_SHIFT 0
35 #define CMD_ID_MASK 0xff
36 #define CMD_SENDER_ID_SHIFT 8
37 #define CMD_SENDER_ID_MASK 0xff
38 #define CMD_DATA_SIZE_SHIFT 20
39 #define CMD_DATA_SIZE_MASK 0x1ff
40 #define PACK_SCPI_CMD(cmd, sender, txsz) \
41 ((((cmd) & CMD_ID_MASK) << CMD_ID_SHIFT) | \
42 (((sender) & CMD_SENDER_ID_MASK) << CMD_SENDER_ID_SHIFT) | \
43 (((txsz) & CMD_DATA_SIZE_MASK) << CMD_DATA_SIZE_SHIFT))
45 #define MAX_DVFS_DOMAINS 3
46 #define MAX_DVFS_OPPS 8
47 #define DVFS_LATENCY(hdr) ((hdr) >> 16)
48 #define DVFS_OPP_COUNT(hdr) (((hdr) >> 8) & 0xff)
50 struct scpi_data_buf {
52 struct rockchip_mbox_msg *data;
53 struct completion complete;
56 static int high_priority_cmds[] = {
57 SCPI_CMD_GET_CSS_PWR_STATE,
58 SCPI_CMD_CFG_PWR_STATE_STAT,
59 SCPI_CMD_GET_PWR_STATE_STAT,
64 SCPI_CMD_SET_CLOCK_INDEX,
65 SCPI_CMD_SET_CLOCK_VALUE,
66 SCPI_CMD_GET_CLOCK_VALUE,
69 SCPI_CMD_SENSOR_CFG_PERIODIC,
70 SCPI_CMD_SENSOR_CFG_BOUNDS,
73 static struct scpi_opp *scpi_opps[MAX_DVFS_DOMAINS];
75 static struct device *the_scpi_device;
77 static int scpi_linux_errmap[SCPI_ERR_MAX] = {
78 0, -EINVAL, -ENOEXEC, -EMSGSIZE,
79 -EINVAL, -EACCES, -ERANGE, -ETIMEDOUT,
80 -ENOMEM, -EINVAL, -EOPNOTSUPP, -EIO,
83 static inline int scpi_to_linux_errno(int errno)
85 if (errno >= SCPI_SUCCESS && errno < SCPI_ERR_MAX)
86 return scpi_linux_errmap[errno];
90 static bool high_priority_chan_supported(int cmd)
94 for (idx = 0; idx < ARRAY_SIZE(high_priority_cmds); idx++)
95 if (cmd == high_priority_cmds[idx])
100 static void scpi_rx_callback(struct mbox_client *cl, void *msg)
102 struct rockchip_mbox_msg *data = (struct rockchip_mbox_msg *)msg;
103 struct scpi_data_buf *scpi_buf = data->cl_data;
105 complete(&scpi_buf->complete);
108 static int send_scpi_cmd(struct scpi_data_buf *scpi_buf, bool high_priority)
110 struct mbox_chan *chan;
111 struct mbox_client cl;
112 struct rockchip_mbox_msg *data = scpi_buf->data;
116 if (!the_scpi_device) {
117 pr_err("Scpi initializes unsuccessfully\n");
121 cl.dev = the_scpi_device;
122 cl.rx_callback = scpi_rx_callback;
125 cl.knows_txdone = false;
127 chan = mbox_request_channel(&cl, high_priority);
129 return PTR_ERR(chan);
131 init_completion(&scpi_buf->complete);
132 if (mbox_send_message(chan, (void *)data) < 0) {
133 status = SCPI_ERR_TIMEOUT;
137 ret = wait_for_completion_timeout(&scpi_buf->complete,
138 msecs_to_jiffies(1000));
140 status = SCPI_ERR_TIMEOUT;
143 status = *(u32 *)(data->rx_buf); /* read first word */
146 mbox_free_channel(chan);
148 return scpi_to_linux_errno(status);
151 #define SCPI_SETUP_DBUF(scpi_buf, mbox_buf, _client_id,\
152 _cmd, _tx_buf, _rx_buf) \
154 struct rockchip_mbox_msg *pdata = &mbox_buf; \
156 pdata->tx_buf = &_tx_buf; \
157 pdata->tx_size = sizeof(_tx_buf); \
158 pdata->rx_buf = &_rx_buf; \
159 pdata->rx_size = sizeof(_rx_buf); \
160 scpi_buf.client_id = _client_id; \
161 scpi_buf.data = pdata; \
164 static int scpi_execute_cmd(struct scpi_data_buf *scpi_buf)
166 struct rockchip_mbox_msg *data;
169 if (!scpi_buf || !scpi_buf->data)
172 data = scpi_buf->data;
173 high_priority = high_priority_chan_supported(data->cmd);
174 data->cmd = PACK_SCPI_CMD(data->cmd, scpi_buf->client_id,
176 data->cl_data = scpi_buf;
178 return send_scpi_cmd(scpi_buf, high_priority);
181 unsigned long scpi_clk_get_val(u16 clk_id)
183 struct scpi_data_buf sdata;
184 struct rockchip_mbox_msg mdata;
190 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_CLOCKS,
191 SCPI_CMD_GET_CLOCK_VALUE, clk_id, buf);
192 if (scpi_execute_cmd(&sdata))
197 EXPORT_SYMBOL_GPL(scpi_clk_get_val);
199 int scpi_clk_set_val(u16 clk_id, unsigned long rate)
201 struct scpi_data_buf sdata;
202 struct rockchip_mbox_msg mdata;
209 buf.clk_rate = (u32)rate;
212 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_CLOCKS,
213 SCPI_CMD_SET_CLOCK_VALUE, buf, stat);
214 return scpi_execute_cmd(&sdata);
216 EXPORT_SYMBOL_GPL(scpi_clk_set_val);
218 struct scpi_opp *scpi_dvfs_get_opps(u8 domain)
220 struct scpi_data_buf sdata;
221 struct rockchip_mbox_msg mdata;
225 struct scpi_opp_entry opp[MAX_DVFS_OPPS];
227 struct scpi_opp *opps;
231 if (domain >= MAX_DVFS_DOMAINS)
232 return ERR_PTR(-EINVAL);
234 if (scpi_opps[domain]) /* data already populated */
235 return scpi_opps[domain];
237 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DVFS,
238 SCPI_CMD_GET_DVFS_INFO, domain, buf);
239 ret = scpi_execute_cmd(&sdata);
243 opps = kmalloc(sizeof(*opps), GFP_KERNEL);
245 return ERR_PTR(-ENOMEM);
247 count = DVFS_OPP_COUNT(buf.header);
248 opps_sz = count * sizeof(*(opps->opp));
251 opps->latency = DVFS_LATENCY(buf.header);
252 opps->opp = kmalloc(opps_sz, GFP_KERNEL);
255 return ERR_PTR(-ENOMEM);
258 memcpy(opps->opp, &buf.opp[0], opps_sz);
259 scpi_opps[domain] = opps;
263 EXPORT_SYMBOL_GPL(scpi_dvfs_get_opps);
265 int scpi_dvfs_get_idx(u8 domain)
267 struct scpi_data_buf sdata;
268 struct rockchip_mbox_msg mdata;
275 if (domain >= MAX_DVFS_DOMAINS)
278 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DVFS,
279 SCPI_CMD_GET_DVFS, domain, buf);
280 ret = scpi_execute_cmd(&sdata);
286 EXPORT_SYMBOL_GPL(scpi_dvfs_get_idx);
288 int scpi_dvfs_set_idx(u8 domain, u8 idx)
290 struct scpi_data_buf sdata;
291 struct rockchip_mbox_msg mdata;
299 buf.dvfs_domain = domain;
301 if (domain >= MAX_DVFS_DOMAINS)
304 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DVFS,
305 SCPI_CMD_SET_DVFS, buf, stat);
306 return scpi_execute_cmd(&sdata);
308 EXPORT_SYMBOL_GPL(scpi_dvfs_set_idx);
310 int scpi_get_sensor(char *name)
312 struct scpi_data_buf sdata;
313 struct rockchip_mbox_msg mdata;
328 /* This should be handled by a generic macro */
330 struct rockchip_mbox_msg *pdata = &mdata;
332 pdata->cmd = SCPI_CMD_SENSOR_CAPABILITIES;
334 pdata->rx_buf = &cap_buf;
335 pdata->rx_size = sizeof(cap_buf);
336 sdata.client_id = SCPI_CL_THERMAL;
340 ret = scpi_execute_cmd(&sdata);
345 for (sensor_id = 0; sensor_id < cap_buf.sensors; sensor_id++) {
346 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL,
347 SCPI_CMD_SENSOR_INFO, sensor_id, info_buf);
348 ret = scpi_execute_cmd(&sdata);
352 if (!strcmp(name, info_buf.name)) {
360 EXPORT_SYMBOL_GPL(scpi_get_sensor);
362 int scpi_get_sensor_value(u16 sensor, u32 *val)
364 struct scpi_data_buf sdata;
365 struct rockchip_mbox_msg mdata;
372 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_THERMAL, SCPI_CMD_SENSOR_VALUE,
375 ret = scpi_execute_cmd(&sdata);
381 EXPORT_SYMBOL_GPL(scpi_get_sensor_value);
383 static int scpi_get_version(u32 old, u32 *ver)
385 struct scpi_data_buf sdata;
386 struct rockchip_mbox_msg mdata;
393 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS, SCPI_SYS_GET_VERSION,
396 ret = scpi_execute_cmd(&sdata);
403 int scpi_sys_set_mcu_state_suspend(void)
405 struct scpi_data_buf sdata;
406 struct rockchip_mbox_msg mdata;
415 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS,
416 SCPI_SYS_SET_MCU_STATE_SUSPEND, tx_buf, rx_buf);
417 return scpi_execute_cmd(&sdata);
419 EXPORT_SYMBOL_GPL(scpi_sys_set_mcu_state_suspend);
421 int scpi_sys_set_mcu_state_resume(void)
423 struct scpi_data_buf sdata;
424 struct rockchip_mbox_msg mdata;
434 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_SYS,
435 SCPI_SYS_SET_MCU_STATE_RESUME, tx_buf, rx_buf);
436 return scpi_execute_cmd(&sdata);
438 EXPORT_SYMBOL_GPL(scpi_sys_set_mcu_state_resume);
440 int scpi_ddr_init(u32 dram_speed_bin, u32 freq, u32 lcdc_type)
442 struct scpi_data_buf sdata;
443 struct rockchip_mbox_msg mdata;
453 tx_buf.dram_speed_bin = (u32)dram_speed_bin;
454 tx_buf.freq = (u32)freq;
455 tx_buf.lcdc_type = (u32)lcdc_type;
457 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
458 SCPI_DDR_INIT, tx_buf, rx_buf);
459 return scpi_execute_cmd(&sdata);
461 EXPORT_SYMBOL_GPL(scpi_ddr_init);
463 int scpi_ddr_set_clk_rate(u32 rate)
465 struct scpi_data_buf sdata;
466 struct rockchip_mbox_msg mdata;
474 tx_buf.clk_rate = (u32)rate;
476 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
477 SCPI_DDR_SET_FREQ, tx_buf, rx_buf);
478 return scpi_execute_cmd(&sdata);
480 EXPORT_SYMBOL_GPL(scpi_ddr_set_clk_rate);
482 int scpi_ddr_round_rate(u32 m_hz)
484 struct scpi_data_buf sdata;
485 struct rockchip_mbox_msg mdata;
494 tx_buf.clk_rate = (u32)m_hz;
496 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
497 SCPI_DDR_ROUND_RATE, tx_buf, rx_buf);
498 if (scpi_execute_cmd(&sdata))
501 return rx_buf.round_rate;
503 EXPORT_SYMBOL_GPL(scpi_ddr_round_rate);
505 int scpi_ddr_set_auto_self_refresh(u32 en)
507 struct scpi_data_buf sdata;
508 struct rockchip_mbox_msg mdata;
516 tx_buf.enable = (u32)en;
518 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
519 SCPI_DDR_AUTO_SELF_REFRESH, tx_buf, rx_buf);
520 return scpi_execute_cmd(&sdata);
522 EXPORT_SYMBOL_GPL(scpi_ddr_set_auto_self_refresh);
524 int scpi_ddr_bandwidth_get(struct ddr_bw_info *ddr_bw_ch0,
525 struct ddr_bw_info *ddr_bw_ch1)
527 struct scpi_data_buf sdata;
528 struct rockchip_mbox_msg mdata;
534 struct ddr_bw_info ddr_bw_ch0;
535 struct ddr_bw_info ddr_bw_ch1;
540 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
541 SCPI_DDR_BANDWIDTH_GET, tx_buf, rx_buf);
542 if (scpi_execute_cmd(&sdata))
545 memcpy(ddr_bw_ch0, &(rx_buf.ddr_bw_ch0), sizeof(rx_buf.ddr_bw_ch0));
546 memcpy(ddr_bw_ch1, &(rx_buf.ddr_bw_ch1), sizeof(rx_buf.ddr_bw_ch1));
550 EXPORT_SYMBOL_GPL(scpi_ddr_bandwidth_get);
552 int scpi_ddr_get_clk_rate(void)
554 struct scpi_data_buf sdata;
555 struct rockchip_mbox_msg mdata;
565 SCPI_SETUP_DBUF(sdata, mdata, SCPI_CL_DDR,
566 SCPI_DDR_GET_FREQ, tx_buf, rx_buf);
567 if (scpi_execute_cmd(&sdata))
570 return rx_buf.clk_rate;
572 EXPORT_SYMBOL_GPL(scpi_ddr_get_clk_rate);
574 static struct of_device_id mobx_scpi_of_match[] = {
575 { .compatible = "rockchip,mbox-scpi"},
578 MODULE_DEVICE_TABLE(of, mobx_scpi_of_match);
580 static int mobx_scpi_probe(struct platform_device *pdev)
585 int check_version = 0; /*0: not check version, 1: check version*/
587 the_scpi_device = &pdev->dev;
589 while ((retry--) && (check_version != 0)) {
590 ret = scpi_get_version(SCPI_VERSION, &ver);
591 if ((ret == 0) && (ver == SCPI_VERSION))
595 if ((retry <= 0) && (check_version != 0)) {
596 dev_err(&pdev->dev, "Failed to get scpi version\n");
602 "Scpi initialize, version: 0x%x\n", ver);
605 the_scpi_device = NULL;
609 static struct platform_driver mbox_scpi_driver = {
610 .probe = mobx_scpi_probe,
613 .of_match_table = of_match_ptr(mobx_scpi_of_match),
617 static int __init rockchip_mbox_scpi_init(void)
619 return platform_driver_register(&mbox_scpi_driver);
621 subsys_initcall(rockchip_mbox_scpi_init);