2 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
44 #include <dt-bindings/pwm/pwm.h>
45 #include "rk3366.dtsi"
48 model = "Rockchip SDK tb board";
49 compatible = "rockchip,tb", "rockchip,rk3366";
52 bootargs = "console=uart,mmio32,0xff690000 clk_ignore_unused";
56 compatible = "rockchip,ion";
61 reg = <0x00000000 0x02000000>;
68 backlight: backlight {
69 compatible = "pwm-backlight";
70 pwms = <&pwm0 0 25000 PWM_POLARITY_INVERTED>;
74 16 17 18 19 20 21 22 23
75 24 25 26 27 28 29 30 31
76 32 33 34 35 36 37 38 39
77 40 41 42 43 44 45 46 47
78 48 49 50 51 52 53 54 55
79 56 57 58 59 60 61 62 63
80 64 65 66 67 68 69 70 71
81 72 73 74 75 76 77 78 79
82 80 81 82 83 84 85 86 87
83 88 89 90 91 92 93 94 95
84 96 97 98 99 100 101 102 103
85 104 105 106 107 108 109 110 111
86 112 113 114 115 116 117 118 119
87 120 121 122 123 124 125 126 127
88 128 129 130 131 132 133 134 135
89 136 137 138 139 140 141 142 143
90 144 145 146 147 148 149 150 151
91 152 153 154 155 156 157 158 159
92 160 161 162 163 164 165 166 167
93 168 169 170 171 172 173 174 175
94 176 177 178 179 180 181 182 183
95 184 185 186 187 188 189 190 191
96 192 193 194 195 196 197 198 199
97 200 201 202 203 204 205 206 207
98 208 209 210 211 212 213 214 215
99 216 217 218 219 220 221 222 223
100 224 225 226 227 228 229 230 231
101 232 233 234 235 236 237 238 239
102 240 241 242 243 244 245 246 247
103 248 249 250 251 252 253 254 255>;
104 default-brightness-level = <200>;
105 enable-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
108 rk_key: rockchip-key {
109 compatible = "rockchip,key";
112 io-channels = <&saradc 1>;
117 rockchip,adc_value = <1>;
122 label = "volume down";
123 rockchip,adc_value = <170>;
127 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
136 rockchip,adc_value = <355>;
142 rockchip,adc_value = <746>;
148 rockchip,adc_value = <560>;
154 rockchip,adc_value = <450>;
159 compatible = "simple-audio-card";
160 simple-audio-card,format = "i2s";
161 simple-audio-card,name = "rockchip,rt5640-codec";
162 simple-audio-card,mclk-fs = <256>;
163 simple-audio-card,widgets =
164 "Microphone", "Mic Jack",
165 "Headphone", "Headphone Jack";
166 simple-audio-card,routing =
167 "Mic Jack", "MICBIAS1",
169 "Headphone Jack", "HPOL",
170 "Headphone Jack", "HPOR";
171 simple-audio-card,cpu {
172 sound-dai = <&i2s_8ch>;
174 simple-audio-card,codec {
175 sound-dai = <&rt5640>;
180 compatible = "simple-audio-card";
181 simple-audio-card,name = "rockchip,spdif";
182 simple-audio-card,cpu {
183 sound-dai = <&spdif>;
185 simple-audio-card,codec {
186 sound-dai = <&spdif_out>;
190 spdif_out: spdif-out {
191 compatible = "linux,spdif-dit";
192 #sound-dai-cells = <0>;
196 compatible = "regulator-fixed";
197 regulator-name = "vcc_sys";
200 regulator-min-microvolt = <3800000>;
201 regulator-max-microvolt = <3800000>;
204 ext_gmac: external-gmac-clock {
205 compatible = "fixed-clock";
206 clock-frequency = <125000000>;
207 clock-output-names = "ext_gmac";
211 vcc_phy: vcc-phy-regulator {
212 compatible = "regulator-fixed";
214 gpio = <&gpio0 25 GPIO_ACTIVE_HIGH>;
215 pinctrl-names = "default";
216 pinctrl-0 = <ð_phy_pwr>;
217 regulator-name = "vcc_phy";
223 compatible = "rockchip,rk3366-io-voltage-domain";
224 rockchip,grf = <&grf>;
226 lcdc-supply = <&vcc_io>;
227 dvpts-supply = <&vcc_18>;
228 wifibt-supply = <&vccio_wl>;
229 audio-supply = <&vcc_io>;
230 sdcard-supply = <&vccio_sd>;
231 tphdsor-supply = <&vcc_io>;
234 dwc_control_usb: dwc-control-usb {
235 compatible = "rockchip,rk3368-dwc-control-usb";
236 rockchip,grf = <&grf>;
237 grf-offset = <0x049c>; /* GRF_SOC_STATUS for USB2.0 OTG */
238 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
239 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
240 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
241 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
242 interrupt-names = "otg_id", "otg_bvalid",
243 "otg_linestate", "host0_linestate";
244 clocks = <&cru SCLK_USBPHY480M>;
245 clock-names = "usbphy_480m";
248 compatible = "inno,phy";
249 regbase = &dwc_control_usb;
250 rk_usb,bvalid = <0x49c 23 1>;
251 rk_usb,iddig = <0x49c 26 1>;
252 rk_usb,vdmsrcen = <0x718 12 1>;
253 rk_usb,vdpsrcen = <0x718 11 1>;
254 rk_usb,rdmpden = <0x718 10 1>;
255 rk_usb,idpsrcen = <0x718 9 1>;
256 rk_usb,idmsinken = <0x718 8 1>;
257 rk_usb,idpsinken = <0x718 7 1>;
258 rk_usb,dpattach = <0x498 31 1>;
259 rk_usb,cpdet = <0x498 30 1>;
260 rk_usb,dcpattach = <0x498 29 1>;
265 compatible = "i2c-gpio";
266 gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>, /* sda */
267 <&gpio5 16 GPIO_ACTIVE_HIGH>; /* scl */
268 i2c-gpio,delay-us = <2>; /* ~100 kHz */
269 #address-cells = <1>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&i2c2_gpio>;
277 compatible = "i2c-gpio";
278 gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>, /* sda */
279 <&gpio5 8 GPIO_ACTIVE_HIGH>; /* scl */
280 i2c-gpio,delay-us = <2>; /* ~100 kHz */
281 #address-cells = <1>;
283 pinctrl-names = "default";
284 pinctrl-0 = <&i2c4_gpio>;
288 compatible = "goodix,gt9xx";
290 touch-gpio = <&gpio5 11 IRQ_TYPE_LEVEL_LOW>;
291 reset-gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>;
295 tp-supply = <&vcc_tp>;
300 sdio_pwrseq: sdio-pwrseq {
301 compatible = "mmc-pwrseq-simple";
303 clock-names = "ext_clock";
304 pinctrl-names = "default";
305 pinctrl-0 = <&wifi_enable_h>;
308 * On the module itself this is one of these (depending
309 * on the actual card populated):
310 * - SDIO_RESET_L_WL_REG_ON
311 * - PDN (power down when low)
313 reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; /* GPIO0_B6 */
317 compatible = "wlan-platdata";
318 rockchip,grf = <&grf>;
319 wifi_chip_type = "ap6335";
321 WIFI,host_wake_irq = <&gpio3 20 GPIO_ACTIVE_HIGH>; /* GPIO3_c4 */
327 clock-frequency = <100000000>;
328 clock-freq-min-max = <400000 100000000>;
335 pinctrl-names = "default";
336 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
341 clock-frequency = <37500000>;
342 clock-freq-min-max = <400000 37500000>;
347 card-detect-delay = <200>;
350 pinctrl-names = "default";
351 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
356 clock-frequency = <37500000>;
357 clock-freq-min-max = <200000 37500000>;
363 keep-power-in-suspend;
364 mmc-pwrseq = <&sdio_pwrseq>;
367 pinctrl-names = "default";
368 pinctrl-0 = <&sdio_bus4 &sdio_cmd &sdio_clk>;
381 regulator-name = "vdd_arm";
382 compatible = "silergy,syr827";
385 regulator-compatible = "fan53555-reg";
386 regulator-min-microvolt = <712500>;
387 regulator-max-microvolt = <1500000>;
388 fcs,suspend-voltage-selector = <1>;
391 regulator-initial-state = <3>;
392 regulator-state-mem {
393 regulator-on-in-suspend;
394 regulator-suspend-microvolt = <900000>;
399 compatible = "rockchip,rk818";
402 clock-output-names = "xin32k", "wifibt_32kin";
403 interrupt-parent = <&gpio0>;
404 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
405 pinctrl-names = "default";
406 pinctrl-0 = <&pmic_int_l>;
407 rockchip,system-power-controller;
411 vcc1-supply = <&vcc_sys>;
412 vcc2-supply = <&vcc_sys>;
413 vcc3-supply = <&vcc_sys>;
414 vcc4-supply = <&vcc_sys>;
415 vcc6-supply = <&vcc_sys>;
416 vcc7-supply = <&vcc_sys>;
417 vcc8-supply = <&vcc_sys>;
418 vcc9-supply = <&vcc_io>;
421 vdd_logic: DCDC_REG1 {
422 regulator-name = "vdd_logic";
425 regulator-min-microvolt = <750000>;
426 regulator-max-microvolt = <1450000>;
427 regulator-ramp-delay = <6001>;
428 regulator-state-mem {
429 regulator-on-in-suspend;
430 regulator-suspend-microvolt = <1000000>;
435 regulator-name = "vdd_gpu";
438 regulator-min-microvolt = <800000>;
439 regulator-max-microvolt = <1250000>;
440 regulator-ramp-delay = <6001>;
441 regulator-state-mem {
442 regulator-on-in-suspend;
443 regulator-suspend-microvolt = <1000000>;
448 regulator-name = "vcc_ddr";
451 regulator-state-mem {
452 regulator-on-in-suspend;
457 regulator-name = "vcc_io";
460 regulator-min-microvolt = <3300000>;
461 regulator-max-microvolt = <3300000>;
462 regulator-state-mem {
463 regulator-on-in-suspend;
464 regulator-suspend-microvolt = <3300000>;
468 vcca_codec: LDO_REG1 {
469 regulator-name = "vcca_codec";
472 regulator-min-microvolt = <3300000>;
473 regulator-max-microvolt = <3300000>;
474 regulator-state-mem {
475 regulator-on-in-suspend;
476 regulator-suspend-microvolt = <3300000>;
481 regulator-name = "vcc_tp";
484 regulator-min-microvolt = <3000000>;
485 regulator-max-microvolt = <3000000>;
486 regulator-state-mem {
487 regulator-on-in-suspend;
488 regulator-suspend-microvolt = <3000000>;
493 regulator-name = "vdd_10";
496 regulator-min-microvolt = <1000000>;
497 regulator-max-microvolt = <1000000>;
498 regulator-state-mem {
499 regulator-on-in-suspend;
500 regulator-suspend-microvolt = <1000000>;
504 vcc18_lcd: LDO_REG4 {
505 regulator-name = "vcc18_lcd";
508 regulator-min-microvolt = <1800000>;
509 regulator-max-microvolt = <1800000>;
510 regulator-state-mem {
511 regulator-on-in-suspend;
512 regulator-suspend-microvolt = <1800000>;
516 vccio_pmu: LDO_REG5 {
517 regulator-name = "vccio_pmu";
520 regulator-min-microvolt = <1800000>;
521 regulator-max-microvolt = <1800000>;
522 regulator-state-mem {
523 regulator-on-in-suspend;
524 regulator-suspend-microvolt = <1800000>;
528 vdd10_lcd: LDO_REG6 {
529 regulator-name = "vdd10_lcd";
532 regulator-min-microvolt = <1000000>;
533 regulator-max-microvolt = <1000000>;
534 regulator-state-mem {
535 regulator-on-in-suspend;
536 regulator-suspend-microvolt = <1000000>;
541 regulator-name = "vcc_18";
544 regulator-min-microvolt = <1800000>;
545 regulator-max-microvolt = <1800000>;
546 regulator-state-mem {
547 regulator-on-in-suspend;
548 regulator-suspend-microvolt = <1800000>;
553 regulator-name = "vccio_wl";
556 regulator-min-microvolt = <1800000>;
557 regulator-max-microvolt = <3300000>;
558 regulator-state-mem {
559 regulator-on-in-suspend;
560 regulator-suspend-microvolt = <3300000>;
565 regulator-name = "vccio_sd";
568 regulator-min-microvolt = <1800000>;
569 regulator-max-microvolt = <3300000>;
570 regulator-state-mem {
571 regulator-on-in-suspend;
572 regulator-suspend-microvolt = <3300000>;
577 regulator-name = "vcc_sd";
580 regulator-state-mem {
581 regulator-on-in-suspend;
592 #sound-dai-cells = <0>;
593 compatible = "realtek,rt5640";
595 clocks = <&cru SCLK_I2S_8CH_OUT>;
596 clock-names = "mclk";
597 realtek,in1-differential;
603 rockchip,i2s-broken-burst-len;
604 rockchip,playback-channels = <8>;
605 rockchip,capture-channels = <2>;
606 #sound-dai-cells = <0>;
611 #sound-dai-cells = <0>;
624 rockchip,disp-mode = <DUAL>;
625 rockchip,uboot-logo-on = <0>;
630 #include <dt-bindings/display/screen-timing/lcd-tv080wum-mipi.dtsi>
631 /* #include <dt-bindings/display/screen-timing/lcd-b101ew05.dtsi> */
635 pinctrl-names = "lcdc", "sleep";
636 pinctrl-0 = <&lcdc_lcdc>;
637 pinctrl-1 = <&lcdc_gpio>;
647 rockchip,prop = <EXTEND>;
648 rockchip,mirror = <NO_MIRROR>;
649 rockchip,cabc_mode = <0>;
650 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
683 rockchip,prop = <PRMRY>;
684 backlight = <&backlight>;
685 rockchip,mirror = <NO_MIRROR>;
686 rockchip,cabc_mode = <0>;
687 rockchip,fb-win-map = <FB_DEFAULT_ORDER>;
688 power_ctr: power_ctr {
689 rockchip,debug = <0>;
691 rockchip,power_type = <GPIO>;
692 gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* GPIO_B4 = 12 */
693 rockchip,delay = <10>;
697 rockchip,power_type = <GPIO>;
698 gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>; /* GPIO_D0 = 24 */
699 rockchip,delay = <10>;
702 /* lcd_rst: lcd-rst {
703 * rockchip,power_type = <GPIO>;
704 * gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
705 * rockchip,delay = <5>;
717 pmic_int_l: pmic-int-l {
718 rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
723 wifi_enable_h: wifienable-h {
724 rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
730 phy-supply = <&vcc_phy>;
732 clock_in_out = "input";
733 snps,reset-gpio = <&gpio2 15 GPIO_ACTIVE_LOW>;
734 snps,reset-active-low;
735 snps,reset-delays-us = <0 10000 50000>;
736 assigned-clocks = <&cru SCLK_MAC>;
737 assigned-clock-parents = <&ext_gmac>;
738 pinctrl-names = "default";
739 pinctrl-0 = <&rgmii_pins>;
746 host_drv_gpio = <&gpio0 16 GPIO_ACTIVE_LOW>; /* GPIO_C0 = 16 */
747 otg_drv_gpio = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO_B2 = 10 */
749 rockchip,remote_wakeup;
750 rockchip,usb_irq_wakeup;
762 clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_OTG>;
763 clock-names = "sclk_otgphy0", "otg";
764 resets = <&cru SRST_USBOTG_AHB>,
765 <&cru SRST_USBOTG_PHY>,
766 <&cru SRST_USBOTG_CON>;
767 reset-names = "otg_ahb", "otg_phy", "otg_controller";
768 /* 0 - Normal, 1 - Force Host, 2 - Force Device */
769 rockchip,usb-mode = <0>;
774 cpu-supply = <&syr827>;
778 mali-supply = <&vdd_logic>;