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AMDGPU/SI: Emit amd_kernel_code_t in EmitFunctionBodyStart()
2015-06-26 Tom StellardAMDGPU/SI: Emit amd_kernel_code_t in EmitFunctionBodyStart()
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2015-06-23 Tom StellardELF: Fix defintion of STT_LOOS and STT_HIOS.
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2015-06-22 Tom StellardR600/SI: Use ELF64 format instead of ELF32
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2015-06-22 Tom StellardR600: Use EM_AMDGPU for the ELF Machine type
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2015-06-22 Tom StellardSupport/ELF: Add EM_AMDGPU
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2015-06-13 Tom StellardAMDGPU: s/R600/AMDGPU/ in the Makefiles
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2015-06-13 Tom Stellardconfigure: Remove non-portable fall-through operator: ;&
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2015-06-13 Tom StellardR600 -> AMDGPU rename
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2015-06-12 Tom StellardR600/SI: Add assembler support for FLAT instructions
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2015-06-11 Tom StellardR600/SI: Define latency for flat instructions
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2015-06-11 Tom StellardR600/SI: Move flat instruction defs to CIInstructions.td
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2015-06-11 Tom StellardR600/SI: Add -mcpu=bonaire to a test that uses flat...
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2015-06-04 Tom StellardR600: Re-enable sub-reg liveness
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2015-05-26 Tom StellardR600/SI: Add assembler support for all CI and VI VOP2...
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2015-05-26 Tom StellardAsmMatcherEmitter: Add an option to override custom...
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2015-05-25 Tom StellardR600/SI: Remove some unnecessary patterns from VINTRP...
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2015-05-25 Tom StellardR600/SI: Fix bug with v_interp_p1_f32 instructions...
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2015-05-25 Tom StellardR600/SI: Use NAME rather than opName as the key to...
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2015-05-12 Tom StellardR600/SI: Fix bug in VGPR spilling
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2015-05-12 Tom StellardR600/SI: add pass to mark CF live ranges as non-spillable
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2015-05-12 Tom StellardR600/SI: Update tablegen defs to avoid restoring spilled...
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2015-05-12 Tom StellardR600/SI: Remove M0Reg register class
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2015-05-12 Tom StellardR600/SI: Remove explicit m0 operand from DS instructions
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2015-05-12 Tom StellardR600/SI: Remove explicit m0 operand from v_interp instructions
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2015-05-12 Tom StellardR600/SI: Make sendmsg test more strict
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2015-05-12 Tom StellardR600/SI: Remove explicit m0 operand from s_sendmsg
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2015-05-12 Tom StellardR600/SI: Replace TRI->getRegClass(Reg) with TRI->getPhysRegC...
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2015-05-11 Tom StellardCodeGen: Make MachineInstr::untieRegOperand() a public...
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2015-05-09 Tom StellardMachineCSE: Add a target query for the LookAheadLimit...
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2015-05-04 Tom StellardR600/SI: Code cleanup
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2015-05-01 Tom StellardR600/SI: Add VCC as an implict def of SI_KILL
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2015-05-01 Tom StellardR600/SI: Fix verifier errors from the SIAnnotateControlFlow...
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2015-04-28 Tom StellardR600: Fix up for AsmPrinter's OutStreamer being a unique_ptr
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2015-04-28 Tom StellardR600/SI: Add a lower case alias for subtarget feature...
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2015-04-23 Tom StellardR600: Correctly lower CONCAT_VECTOR nodes with more...
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2015-04-23 Tom StellardR600/SI: Fix indirect addressing with a negative constant...
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2015-04-23 Tom StellardR600/SI: Add missing -mcpu=SI to assembler test
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2015-04-23 Tom StellardR600/SI: Add assembler support for all CI and VI VOP1...
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2015-04-23 Tom StellardR600/SI: v_mov_fed_b32 does not exist on VI
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2015-04-23 Tom StellardR600/SI: Use a better error message for unsupported...
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2015-04-23 Tom StellardR600/SI: Improve AsmParser support for forced e64 encoding
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2015-04-20 Tom StellardDAGCombine: Remove redundant NaN checks around ISD...
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2015-04-20 Tom StellardIR: Add ConstantFP::getNaN()
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2015-04-14 Tom StellardR600/SI: Fix verifier error caused by SIAnnotateControlFlow
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2015-04-08 Tom StellardR600/SI: Add some missing overrides
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2015-04-08 Tom StellardR600/SI: Initial support for assembler and inline assembly
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2015-04-08 Tom StellardR600/SI: Add missing SOPK instructions
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2015-04-08 Tom StellardR600/SI: Don't print offset0/offset1 DS operands when...
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2015-03-23 Tom StellardR600/SI: Fix crash in SIInstrInfo::areLoadsFromSameBasePtr()
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2015-03-20 Tom StellardR600/SI: Refactor VOP2 instruction defs
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2015-03-20 Tom StellardR600/SI: Refactor VOP1 instruction defs
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2015-03-20 Tom StellardR600/SI: Add missing CHECK-LABEL lines to a test
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2015-03-16 Tom StellardR600/SI: don't try min3/max3/med3 with f64
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2015-03-12 Tom StellardR600/SI: Don't print scc reg in sopc assembly string
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2015-03-12 Tom StellardR600/SI: Remove _e32 and _e64 suffixes from mnemonics
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2015-03-10 Tom StellardR600/SI: Add _IDXEN and _BOTHEN variants for buffer_store
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2015-03-10 Tom StellardR600/SI: Re-order MUBUF operands to match asm strings.
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2015-03-10 Tom StellardR600/SI: Move kill flag to second instruction when...
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2015-03-10 Tom StellardR600/SI: Add 32-bit encoding of v_cndmask_b32
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2015-03-09 Tom StellardR600/SI: Move gds operand to the end of operand list
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2015-03-09 Tom StellardR600/SI: Refactor DS instruction defs
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2015-03-09 Tom StellardR600/SI: Fix DS definitions and add missing instructions
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2015-03-09 Tom StellardR600/SI: Fix opcode for ds_read2_b64 and ds_read2st64_b64
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2015-03-06 Tom StellardR600/SI: Remove unused register class
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2015-03-05 Tom StellardTableGen: Initialize ErrorInfo to ~0ULL in the MatchInstruct...
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2015-02-27 Tom StellardR600/SI: Add missing mubuf instructions
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2015-02-27 Tom StellardR600/SI: Consistently put soffset before the offset...
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2015-02-27 Tom StellardR600/SI: Add slc, glc, and tfe to non-atomic _ADDR64...
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2015-02-26 Tom StellardR600/SI: Remove M0 from DS assembly strings
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2015-02-24 Tom StellardR600/SI: Remove isel mubuf legalization
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2015-02-18 Tom StellardR600/SI: Don't set isCodeGenOnly = 1 on all instructions
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2015-02-18 Tom StellardR600/SI: Add missing VOP1 instructions
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2015-02-18 Tom StellardR600/SI: Add missing VOP2 instructions
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2015-02-18 Tom StellardR600/SI: Add definition for S_CBRANCH_G_FORK
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2015-02-18 Tom StellardR600/SI: Add missing SOP1 instructions
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2015-02-18 Tom StellardR600/SI: Refactor SOP2 definitions
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2015-02-17 Tom StellardR600/SI: Fix asam errors in SIFoldOperands
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2015-02-17 Tom StellardR600/SI: Extend private extload pattern to include...
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2015-02-13 Tom StellardR600/SI: Refactor SOP1 classes
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2015-02-13 Tom StellardR600/SI: Lowercase register names
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2015-02-13 Tom StellardR600/SI: Remove some unused TableGen classes
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2015-02-13 Tom StellardHelp: Document how to build and install with CMake.
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2015-02-13 Tom StellardHelp: Document the minimum CMake version required.
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2015-02-11 Tom StellardR600/SI: Disable subreg liveness
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2015-02-11 Tom StellardR600: Split AMDGPUPassConfig into R600PassConfig and...
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2015-02-11 Tom StellardR600: Create an R600TargetMachine for pre-gcn GPUs
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2015-02-11 Tom StellardR600/SI: Fix -march in test
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2015-02-11 Tom StellardR600/SI: Store immediate offsets > 12-bits in soffset
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2015-02-11 Tom StellardR600/SI: Add soffset operand to mubuf addr64 instruction
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2015-02-05 Tom StellardR600/SI: Fix bug in TTI loop unrolling preferences
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2015-02-05 Tom StellardR600/SI: Fix bug from insertion of llvm.SI.end.cf into...
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2015-02-04 Tom StellardR600/SI: Enable subreg liveness by default
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2015-02-04 Tom StellardR600/SI: Expand misaligned 16-bit memory accesses
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2015-02-04 Tom StellardR600/SI: Make more store operations legal
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2015-02-04 Tom StellardR600: Don't promote i64 stores to v2i32 during DAG...
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2015-02-04 Tom StellardStructurizeCFG: Remove obsolete fix for loop backedge...
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2015-02-04 Tom StellardStructurizeCFG: Use a reverse post-order traversal
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2015-02-02 Tom StellardR600/SI: 64-bit and larger memory access must be at...
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2015-02-02 Tom StellardR600/SI: Merge two test files
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2015-01-30 Tom StellardR600/SI: Handle SI_SPILL_V96_RESTORE in SIRegisterInfo...
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C/C++ LLVM-based compilers that forbids OOTA behaviors