From fc68dad43c92b4ab940bc9afd046c5d8110f03d6 Mon Sep 17 00:00:00 2001 From: Juergen Ributzka Date: Wed, 27 Aug 2014 20:47:33 +0000 Subject: [PATCH] [FastISel] Fix a potential bug in FastEmitInst_ri FastEmitInst_ri was constraining the first operand without checking if it is a virtual register. Use constrainOperandRegClass as all the other FastEmitInst_* functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216613 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/FastISel.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp index ec0531e04d4..0a81662e9a3 100644 --- a/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -1816,8 +1816,7 @@ unsigned FastISel::FastEmitInst_ri(unsigned MachineInstOpcode, const MCInstrDesc &II = TII.get(MachineInstOpcode); unsigned ResultReg = createResultReg(RC); - RC = TII.getRegClass(II, II.getNumDefs(), &TRI, *FuncInfo.MF); - MRI.constrainRegClass(Op0, RC); + Op0 = constrainOperandRegClass(II, Op0, II.getNumDefs()); if (II.getNumDefs() >= 1) BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, II, ResultReg) -- 2.34.1