From f451cb870efcf9e0302d25ed05f4cac6bb494e42 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Wed, 10 Feb 2010 16:03:48 +0000 Subject: [PATCH] Fix "the the" and similar typos. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95781 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Analysis/MemoryBuiltins.h | 2 +- include/llvm/Bitcode/BitstreamWriter.h | 2 +- include/llvm/CodeGen/JITCodeEmitter.h | 2 +- include/llvm/CodeGen/LiveInterval.h | 2 +- include/llvm/CodeGen/MachineCodeEmitter.h | 2 +- include/llvm/CodeGen/MachineConstantPool.h | 2 +- include/llvm/CodeGen/MachineFunction.h | 2 +- include/llvm/CodeGen/MachineInstr.h | 2 +- include/llvm/CodeGen/ObjectCodeEmitter.h | 2 +- include/llvm/GlobalValue.h | 2 +- include/llvm/InlineAsm.h | 2 +- include/llvm/Instruction.h | 2 +- include/llvm/Linker.h | 2 +- include/llvm/MC/MCSymbol.h | 2 +- include/llvm/PassManagers.h | 4 ++-- include/llvm/Support/IRBuilder.h | 2 +- include/llvm/System/DynamicLibrary.h | 2 +- include/llvm/System/Path.h | 2 +- include/llvm/Target/Target.td | 2 +- include/llvm/Target/TargetRegisterInfo.h | 2 +- lib/Analysis/IPA/GlobalsModRef.cpp | 2 +- lib/Analysis/LiveValues.cpp | 2 +- lib/Analysis/MemoryBuiltins.cpp | 4 ++-- lib/Analysis/ScalarEvolution.cpp | 2 +- lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 2 +- lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 2 +- lib/CodeGen/AsmPrinter/DwarfDebug.h | 2 +- lib/CodeGen/AsmPrinter/DwarfException.h | 2 +- lib/CodeGen/CodePlacementOpt.cpp | 2 +- lib/CodeGen/ExactHazardRecognizer.cpp | 2 +- lib/CodeGen/MachineFunction.cpp | 2 +- lib/CodeGen/MachineInstr.cpp | 2 +- lib/CodeGen/PBQP/HeuristicSolver.h | 2 +- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 2 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 ++-- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 2 +- lib/CodeGen/SimpleRegisterCoalescing.cpp | 2 +- lib/CodeGen/SlotIndexes.cpp | 2 +- lib/CodeGen/StrongPHIElimination.cpp | 2 +- lib/CodeGen/VirtRegMap.cpp | 2 +- lib/ExecutionEngine/JIT/JIT.cpp | 2 +- lib/Support/APInt.cpp | 4 ++-- lib/Target/CBackend/CBackend.cpp | 4 ++-- lib/Target/PIC16/PIC16DebugInfo.cpp | 2 +- lib/Target/PowerPC/PPCHazardRecognizers.cpp | 2 +- lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 2 +- lib/Target/SubtargetFeature.cpp | 2 +- lib/Target/X86/README-SSE.txt | 2 +- lib/Target/X86/X86ISelLowering.cpp | 2 +- lib/Target/X86/X86InstrInfo.td | 2 +- lib/Target/XCore/XCoreInstrInfo.td | 4 ++-- lib/Transforms/IPO/ArgumentPromotion.cpp | 2 +- lib/Transforms/IPO/PartialInlining.cpp | 2 +- lib/Transforms/InstCombine/InstCombineAndOrXor.cpp | 4 ++-- lib/Transforms/Scalar/IndVarSimplify.cpp | 2 +- lib/Transforms/Scalar/Reassociate.cpp | 4 ++-- lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp | 2 +- lib/VMCore/IRBuilder.cpp | 2 +- 59 files changed, 67 insertions(+), 67 deletions(-) diff --git a/include/llvm/Analysis/MemoryBuiltins.h b/include/llvm/Analysis/MemoryBuiltins.h index f6fa0c8d1e7..a7f42c9e37f 100644 --- a/include/llvm/Analysis/MemoryBuiltins.h +++ b/include/llvm/Analysis/MemoryBuiltins.h @@ -72,7 +72,7 @@ Value *getMallocArraySize(CallInst *CI, const TargetData *TD, // free Call Utility Functions. // -/// isFreeCall - Returns true if the the value is a call to the builtin free() +/// isFreeCall - Returns true if the value is a call to the builtin free() bool isFreeCall(const Value *I); } // End llvm namespace diff --git a/include/llvm/Bitcode/BitstreamWriter.h b/include/llvm/Bitcode/BitstreamWriter.h index 2b1b85ea413..31d513cfb02 100644 --- a/include/llvm/Bitcode/BitstreamWriter.h +++ b/include/llvm/Bitcode/BitstreamWriter.h @@ -291,7 +291,7 @@ private: /// EmitRecordWithAbbrevImpl - This is the core implementation of the record /// emission code. If BlobData is non-null, then it specifies an array of /// data that should be emitted as part of the Blob or Array operand that is - /// known to exist at the end of the the record. + /// known to exist at the end of the record. template void EmitRecordWithAbbrevImpl(unsigned Abbrev, SmallVectorImpl &Vals, StringRef Blob) { diff --git a/include/llvm/CodeGen/JITCodeEmitter.h b/include/llvm/CodeGen/JITCodeEmitter.h index 9c4e5b96707..525ce479164 100644 --- a/include/llvm/CodeGen/JITCodeEmitter.h +++ b/include/llvm/CodeGen/JITCodeEmitter.h @@ -146,7 +146,7 @@ public: } } - /// emitAlignment - Move the CurBufferPtr pointer up the the specified + /// emitAlignment - Move the CurBufferPtr pointer up the specified /// alignment (saturated to BufferEnd of course). void emitAlignment(unsigned Alignment) { if (Alignment == 0) Alignment = 1; diff --git a/include/llvm/CodeGen/LiveInterval.h b/include/llvm/CodeGen/LiveInterval.h index e31a7f0a25b..3d6c9bcd084 100644 --- a/include/llvm/CodeGen/LiveInterval.h +++ b/include/llvm/CodeGen/LiveInterval.h @@ -320,7 +320,7 @@ namespace llvm { /// advanceTo - Advance the specified iterator to point to the LiveRange /// containing the specified position, or end() if the position is past the /// end of the interval. If no LiveRange contains this position, but the - /// position is in a hole, this method returns an iterator pointing the the + /// position is in a hole, this method returns an iterator pointing the /// LiveRange immediately after the hole. iterator advanceTo(iterator I, SlotIndex Pos) { if (Pos >= endIndex()) diff --git a/include/llvm/CodeGen/MachineCodeEmitter.h b/include/llvm/CodeGen/MachineCodeEmitter.h index d598a9387ae..115aecc2b23 100644 --- a/include/llvm/CodeGen/MachineCodeEmitter.h +++ b/include/llvm/CodeGen/MachineCodeEmitter.h @@ -155,7 +155,7 @@ public: } } - /// emitAlignment - Move the CurBufferPtr pointer up the the specified + /// emitAlignment - Move the CurBufferPtr pointer up the specified /// alignment (saturated to BufferEnd of course). void emitAlignment(unsigned Alignment) { if (Alignment == 0) Alignment = 1; diff --git a/include/llvm/CodeGen/MachineConstantPool.h b/include/llvm/CodeGen/MachineConstantPool.h index 8d6c1d1e4ca..e6698a525e1 100644 --- a/include/llvm/CodeGen/MachineConstantPool.h +++ b/include/llvm/CodeGen/MachineConstantPool.h @@ -136,7 +136,7 @@ public: : TD(td), PoolAlignment(1) {} ~MachineConstantPool(); - /// getConstantPoolAlignment - Return the the alignment required by + /// getConstantPoolAlignment - Return the alignment required by /// the whole constant pool, of which the first element must be aligned. unsigned getConstantPoolAlignment() const { return PoolAlignment; } diff --git a/include/llvm/CodeGen/MachineFunction.h b/include/llvm/CodeGen/MachineFunction.h index ea31627c84c..3c5b466da7b 100644 --- a/include/llvm/CodeGen/MachineFunction.h +++ b/include/llvm/CodeGen/MachineFunction.h @@ -330,7 +330,7 @@ public: bool NoImp = false); /// CloneMachineInstr - Create a new MachineInstr which is a copy of the - /// 'Orig' instruction, identical in all ways except the the instruction + /// 'Orig' instruction, identical in all ways except the instruction /// has no parent, prev, or next. /// /// See also TargetInstrInfo::duplicate() for target-specific fixes to cloned diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index 1b2de76006f..6e33fb3e905 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -347,7 +347,7 @@ public: /// isInvariantLoad - Return true if this instruction is loading from a /// location whose value is invariant across the function. For example, - /// loading a value from the constant pool or from from the argument area of + /// loading a value from the constant pool or from the argument area of /// a function if it does not change. This should only return true of *all* /// loads the instruction does are invariant (if it does multiple loads). bool isInvariantLoad(AliasAnalysis *AA) const; diff --git a/include/llvm/CodeGen/ObjectCodeEmitter.h b/include/llvm/CodeGen/ObjectCodeEmitter.h index 8252e07d84b..3caa74725cd 100644 --- a/include/llvm/CodeGen/ObjectCodeEmitter.h +++ b/include/llvm/CodeGen/ObjectCodeEmitter.h @@ -81,7 +81,7 @@ public: /// written to the data stream in big-endian format. void emitDWordBE(uint64_t W); - /// emitAlignment - Move the CurBufferPtr pointer up the the specified + /// emitAlignment - Move the CurBufferPtr pointer up the specified /// alignment (saturated to BufferEnd of course). void emitAlignment(unsigned Alignment = 0, uint8_t fill = 0); diff --git a/include/llvm/GlobalValue.h b/include/llvm/GlobalValue.h index 1ac7eeea334..c15b5554516 100644 --- a/include/llvm/GlobalValue.h +++ b/include/llvm/GlobalValue.h @@ -92,7 +92,7 @@ public: void setSection(StringRef S) { Section = S; } /// If the usage is empty (except transitively dead constants), then this - /// global value can can be safely deleted since the destructor will + /// global value can be safely deleted since the destructor will /// delete the dead constants as well. /// @brief Determine if the usage of this global value is empty except /// for transitively dead constants. diff --git a/include/llvm/InlineAsm.h b/include/llvm/InlineAsm.h index 482e53e3fe2..4490ce5a546 100644 --- a/include/llvm/InlineAsm.h +++ b/include/llvm/InlineAsm.h @@ -39,7 +39,7 @@ class InlineAsm : public Value { virtual ~InlineAsm(); public: - /// InlineAsm::get - Return the the specified uniqued inline asm string. + /// InlineAsm::get - Return the specified uniqued inline asm string. /// static InlineAsm *get(const FunctionType *Ty, StringRef AsmString, StringRef Constraints, bool hasSideEffects, diff --git a/include/llvm/Instruction.h b/include/llvm/Instruction.h index d45da974bc2..cf9dc4456fa 100644 --- a/include/llvm/Instruction.h +++ b/include/llvm/Instruction.h @@ -148,7 +148,7 @@ public: getAllMetadataImpl(MDs); } - /// setMetadata - Set the metadata of of the specified kind to the specified + /// setMetadata - Set the metadata of the specified kind to the specified /// node. This updates/replaces metadata if already present, or removes it if /// Node is null. void setMetadata(unsigned KindID, MDNode *Node); diff --git a/include/llvm/Linker.h b/include/llvm/Linker.h index a68a2e0fd3d..cc7bf88115c 100644 --- a/include/llvm/Linker.h +++ b/include/llvm/Linker.h @@ -223,7 +223,7 @@ class Linker { /// the archive that resolve outstanding symbols will be linked in. The /// library is searched repeatedly until no more modules that resolve /// symbols can be found. If an error occurs, the error string is set. - /// To speed up this function, ensure the the archive has been processed + /// To speed up this function, ensure the archive has been processed /// llvm-ranlib or the S option was given to llvm-ar when the archive was /// created. These tools add a symbol table to the archive which makes the /// search for undefined symbols much faster. diff --git a/include/llvm/MC/MCSymbol.h b/include/llvm/MC/MCSymbol.h index e77060415f7..d5c4d95c183 100644 --- a/include/llvm/MC/MCSymbol.h +++ b/include/llvm/MC/MCSymbol.h @@ -89,7 +89,7 @@ namespace llvm { return !isDefined(); } - /// isAbsolute - Check if this this is an absolute symbol. + /// isAbsolute - Check if this is an absolute symbol. bool isAbsolute() const { return Section == AbsolutePseudoSection; } diff --git a/include/llvm/PassManagers.h b/include/llvm/PassManagers.h index 443a9e02d2a..d5685c664c2 100644 --- a/include/llvm/PassManagers.h +++ b/include/llvm/PassManagers.h @@ -394,8 +394,8 @@ private: const AnalysisUsage::VectorType &Set) const; // Set of available Analysis. This information is used while scheduling - // pass. If a pass requires an analysis which is not not available then - // equired analysis pass is scheduled to run before the pass itself is + // pass. If a pass requires an analysis which is not available then + // the required analysis pass is scheduled to run before the pass itself is // scheduled to run. std::map AvailableAnalysis; diff --git a/include/llvm/Support/IRBuilder.h b/include/llvm/Support/IRBuilder.h index 9f0dce2ca04..0139793c35f 100644 --- a/include/llvm/Support/IRBuilder.h +++ b/include/llvm/Support/IRBuilder.h @@ -94,7 +94,7 @@ public: //===--------------------------------------------------------------------===// /// CreateGlobalString - Make a new global variable with an initializer that - /// has array of i8 type filled in the the nul terminated string value + /// has array of i8 type filled in the nul terminated string value /// specified. If Name is specified, it is the name of the global variable /// created. Value *CreateGlobalString(const char *Str = "", const Twine &Name = ""); diff --git a/include/llvm/System/DynamicLibrary.h b/include/llvm/System/DynamicLibrary.h index ac58407a194..745b8f8b5b4 100644 --- a/include/llvm/System/DynamicLibrary.h +++ b/include/llvm/System/DynamicLibrary.h @@ -23,7 +23,7 @@ namespace sys { /// might be known as shared libraries, shared objects, dynamic shared /// objects, or dynamic link libraries. Regardless of the terminology or the /// operating system interface, this class provides a portable interface that - /// allows dynamic libraries to be loaded and and searched for externally + /// allows dynamic libraries to be loaded and searched for externally /// defined symbols. This is typically used to provide "plug-in" support. /// It also allows for symbols to be defined which don't live in any library, /// but rather the main program itself, useful on Windows where the main diff --git a/include/llvm/System/Path.h b/include/llvm/System/Path.h index bdfb9aa9b79..1be27b27be0 100644 --- a/include/llvm/System/Path.h +++ b/include/llvm/System/Path.h @@ -28,7 +28,7 @@ namespace sys { /// platform independent and eliminates many of the unix-specific fields. /// However, to support llvm-ar, the mode, user, and group fields are /// retained. These pertain to unix security and may not have a meaningful - /// value on non-Unix platforms. However, the other fields fields should + /// value on non-Unix platforms. However, the other fields should /// always be applicable on all platforms. The structure is filled in by /// the PathWithStatus class. /// @brief File status structure diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td index a1b7d766624..9a117dff315 100644 --- a/include/llvm/Target/Target.td +++ b/include/llvm/Target/Target.td @@ -376,7 +376,7 @@ class OptionalDefOperand // InstrInfo - This class should only be instantiated once to provide parameters -// which are global to the the target machine. +// which are global to the target machine. // class InstrInfo { // If the target wants to associate some target-specific information with each diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index 90469601d35..65b60f7a936 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -169,7 +169,7 @@ public: return I; } - /// hasSubClass - return true if the the specified TargetRegisterClass + /// hasSubClass - return true if the specified TargetRegisterClass /// is a proper subset of this TargetRegisterClass. bool hasSubClass(const TargetRegisterClass *cs) const { for (int i = 0; SubClasses[i] != NULL; ++i) diff --git a/lib/Analysis/IPA/GlobalsModRef.cpp b/lib/Analysis/IPA/GlobalsModRef.cpp index e803a488a80..ec94bc892b5 100644 --- a/lib/Analysis/IPA/GlobalsModRef.cpp +++ b/lib/Analysis/IPA/GlobalsModRef.cpp @@ -486,7 +486,7 @@ GlobalsModRef::alias(const Value *V1, unsigned V1Size, if (GV1 && !NonAddressTakenGlobals.count(GV1)) GV1 = 0; if (GV2 && !NonAddressTakenGlobals.count(GV2)) GV2 = 0; - // If the the two pointers are derived from two different non-addr-taken + // If the two pointers are derived from two different non-addr-taken // globals, or if one is and the other isn't, we know these can't alias. if ((GV1 || GV2) && GV1 != GV2) return NoAlias; diff --git a/lib/Analysis/LiveValues.cpp b/lib/Analysis/LiveValues.cpp index 02ec7d318ac..1b91d93c0e1 100644 --- a/lib/Analysis/LiveValues.cpp +++ b/lib/Analysis/LiveValues.cpp @@ -184,7 +184,7 @@ LiveValues::Memo &LiveValues::compute(const Value *V) { } } - // If the value was never used outside the the block in which it was + // If the value was never used outside the block in which it was // defined, it's killed in that block. if (!LiveOutOfDefBB) M.Killed.insert(DefBB); diff --git a/lib/Analysis/MemoryBuiltins.cpp b/lib/Analysis/MemoryBuiltins.cpp index b4486283fee..297b5880c41 100644 --- a/lib/Analysis/MemoryBuiltins.cpp +++ b/lib/Analysis/MemoryBuiltins.cpp @@ -24,7 +24,7 @@ using namespace llvm; // malloc Call Utility Functions. // -/// isMalloc - Returns true if the the value is either a malloc call or a +/// isMalloc - Returns true if the value is either a malloc call or a /// bitcast of the result of a malloc call. bool llvm::isMalloc(const Value *I) { return extractMallocCall(I) || extractMallocCallFromBitCast(I); @@ -183,7 +183,7 @@ Value *llvm::getMallocArraySize(CallInst *CI, const TargetData *TD, // free Call Utility Functions. // -/// isFreeCall - Returns true if the the value is a call to the builtin free() +/// isFreeCall - Returns true if the value is a call to the builtin free() bool llvm::isFreeCall(const Value *I) { const CallInst *CI = dyn_cast(I); if (!CI) diff --git a/lib/Analysis/ScalarEvolution.cpp b/lib/Analysis/ScalarEvolution.cpp index 1fb966132bd..82be9cd5c4e 100644 --- a/lib/Analysis/ScalarEvolution.cpp +++ b/lib/Analysis/ScalarEvolution.cpp @@ -5032,7 +5032,7 @@ ScalarEvolution::HowManyLessThans(const SCEV *LHS, const SCEV *RHS, if (Step->isOne()) { // With unit stride, the iteration never steps past the limit value. } else if (isKnownPositive(Step)) { - // Test whether a positive iteration iteration can step past the limit + // Test whether a positive iteration can step past the limit // value and past the maximum value for its type in a single step. // Note that it's not sufficient to check NoWrap here, because even // though the value after a wrap is undefined, it's not undefined diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index 9042147afb4..fc083845938 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -302,7 +302,7 @@ void AsmPrinter::EmitFunctionHeader() { OutStreamer.GetCommentOS() << '\n'; } - // Emit the CurrentFnSym. This is is a virtual function to allow targets to + // Emit the CurrentFnSym. This is a virtual function to allow targets to // do their wild and crazy things as required. EmitFunctionEntryLabel(); diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp index 0182027a138..5093dd9a9c1 100644 --- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -618,7 +618,7 @@ void DwarfDebug::addComplexAddress(DbgVariable *&DV, DIE *Die, 1). Add the offset of the forwarding field. - 2). Follow that pointer to get the the real __Block_byref_x_VarName + 2). Follow that pointer to get the real __Block_byref_x_VarName struct to use (the real one may have been copied onto the heap). 3). Add the offset for the field VarName, to find the actual variable. diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.h b/lib/CodeGen/AsmPrinter/DwarfDebug.h index be1a5f0d962..55baa921006 100644 --- a/lib/CodeGen/AsmPrinter/DwarfDebug.h +++ b/lib/CodeGen/AsmPrinter/DwarfDebug.h @@ -103,7 +103,7 @@ class DwarfDebug : public DwarfPrinter { /// SmallVector, 8> SourceIds; - /// Lines - List of of source line correspondence. + /// Lines - List of source line correspondence. std::vector Lines; /// DIEValues - A list of all the unique values in use. diff --git a/lib/CodeGen/AsmPrinter/DwarfException.h b/lib/CodeGen/AsmPrinter/DwarfException.h index 89d55f7cfcd..06033a1a6f0 100644 --- a/lib/CodeGen/AsmPrinter/DwarfException.h +++ b/lib/CodeGen/AsmPrinter/DwarfException.h @@ -103,7 +103,7 @@ class DwarfException : public DwarfPrinter { /// exception. If it matches then the exception and type id are passed /// on to the landing pad. Otherwise the next action is looked up. This /// chain is terminated with a next action of zero. If no type id is - /// found the the frame is unwound and handling continues. + /// found the frame is unwound and handling continues. /// 3. Type id table contains references to all the C++ typeinfo for all /// catches in the function. This tables is reversed indexed base 1. diff --git a/lib/CodeGen/CodePlacementOpt.cpp b/lib/CodeGen/CodePlacementOpt.cpp index cbf5b891f8b..05a57d45343 100644 --- a/lib/CodeGen/CodePlacementOpt.cpp +++ b/lib/CodeGen/CodePlacementOpt.cpp @@ -115,7 +115,7 @@ bool CodePlacementOpt::HasAnalyzableTerminator(MachineBasicBlock *MBB) { // Ask the target's AnalyzeBranch if it can handle this block. MachineBasicBlock *TBB = 0, *FBB = 0; SmallVector Cond; - // Make the the terminator is understood. + // Make the terminator is understood. if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond)) return false; // Make sure we have the option of reversing the condition. diff --git a/lib/CodeGen/ExactHazardRecognizer.cpp b/lib/CodeGen/ExactHazardRecognizer.cpp index 266c74c9995..61959bba0e2 100644 --- a/lib/CodeGen/ExactHazardRecognizer.cpp +++ b/lib/CodeGen/ExactHazardRecognizer.cpp @@ -7,7 +7,7 @@ // //===----------------------------------------------------------------------===// // -// This implements a a hazard recognizer using the instructions itineraries +// This implements a hazard recognizer using the instructions itineraries // defined for the current target. // //===----------------------------------------------------------------------===// diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp index 97b86cb876d..f141c567708 100644 --- a/lib/CodeGen/MachineFunction.cpp +++ b/lib/CodeGen/MachineFunction.cpp @@ -187,7 +187,7 @@ MachineFunction::CreateMachineInstr(const TargetInstrDesc &TID, } /// CloneMachineInstr - Create a new MachineInstr which is a copy of the -/// 'Orig' instruction, identical in all ways except the the instruction +/// 'Orig' instruction, identical in all ways except the instruction /// has no parent, prev, or next. /// MachineInstr * diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index 34f7781866b..df61c745769 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -1034,7 +1034,7 @@ bool MachineInstr::hasVolatileMemoryRef() const { /// isInvariantLoad - Return true if this instruction is loading from a /// location whose value is invariant across the function. For example, -/// loading a value from the constant pool or from from the argument area +/// loading a value from the constant pool or from the argument area /// of a function if it does not change. This should only return true of /// *all* loads the instruction does are invariant (if it does multiple loads). bool MachineInstr::isInvariantLoad(AliasAnalysis *AA) const { diff --git a/lib/CodeGen/PBQP/HeuristicSolver.h b/lib/CodeGen/PBQP/HeuristicSolver.h index 2d72b1fba10..b48f548950d 100644 --- a/lib/CodeGen/PBQP/HeuristicSolver.h +++ b/lib/CodeGen/PBQP/HeuristicSolver.h @@ -9,7 +9,7 @@ // // Heuristic PBQP solver. This solver is able to perform optimal reductions for // nodes of degree 0, 1 or 2. For nodes of degree >2 a plugable heuristic is -// used to to select a node for reduction. +// used to select a node for reduction. // //===----------------------------------------------------------------------===// diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 10487dabd28..9189e71a66f 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2640,7 +2640,7 @@ SDValue DAGCombiner::visitSRA(SDNode *N) { // If the shift is not a no-op (in which case this should be just a sign // extend already), the truncated to type is legal, sign_extend is legal - // on that type, and the the truncate to that type is both legal and free, + // on that type, and the truncate to that type is both legal and free, // perform the transform. if ((ShiftAmt > 0) && TLI.isOperationLegalOrCustom(ISD::SIGN_EXTEND, TruncVT) && diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 12a4b31e5bf..78e6e4ee9d9 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -2767,7 +2767,7 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node, DAG.getIntPtrConstant(1)); } else { // FIXME: We should be able to fall back to a libcall with an illegal - // type in some cases cases. + // type in some cases. // Also, we can fall back to a division in some cases, but that's a big // performance hit in the general case. llvm_unreachable("Don't know how to expand this operation yet!"); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 24ac34c4e7f..de17f904d90 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -1349,7 +1349,7 @@ void SelectionDAGBuilder::visitJumpTableHeader(JumpTable &JT, DAG.getConstant(JTH.First, VT)); // The SDNode we just created, which holds the value being switched on minus - // the the smallest case value, needs to be copied to a virtual register so it + // the smallest case value, needs to be copied to a virtual register so it // can be used as an index into the jump table in a subsequent basic block. // This value may be smaller or larger than the target's pointer type, and // therefore require extension or truncating. @@ -4865,7 +4865,7 @@ isAllocatableRegister(unsigned Reg, MachineFunction &MF, EVT ThisVT = MVT::Other; const TargetRegisterClass *RC = *RCI; - // If none of the the value types for this register class are valid, we + // If none of the value types for this register class are valid, we // can't use it. For example, 64-bit reg classes on 32-bit targets. for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end(); I != E; ++I) { diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index f923927c43e..d74ec7e2e5d 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -2366,7 +2366,7 @@ getRegForInlineAsmConstraint(const std::string &Constraint, E = RI->regclass_end(); RCI != E; ++RCI) { const TargetRegisterClass *RC = *RCI; - // If none of the the value types for this register class are valid, we + // If none of the value types for this register class are valid, we // can't use it. For example, 64-bit reg classes on 32-bit targets. bool isLegal = false; for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end(); diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 1faa5a094a4..1d9bda4ab0b 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -197,7 +197,7 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA, SlotIndex FillerStart = ValLR->end, FillerEnd = BLR->start; // We are about to delete CopyMI, so need to remove it as the 'instruction - // that defines this value #'. Update the the valnum with the new defining + // that defines this value #'. Update the valnum with the new defining // instruction #. BValNo->def = FillerStart; BValNo->setCopy(0); diff --git a/lib/CodeGen/SlotIndexes.cpp b/lib/CodeGen/SlotIndexes.cpp index e5a87f7df80..6110ef5d2f0 100644 --- a/lib/CodeGen/SlotIndexes.cpp +++ b/lib/CodeGen/SlotIndexes.cpp @@ -95,7 +95,7 @@ bool SlotIndexes::runOnMachineFunction(MachineFunction &fn) { push_back(createEntry(0, index)); - // Iterate over the the function. + // Iterate over the function. for (MachineFunction::iterator mbbItr = mf->begin(), mbbEnd = mf->end(); mbbItr != mbbEnd; ++mbbItr) { MachineBasicBlock *mbb = &*mbbItr; diff --git a/lib/CodeGen/StrongPHIElimination.cpp b/lib/CodeGen/StrongPHIElimination.cpp index d68e0ad890b..f8f6a55e9df 100644 --- a/lib/CodeGen/StrongPHIElimination.cpp +++ b/lib/CodeGen/StrongPHIElimination.cpp @@ -49,7 +49,7 @@ namespace { std::map > Stacks; // Registers in UsedByAnother are PHI nodes that are themselves - // used as operands to another another PHI node + // used as operands to another PHI node std::set UsedByAnother; // RenameSets are the is a map from a PHI-defined register diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp index d4fb2e4d884..5956b6141c2 100644 --- a/lib/CodeGen/VirtRegMap.cpp +++ b/lib/CodeGen/VirtRegMap.cpp @@ -9,7 +9,7 @@ // // This file implements the VirtRegMap class. // -// It also contains implementations of the the Spiller interface, which, given a +// It also contains implementations of the Spiller interface, which, given a // virtual register map and a machine function, eliminates all virtual // references by replacing them with physical register references - adding spill // code as necessary. diff --git a/lib/ExecutionEngine/JIT/JIT.cpp b/lib/ExecutionEngine/JIT/JIT.cpp index 56a0bdde6bb..616a66e18a4 100644 --- a/lib/ExecutionEngine/JIT/JIT.cpp +++ b/lib/ExecutionEngine/JIT/JIT.cpp @@ -171,7 +171,7 @@ void DarwinRegisterFrame(void* FrameBegin) { ob->encoding.i = 0; ob->encoding.b.encoding = llvm::dwarf::DW_EH_PE_omit; - // Put the info on both places, as libgcc uses the first or the the second + // Put the info on both places, as libgcc uses the first or the second // field. Note that we rely on having two pointers here. If fde_end was a // char, things would get complicated. ob->fde_end = (char*)LOI->unseenObjects; diff --git a/lib/Support/APInt.cpp b/lib/Support/APInt.cpp index f41b31a883c..3bce3f3ed3f 100644 --- a/lib/Support/APInt.cpp +++ b/lib/Support/APInt.cpp @@ -273,7 +273,7 @@ APInt& APInt::operator-=(const APInt& RHS) { return clearUnusedBits(); } -/// Multiplies an integer array, x by a a uint64_t integer and places the result +/// Multiplies an integer array, x, by a uint64_t integer and places the result /// into dest. /// @returns the carry out of the multiplication. /// @brief Multiply a multi-digit APInt by a single digit (64-bit) integer. @@ -1766,7 +1766,7 @@ void APInt::divide(const APInt LHS, unsigned lhsWords, // First, compose the values into an array of 32-bit words instead of // 64-bit words. This is a necessity of both the "short division" algorithm - // and the the Knuth "classical algorithm" which requires there to be native + // and the Knuth "classical algorithm" which requires there to be native // operations for +, -, and * on an m bit value with an m*2 bit result. We // can't use 64-bit operands here because we don't have native results of // 128-bits. Furthermore, casting the 64-bit values to 32-bit values won't diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp index f63398ec859..fd4c4e75711 100644 --- a/lib/Target/CBackend/CBackend.cpp +++ b/lib/Target/CBackend/CBackend.cpp @@ -1841,7 +1841,7 @@ static SpecialGlobalClass getGlobalVariableClass(const GlobalVariable *GV) { return GlobalDtors; } - // Otherwise, it it is other metadata, don't print it. This catches things + // Otherwise, if it is other metadata, don't print it. This catches things // like debug information. if (GV->getSection() == "llvm.metadata") return NotPrinted; @@ -3113,7 +3113,7 @@ void CWriter::visitCallInst(CallInst &I) { } /// visitBuiltinCall - Handle the call to the specified builtin. Returns true -/// if the entire call is handled, return false it it wasn't handled, and +/// if the entire call is handled, return false if it wasn't handled, and /// optionally set 'WroteCallee' if the callee has already been printed out. bool CWriter::visitBuiltinCall(CallInst &I, Intrinsic::ID ID, bool &WroteCallee) { diff --git a/lib/Target/PIC16/PIC16DebugInfo.cpp b/lib/Target/PIC16/PIC16DebugInfo.cpp index 8368a3c142c..c517b1bff6e 100644 --- a/lib/Target/PIC16/PIC16DebugInfo.cpp +++ b/lib/Target/PIC16/PIC16DebugInfo.cpp @@ -68,7 +68,7 @@ void PIC16DbgInfo::PopulateDerivedTypeInfo (DIType Ty, unsigned short &TypeNo, TypeNo = TypeNo << PIC16Dbg::S_DERIVED; } - // We also need to encode the the information about the base type of + // We also need to encode the information about the base type of // pointer in TypeNo. DIType BaseType = DIDerivedType(Ty.getNode()).getTypeDerivedFrom(); PopulateDebugInfo(BaseType, TypeNo, HasAux, Aux, TagName); diff --git a/lib/Target/PowerPC/PPCHazardRecognizers.cpp b/lib/Target/PowerPC/PPCHazardRecognizers.cpp index 6af7e0ffbc1..3a15f7efdf2 100644 --- a/lib/Target/PowerPC/PPCHazardRecognizers.cpp +++ b/lib/Target/PowerPC/PPCHazardRecognizers.cpp @@ -118,7 +118,7 @@ isLoadOfStoredAddress(unsigned LoadSize, SDValue Ptr1, SDValue Ptr2) const { } /// getHazardType - We return hazard for any non-branch instruction that would -/// terminate terminate the dispatch group. We turn NoopHazard for any +/// terminate the dispatch group. We turn NoopHazard for any /// instructions that wouldn't terminate the dispatch group that would cause a /// pipeline flush. ScheduleHazardRecognizer::HazardType PPCHazardRecognizer970:: diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 32c1879cf71..004997fe8cd 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -199,7 +199,7 @@ void PPCDAGToDAGISel::InsertVRSaveCode(MachineFunction &Fn) { // Check to see if this function uses vector registers, which means we have to // save and restore the VRSAVE register and update it with the regs we use. // - // In this case, there will be virtual registers of vector type type created + // In this case, there will be virtual registers of vector type created // by the scheduler. Detect them now. bool HasVectorVReg = false; for (unsigned i = TargetRegisterInfo::FirstVirtualRegister, diff --git a/lib/Target/SubtargetFeature.cpp b/lib/Target/SubtargetFeature.cpp index 7cc4fd1d263..2094cc945a4 100644 --- a/lib/Target/SubtargetFeature.cpp +++ b/lib/Target/SubtargetFeature.cpp @@ -67,7 +67,7 @@ static void Split(std::vector &V, const std::string &S) { while (true) { // Find the next comma size_t Comma = S.find(',', Pos); - // If no comma found then the the rest of the string is used + // If no comma found then the rest of the string is used if (Comma == std::string::npos) { // Add string to vector V.push_back(S.substr(Pos)); diff --git a/lib/Target/X86/README-SSE.txt b/lib/Target/X86/README-SSE.txt index 6e97ea6f9fc..19eb05e7657 100644 --- a/lib/Target/X86/README-SSE.txt +++ b/lib/Target/X86/README-SSE.txt @@ -376,7 +376,7 @@ ret ... saving two instructions. The basic idea is that a reload from a spill slot, can, if only one 4-byte -chunk is used, bring in 3 zeros the the one element instead of 4 elements. +chunk is used, bring in 3 zeros the one element instead of 4 elements. This can be used to simplify a variety of shuffle operations, where the elements are fixed zeros. diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 9061337fd54..515bc84dadb 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -2172,7 +2172,7 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee, if (IsCalleePop(isVarArg, CallConv)) NumBytesForCalleeToPush = NumBytes; // Callee pops everything else if (!Is64Bit && CallConv != CallingConv::Fast && IsStructRet) - // If this is is a call to a struct-return function, the callee + // If this is a call to a struct-return function, the callee // pops the hidden struct pointer, so we have to push it back. // This is common for Darwin/X86, Linux & Mingw32 targets. NumBytesForCalleeToPush = 4; diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index bc36d8e7e61..f0b423923b4 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -3704,7 +3704,7 @@ def MOVZX32rm16: I<0xB7, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src), "movz{wl|x}\t{$src, $dst|$dst, $src}", [(set GR32:$dst, (zextloadi32i16 addr:$src))]>, TB; -// These are the same as the regular regular MOVZX32rr8 and MOVZX32rm8 +// These are the same as the regular MOVZX32rr8 and MOVZX32rm8 // except that they use GR32_NOREX for the output operand register class // instead of GR32. This allows them to operate on h registers on x86-64. def MOVZX32_NOREXrr8 : I<0xB6, MRMSrcReg, diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td index d4ae49e4690..10dc18cfead 100644 --- a/lib/Target/XCore/XCoreInstrInfo.td +++ b/lib/Target/XCore/XCoreInstrInfo.td @@ -686,7 +686,7 @@ def LDAP_lu10_ba : _FLU10<(outs), [(set R11, (pcrelwrapper tblockaddress:$addr))]>; let isCall=1, -// All calls clobber the the link register and the non-callee-saved registers: +// All calls clobber the link register and the non-callee-saved registers: Defs = [R0, R1, R2, R3, R11, LR] in { def BL_u10 : _FU10< (outs), @@ -779,7 +779,7 @@ def ECALLF_1r : _F1R<(outs), (ins GRRegs:$src), []>; let isCall=1, -// All calls clobber the the link register and the non-callee-saved registers: +// All calls clobber the link register and the non-callee-saved registers: Defs = [R0, R1, R2, R3, R11, LR] in { def BLA_1r : _F1R<(outs), (ins GRRegs:$addr, variable_ops), "bla $addr", diff --git a/lib/Transforms/IPO/ArgumentPromotion.cpp b/lib/Transforms/IPO/ArgumentPromotion.cpp index d8190a43e10..325d353f39f 100644 --- a/lib/Transforms/IPO/ArgumentPromotion.cpp +++ b/lib/Transforms/IPO/ArgumentPromotion.cpp @@ -247,7 +247,7 @@ static bool PrefixIn(const ArgPromotion::IndicesVector &Indices, return Low != Set.end() && IsPrefix(*Low, Indices); } -/// Mark the given indices (ToMark) as safe in the the given set of indices +/// Mark the given indices (ToMark) as safe in the given set of indices /// (Safe). Marking safe usually means adding ToMark to Safe. However, if there /// is already a prefix of Indices in Safe, Indices are implicitely marked safe /// already. Furthermore, any indices that Indices is itself a prefix of, are diff --git a/lib/Transforms/IPO/PartialInlining.cpp b/lib/Transforms/IPO/PartialInlining.cpp index f40902ffa2f..f8ec7222738 100644 --- a/lib/Transforms/IPO/PartialInlining.cpp +++ b/lib/Transforms/IPO/PartialInlining.cpp @@ -117,7 +117,7 @@ Function* PartialInliner::unswitchFunction(Function* F) { DominatorTree DT; DT.runOnFunction(*duplicateFunction); - // Extract the body of the the if. + // Extract the body of the if. Function* extractedFunction = ExtractCodeRegion(DT, toExtract); // Inline the top-level if test into all callers. diff --git a/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp index 1f86a8ec6ef..28fd70ef69f 100644 --- a/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp +++ b/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp @@ -546,7 +546,7 @@ Instruction *InstCombiner::FoldAndOfICmps(Instruction &I, std::swap(LHSCC, RHSCC); } - // At this point, we know we have have two icmp instructions + // At this point, we know we have two icmp instructions // comparing a value against two constants and and'ing the result // together. Because of the above check, we know that we only have // icmp eq, icmp ne, icmp [su]lt, and icmp [SU]gt here. We also know @@ -1226,7 +1226,7 @@ Instruction *InstCombiner::FoldOrOfICmps(Instruction &I, std::swap(LHSCC, RHSCC); } - // At this point, we know we have have two icmp instructions + // At this point, we know we have two icmp instructions // comparing a value against two constants and or'ing the result // together. Because of the above check, we know that we only have // ICMP_EQ, ICMP_NE, ICMP_LT, and ICMP_GT here. We also know (from the diff --git a/lib/Transforms/Scalar/IndVarSimplify.cpp b/lib/Transforms/Scalar/IndVarSimplify.cpp index 17f7d985097..c54f596f2cc 100644 --- a/lib/Transforms/Scalar/IndVarSimplify.cpp +++ b/lib/Transforms/Scalar/IndVarSimplify.cpp @@ -380,7 +380,7 @@ bool IndVarSimplify::runOnLoop(Loop *L, LPPassManager &LPM) { NeedCannIV = true; } - // Now that we know the largest of of the induction variable expressions + // Now that we know the largest of the induction variable expressions // in this loop, insert a canonical induction variable of the largest size. Value *IndVar = 0; if (NeedCannIV) { diff --git a/lib/Transforms/Scalar/Reassociate.cpp b/lib/Transforms/Scalar/Reassociate.cpp index 1decde13b83..bbd4b451fbc 100644 --- a/lib/Transforms/Scalar/Reassociate.cpp +++ b/lib/Transforms/Scalar/Reassociate.cpp @@ -249,7 +249,7 @@ void Reassociate::LinearizeExpr(BinaryOperator *I) { /// LinearizeExprTree - Given an associative binary expression tree, traverse /// all of the uses putting it into canonical form. This forces a left-linear -/// form of the the expression (((a+b)+c)+d), and collects information about the +/// form of the expression (((a+b)+c)+d), and collects information about the /// rank of the non-tree operands. /// /// NOTE: These intentionally destroys the expression tree operands (turning @@ -299,7 +299,7 @@ void Reassociate::LinearizeExprTree(BinaryOperator *I, Success = false; MadeChange = true; } else if (RHSBO) { - // Turn (A+B)+(C+D) -> (((A+B)+C)+D). This guarantees the the RHS is not + // Turn (A+B)+(C+D) -> (((A+B)+C)+D). This guarantees the RHS is not // part of the expression tree. LinearizeExpr(I); LHS = LHSBO = cast(I->getOperand(0)); diff --git a/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp b/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp index 5acd6aa5e12..4464961a079 100644 --- a/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp +++ b/lib/Transforms/Scalar/SimplifyHalfPowrLibCalls.cpp @@ -68,7 +68,7 @@ InlineHalfPowrs(const std::vector &HalfPowrs, Function *Callee = Call->getCalledFunction(); // Minimally sanity-check the CFG of half_powr to ensure that it contains - // the the kind of code we expect. If we're running this pass, we have + // the kind of code we expect. If we're running this pass, we have // reason to believe it will be what we expect. Function::iterator I = Callee->begin(); BasicBlock *Prologue = I++; diff --git a/lib/VMCore/IRBuilder.cpp b/lib/VMCore/IRBuilder.cpp index 699bf0f6535..4bc3cbb2d6e 100644 --- a/lib/VMCore/IRBuilder.cpp +++ b/lib/VMCore/IRBuilder.cpp @@ -19,7 +19,7 @@ using namespace llvm; /// CreateGlobalString - Make a new global variable with an initializer that -/// has array of i8 type filled in the the nul terminated string value +/// has array of i8 type filled in the nul terminated string value /// specified. If Name is specified, it is the name of the global variable /// created. Value *IRBuilderBase::CreateGlobalString(const char *Str, const Twine &Name) { -- 2.34.1