From ed37b1e2d0c41005b0e0ff03bb16c7acf932ef05 Mon Sep 17 00:00:00 2001 From: Colin LeMahieu Date: Tue, 18 Nov 2014 21:51:51 +0000 Subject: [PATCH] [Hexagon] Adding A2_sub instruction Renaming test files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222263 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Hexagon/HexagonInstrInfo.td | 2 ++ test/MC/Hexagon/{instructions.ll => inst_add.ll} | 0 test/MC/Hexagon/inst_sub.ll | 10 ++++++++++ 3 files changed, 12 insertions(+) rename test/MC/Hexagon/{instructions.ll => inst_add.ll} (100%) create mode 100644 test/MC/Hexagon/inst_sub.ll diff --git a/lib/Target/Hexagon/HexagonInstrInfo.td b/lib/Target/Hexagon/HexagonInstrInfo.td index 3acefd5851f..f06c1dcd0b1 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.td +++ b/lib/Target/Hexagon/HexagonInstrInfo.td @@ -162,6 +162,7 @@ multiclass T_ALU32_3op_A2 MajOp, bits<3> MinOp, let isCodeGenOnly = 0 in defm add : T_ALU32_3op_A2<"add", 0b011, 0b000, 0, 1>; +defm sub : T_ALU32_3op_A2<"sub", 0b011, 0b001, 1, 0>; // Pats for instruction selection. class BinOp32_pat @@ -169,6 +170,7 @@ class BinOp32_pat (ResT (MI IntRegs:$Rs, IntRegs:$Rt))>; def: BinOp32_pat; +def: BinOp32_pat; multiclass ALU32_Pbase { diff --git a/test/MC/Hexagon/instructions.ll b/test/MC/Hexagon/inst_add.ll similarity index 100% rename from test/MC/Hexagon/instructions.ll rename to test/MC/Hexagon/inst_add.ll diff --git a/test/MC/Hexagon/inst_sub.ll b/test/MC/Hexagon/inst_sub.ll new file mode 100644 index 00000000000..7523aa6a5a6 --- /dev/null +++ b/test/MC/Hexagon/inst_sub.ll @@ -0,0 +1,10 @@ +;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ +;; RUN: | llvm-objdump -s - | FileCheck %s + +define i32 @foo (i32 %a, i32 %b) +{ + %1 = sub i32 %a, %b + ret i32 %1 +} + +; CHECK: 0000 004021f3 00c09f52 \ No newline at end of file -- 2.34.1