From e003f1ac8cb8e921b50eae9a997dfc9258cc998f Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Fri, 6 Feb 2015 17:51:54 +0000 Subject: [PATCH] Make helper functions/classes/globals static. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228410 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Support/CommandLine.cpp | 4 ++++ lib/Target/Mips/MipsFastISel.cpp | 6 +++--- lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 14 +++++++++----- lib/Target/PowerPC/PPCLoopPreIncPrep.cpp | 2 +- lib/Target/R600/AMDGPUInstrInfo.cpp | 2 +- lib/Target/X86/X86CallFrameOptimization.cpp | 7 ++++--- .../Scalar/InductiveRangeCheckElimination.cpp | 8 ++++---- lib/Transforms/Scalar/PlaceSafepoints.cpp | 2 +- 8 files changed, 27 insertions(+), 18 deletions(-) diff --git a/lib/Support/CommandLine.cpp b/lib/Support/CommandLine.cpp index c8578cb6513..7d9f3b7930a 100644 --- a/lib/Support/CommandLine.cpp +++ b/lib/Support/CommandLine.cpp @@ -83,6 +83,8 @@ void StringSaver::anchor() {} //===----------------------------------------------------------------------===// +namespace { + class CommandLineParser { public: // Globals for name and overview of program. Program name is not a string to @@ -190,6 +192,8 @@ public: void printOptionValues(); }; +} // namespace + static ManagedStatic GlobalParser; void cl::AddLiteralOption(Option &O, const char *Name) { diff --git a/lib/Target/Mips/MipsFastISel.cpp b/lib/Target/Mips/MipsFastISel.cpp index 7c53095f03c..a4bf0f3e8bd 100644 --- a/lib/Target/Mips/MipsFastISel.cpp +++ b/lib/Target/Mips/MipsFastISel.cpp @@ -186,9 +186,9 @@ static bool CC_MipsO32_FP32(unsigned ValNo, MVT ValVT, MVT LocVT, llvm_unreachable("should not be called"); } -bool CC_MipsO32_FP64(unsigned ValNo, MVT ValVT, MVT LocVT, - CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, - CCState &State) { +static bool CC_MipsO32_FP64(unsigned ValNo, MVT ValVT, MVT LocVT, + CCValAssign::LocInfo LocInfo, + ISD::ArgFlagsTy ArgFlags, CCState &State) { llvm_unreachable("should not be called"); } diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index b5ca5356568..7a8bc28f7a6 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -42,11 +42,15 @@ using namespace llvm; cl::opt ANDIGlueBug("expose-ppc-andi-glue-bug", cl::desc("expose the ANDI glue bug on PPC"), cl::Hidden); -cl::opt UseBitPermRewriter("ppc-use-bit-perm-rewriter", cl::init(true), - cl::desc("use aggressive ppc isel for bit permutations"), cl::Hidden); -cl::opt BPermRewriterNoMasking("ppc-bit-perm-rewriter-stress-rotates", - cl::desc("stress rotate selection in aggressive ppc isel for " - "bit permutations"), cl::Hidden); +static cl::opt + UseBitPermRewriter("ppc-use-bit-perm-rewriter", cl::init(true), + cl::desc("use aggressive ppc isel for bit permutations"), + cl::Hidden); +static cl::opt BPermRewriterNoMasking( + "ppc-bit-perm-rewriter-stress-rotates", + cl::desc("stress rotate selection in aggressive ppc isel for " + "bit permutations"), + cl::Hidden); namespace llvm { void initializePPCDAGToDAGISelPass(PassRegistry&); diff --git a/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp b/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp index 1aba58f8af2..76dbebc47bc 100644 --- a/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp +++ b/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp @@ -88,7 +88,7 @@ namespace { } char PPCLoopPreIncPrep::ID = 0; -const char *name = "Prepare loop for pre-inc. addressing modes"; +static const char *name = "Prepare loop for pre-inc. addressing modes"; INITIALIZE_PASS_BEGIN(PPCLoopPreIncPrep, DEBUG_TYPE, name, false, false) INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass) INITIALIZE_PASS_DEPENDENCY(ScalarEvolution) diff --git a/lib/Target/R600/AMDGPUInstrInfo.cpp b/lib/Target/R600/AMDGPUInstrInfo.cpp index 292d2fbaabb..f4de2d6ae89 100644 --- a/lib/Target/R600/AMDGPUInstrInfo.cpp +++ b/lib/Target/R600/AMDGPUInstrInfo.cpp @@ -350,7 +350,7 @@ enum SISubtarget { VI = 1 }; -enum SISubtarget AMDGPUSubtargetToSISubtarget(unsigned Gen) { +static enum SISubtarget AMDGPUSubtargetToSISubtarget(unsigned Gen) { switch (Gen) { default: return SI; diff --git a/lib/Target/X86/X86CallFrameOptimization.cpp b/lib/Target/X86/X86CallFrameOptimization.cpp index fae489e77cc..24752a13844 100644 --- a/lib/Target/X86/X86CallFrameOptimization.cpp +++ b/lib/Target/X86/X86CallFrameOptimization.cpp @@ -37,9 +37,10 @@ using namespace llvm; #define DEBUG_TYPE "x86-cf-opt" -cl::opt NoX86CFOpt("no-x86-call-frame-opt", - cl::desc("Avoid optimizing x86 call frames for size"), - cl::init(false), cl::Hidden); +static cl::opt + NoX86CFOpt("no-x86-call-frame-opt", + cl::desc("Avoid optimizing x86 call frames for size"), + cl::init(false), cl::Hidden); namespace { class X86CallFrameOptimization : public MachineFunctionPass { diff --git a/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp b/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp index e9b5f7023c3..809e9ee99c1 100644 --- a/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp +++ b/lib/Transforms/Scalar/InductiveRangeCheckElimination.cpp @@ -76,11 +76,11 @@ using namespace llvm; -cl::opt LoopSizeCutoff("irce-loop-size-cutoff", cl::Hidden, - cl::init(64)); +static cl::opt LoopSizeCutoff("irce-loop-size-cutoff", cl::Hidden, + cl::init(64)); -cl::opt PrintChangedLoops("irce-print-changed-loops", cl::Hidden, - cl::init(false)); +static cl::opt PrintChangedLoops("irce-print-changed-loops", cl::Hidden, + cl::init(false)); #define DEBUG_TYPE "irce" diff --git a/lib/Transforms/Scalar/PlaceSafepoints.cpp b/lib/Transforms/Scalar/PlaceSafepoints.cpp index a55c1a77f9f..8315d322689 100644 --- a/lib/Transforms/Scalar/PlaceSafepoints.cpp +++ b/lib/Transforms/Scalar/PlaceSafepoints.cpp @@ -104,7 +104,7 @@ static cl::opt SkipCounted("spp-counted", cl::init(true)); static cl::opt SplitBackedge("spp-split-backedge", cl::init(false)); // Print tracing output -cl::opt TraceLSP("spp-trace", cl::init(false)); +static cl::opt TraceLSP("spp-trace", cl::init(false)); namespace { -- 2.34.1