From d81980d640cb8fc9adaaa1e01d83db9eb164b149 Mon Sep 17 00:00:00 2001
From: Sanjay Patel <spatel@rotateright.com>
Date: Wed, 19 Aug 2015 21:18:46 +0000
Subject: [PATCH] [x86] enable machine combiner reassociations for scalar
 single-precision maximums

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245504 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/X86InstrInfo.cpp      |  2 ++
 test/CodeGen/X86/machine-combiner.ll | 24 ++++++++++++++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index bd3a3e5165d..d9ee8b3c6d0 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -6394,7 +6394,9 @@ static bool isAssociativeAndCommutative(const MachineInstr &Inst) {
   // Normal min/max instructions are not commutative because of NaN and signed
   // zero semantics, but these are. Thus, there's no need to check for global
   // relaxed math; the instructions themselves have the properties we need.
+  case X86::MAXCSSrr:
   case X86::MINCSSrr:
+  case X86::VMAXCSSrr:
   case X86::VMINCSSrr:
     return true;
   case X86::ADDPDrr:
diff --git a/test/CodeGen/X86/machine-combiner.ll b/test/CodeGen/X86/machine-combiner.ll
index 3b5e6d212e3..2335cc7f1a8 100644
--- a/test/CodeGen/X86/machine-combiner.ll
+++ b/test/CodeGen/X86/machine-combiner.ll
@@ -382,3 +382,27 @@ define float @reassociate_mins_single(float %x0, float %x1, float %x2, float %x3
   ret float %sel2
 }
 
+; Verify that SSE and AVX scalar single-precision maximum ops are reassociated.
+
+define float @reassociate_maxs_single(float %x0, float %x1, float %x2, float %x3) {
+; SSE-LABEL: reassociate_maxs_single:
+; SSE:       # BB#0:
+; SSE-NEXT:    divss %xmm1, %xmm0
+; SSE-NEXT:    maxss %xmm3, %xmm2
+; SSE-NEXT:    maxss %xmm2, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: reassociate_maxs_single:
+; AVX:       # BB#0:
+; AVX-NEXT:    vdivss %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    vmaxss %xmm3, %xmm2, %xmm1
+; AVX-NEXT:    vmaxss %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    retq
+  %t0 = fdiv float %x0, %x1
+  %cmp1 = fcmp ogt float %x2, %t0
+  %sel1 = select i1 %cmp1, float %x2, float %t0
+  %cmp2 = fcmp ogt float %x3, %sel1
+  %sel2 = select i1 %cmp2, float %x3, float %sel1
+  ret float %sel2
+}
+
-- 
2.34.1