From d5333d6922fa5ce8954df600a61605e4ca1d92f6 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Mon, 24 Oct 2011 17:56:48 +0000 Subject: [PATCH] Delete the Latency scheduling preference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142815 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetMachine.h | 1 - lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 2 -- 2 files changed, 3 deletions(-) diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h index 30c5b3ac644..366a13c56e7 100644 --- a/include/llvm/Target/TargetMachine.h +++ b/include/llvm/Target/TargetMachine.h @@ -56,7 +56,6 @@ namespace CodeGenOpt { namespace Sched { enum Preference { None, // No preference - Latency, // Scheduling for shortest total latency. RegPressure, // Scheduling for lowest register pressure. Hybrid, // Scheduling for both latency and register pressure. ILP // Scheduling for ILP in low register pressure mode. diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 68b9146adfe..2964bd30e68 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -144,8 +144,6 @@ namespace llvm { if (OptLevel == CodeGenOpt::None) return createSourceListDAGScheduler(IS, OptLevel); - if (TLI.getSchedulingPreference() == Sched::Latency) - return createTDListDAGScheduler(IS, OptLevel); if (TLI.getSchedulingPreference() == Sched::RegPressure) return createBURRListDAGScheduler(IS, OptLevel); if (TLI.getSchedulingPreference() == Sched::Hybrid) -- 2.34.1