From d1e3fcf347ffaff463c29773a9d7a43b4fc2a896 Mon Sep 17 00:00:00 2001 From: Alexey Samsonov Date: Wed, 20 Aug 2014 21:56:43 +0000 Subject: [PATCH] Fix undefined behavior (left shift of negative value) in SystemZ backend. This bug is reported by UBSan. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216131 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/SystemZ/SystemZFrameLowering.cpp | 2 +- lib/Target/SystemZ/SystemZISelLowering.cpp | 8 ++------ 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/lib/Target/SystemZ/SystemZFrameLowering.cpp b/lib/Target/SystemZ/SystemZFrameLowering.cpp index db1a005353b..eff4ae3baf3 100644 --- a/lib/Target/SystemZ/SystemZFrameLowering.cpp +++ b/lib/Target/SystemZ/SystemZFrameLowering.cpp @@ -294,7 +294,7 @@ static void emitIncrement(MachineBasicBlock &MBB, else { Opcode = SystemZ::AGFI; // Make sure we maintain 8-byte stack alignment. - int64_t MinVal = -int64_t(1) << 31; + int64_t MinVal = -uint64_t(1) << 31; int64_t MaxVal = (int64_t(1) << 31) - 8; if (ThisVal < MinVal) ThisVal = MinVal; diff --git a/lib/Target/SystemZ/SystemZISelLowering.cpp b/lib/Target/SystemZ/SystemZISelLowering.cpp index 228ca6e3d1e..3ca2dbae6e4 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -2800,14 +2800,10 @@ SystemZTargetLowering::emitAtomicLoadBinary(MachineInstr *MI, unsigned Tmp = MRI.createVirtualRegister(RC); BuildMI(MBB, DL, TII->get(BinOpcode), Tmp) .addReg(RotatedOldVal).addOperand(Src2); - if (BitSize < 32) + if (BitSize <= 32) // XILF with the upper BitSize bits set. BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal) - .addReg(Tmp).addImm(uint32_t(~0 << (32 - BitSize))); - else if (BitSize == 32) - // XILF with every bit set. - BuildMI(MBB, DL, TII->get(SystemZ::XILF), RotatedNewVal) - .addReg(Tmp).addImm(~uint32_t(0)); + .addReg(Tmp).addImm(-1U << (32 - BitSize)); else { // Use LCGR and add -1 to the result, which is more compact than // an XILF, XILH pair. -- 2.34.1