From d1070bbc629d0ba7b501ce0c74e3ce6fe83e2085 Mon Sep 17 00:00:00 2001 From: Roman Divacky Date: Mon, 28 Dec 2015 17:47:23 +0000 Subject: [PATCH] Support clrex instruction on ARMv6k. Patch by Andrew Turner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256505 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrInfo.td | 2 +- test/MC/ARM/arm11-hint-instr.s | 23 ++++++++++++++++++----- 2 files changed, 19 insertions(+), 6 deletions(-) diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 2aa9475e6f4..b9de83bfe6d 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -4728,7 +4728,7 @@ def STLEXD : AIstlex<0b01, (outs GPR:$Rd), def CLREX : AXI<(outs), (ins), MiscFrm, NoItinerary, "clrex", [(int_arm_clrex)]>, - Requires<[IsARM, HasV7]> { + Requires<[IsARM, HasV6K]> { let Inst{31-0} = 0b11110101011111111111000000011111; } diff --git a/test/MC/ARM/arm11-hint-instr.s b/test/MC/ARM/arm11-hint-instr.s index 6f5a374e417..2c0fef4adf7 100644 --- a/test/MC/ARM/arm11-hint-instr.s +++ b/test/MC/ARM/arm11-hint-instr.s @@ -5,21 +5,24 @@ @ RUN: | FileCheck --check-prefix=CHECK-ARM %s @ RUN: llvm-mc -triple=armv6t2 -show-encoding < %s \ @ RUN: | FileCheck --check-prefix=CHECK-ARM %s -@ RUN: llvm-mc -triple=thumb -mcpu=arm1156t2-s -show-encoding < %s \ -@ RUN: | FileCheck --check-prefix=CHECK-THUMB %s -@ RUN: llvm-mc -triple=armv6m -show-encoding < %s \ -@ RUN: | FileCheck --check-prefix=CHECK-V6M %s +@ RUN: not llvm-mc -triple=thumb -mcpu=arm1156t2-s -show-encoding < %s > %t3 2> %t4 +@ RUN: FileCheck --check-prefix=CHECK-THUMB %s < %t3 +@ RUN: FileCheck --check-prefix=CHECK-ERROR-THUMB %s < %t4 +@ RUN: not llvm-mc -triple=armv6m -show-encoding < %s > %t5 2> %t6 +@ RUN: FileCheck --check-prefix=CHECK-V6M %s < %t5 +@ RUN: FileCheck --check-prefix=CHECK-ERROR-V6M %s < %t6 .syntax unified @------------------------------------------------------------------------------ -@ YIELD/WFE/WFI/SEV - are not supported pre v6K +@ YIELD/WFE/WFI/SEV/CLREX - are not supported pre v6K @------------------------------------------------------------------------------ nop yield wfe wfi sev + clrex @------------------------------------------------------------------------------ @@ -37,6 +40,9 @@ @ CHECK-ERROR-V6: error: instruction requires: armv6k @ CHECK-ERROR-V6: sev @ CHECK-ERROR-V6: ^ +@ CHECK-ERROR-V6: error: instruction requires: armv6k +@ CHECK-ERROR-V6: clrex +@ CHECK-ERROR-V6: ^ @------------------------------------------------------------------------------ @ v6K using ARM encoding @@ -49,6 +55,7 @@ @ CHECK-ARM: wfe @ encoding: [0x02,0xf0,0x20,0xe3] @ CHECK-ARM: wfi @ encoding: [0x03,0xf0,0x20,0xe3] @ CHECK-ARM: sev @ encoding: [0x04,0xf0,0x20,0xe3] +@ CHECK-ARM: clrex @ encoding: [0x1f,0xf0,0x7f,0xf5] @------------------------------------------------------------------------------ @ v6T2 using THUMB encoding (thumb triple) @@ -58,6 +65,9 @@ @ CHECK-THUMB: wfe @ encoding: [0x20,0xbf] @ CHECK-THUMB: wfi @ encoding: [0x30,0xbf] @ CHECK-THUMB: sev @ encoding: [0x40,0xbf] +@ CHECK-ERROR-THUMB: error: instruction requires: armv7 +@ CHECK-ERROR-THUMB: clrex +@ CHECK-ERROR-THUMB: ^ @------------------------------------------------------------------------------ @ v6M using THUMB encoding @@ -67,3 +77,6 @@ @ CHECK-V6M: wfe @ encoding: [0x20,0xbf] @ CHECK-V6M: wfi @ encoding: [0x30,0xbf] @ CHECK-V6M: sev @ encoding: [0x40,0xbf] +@ CHECK-ERROR-V6M: error: instruction requires: armv7 +@ CHECK-ERROR-V6M: clrex +@ CHECK-ERROR-V6M: ^ -- 2.34.1