From d092a87ba3f905a6801a0bdf816267329cf0391c Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Mon, 29 Nov 2010 21:28:32 +0000 Subject: [PATCH] Rename t2 TBB and TBH instructions to reference that they encode the jump table data. Next up, pseudo-izing them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120320 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMAsmPrinter.cpp | 10 +++++----- lib/Target/ARM/ARMBaseInstrInfo.cpp | 10 +++++----- lib/Target/ARM/ARMConstantIslandPass.cpp | 2 +- lib/Target/ARM/ARMInstrThumb2.td | 4 ++-- lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 2 +- utils/TableGen/ARMDecoderEmitter.cpp | 2 +- 6 files changed, 15 insertions(+), 15 deletions(-) diff --git a/lib/Target/ARM/ARMAsmPrinter.cpp b/lib/Target/ARM/ARMAsmPrinter.cpp index da1c087c7fe..1d1785d33f5 100644 --- a/lib/Target/ARM/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/ARMAsmPrinter.cpp @@ -740,9 +740,9 @@ void ARMAsmPrinter::EmitJump2Table(const MachineInstr *MI) { const std::vector &JT = MJTI->getJumpTables(); const std::vector &JTBBs = JT[JTI].MBBs; unsigned OffsetWidth = 4; - if (MI->getOpcode() == ARM::t2TBB) + if (MI->getOpcode() == ARM::t2TBB_JT) OffsetWidth = 1; - else if (MI->getOpcode() == ARM::t2TBH) + else if (MI->getOpcode() == ARM::t2TBH_JT) OffsetWidth = 2; for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) { @@ -777,7 +777,7 @@ void ARMAsmPrinter::EmitJump2Table(const MachineInstr *MI) { // Make sure the instruction that follows TBB is 2-byte aligned. // FIXME: Constant island pass should insert an "ALIGN" instruction instead. - if (MI->getOpcode() == ARM::t2TBB) + if (MI->getOpcode() == ARM::t2TBB_JT) EmitAlignment(1); } @@ -924,8 +924,8 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) { return; } - case ARM::t2TBB: - case ARM::t2TBH: + case ARM::t2TBB_JT: + case ARM::t2TBH_JT: case ARM::t2BR_JT: { // Lower and emit the instruction itself, then the jump table following it. MCInst TmpInst; diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index 22fed76e927..4838b7dcc03 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -518,13 +518,13 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { case ARM::BR_JTadd: case ARM::tBR_JTr: case ARM::t2BR_JT: - case ARM::t2TBB: - case ARM::t2TBH: { + case ARM::t2TBB_JT: + case ARM::t2TBH_JT: { // These are jumptable branches, i.e. a branch followed by an inlined // jumptable. The size is 4 + 4 * number of entries. For TBB, each // entry is one byte; TBH two byte each. - unsigned EntrySize = (Opc == ARM::t2TBB) - ? 1 : ((Opc == ARM::t2TBH) ? 2 : 4); + unsigned EntrySize = (Opc == ARM::t2TBB_JT) + ? 1 : ((Opc == ARM::t2TBH_JT) ? 2 : 4); unsigned NumOps = TID.getNumOperands(); MachineOperand JTOP = MI->getOperand(NumOps - (TID.isPredicable() ? 3 : 2)); @@ -542,7 +542,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { // alignment issue. unsigned InstSize = (Opc == ARM::tBR_JTr || Opc == ARM::t2BR_JT) ? 2 : 4; unsigned NumEntries = getNumJTEntries(JT, JTI); - if (Opc == ARM::t2TBB && (NumEntries & 1)) + if (Opc == ARM::t2TBB_JT && (NumEntries & 1)) // Make sure the instruction that follows TBB is 2-byte aligned. // FIXME: Constant island pass should insert an "ALIGN" instruction // instead. diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp index 6f01846ab5e..3c254085647 100644 --- a/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -1766,7 +1766,7 @@ bool ARMConstantIslands::OptimizeThumb2JumpTables(MachineFunction &MF) { if (!OptOk) continue; - unsigned Opc = ByteOk ? ARM::t2TBB : ARM::t2TBH; + unsigned Opc = ByteOk ? ARM::t2TBB_JT : ARM::t2TBH_JT; MachineInstr *NewJTMI = BuildMI(MBB, MI->getDebugLoc(), TII->get(Opc)) .addReg(IdxReg, getKillRegState(IdxRegKill)) .addJumpTableIndex(JTI, JTOP.getTargetFlags()) diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 3270b0c1e4b..54c98e6c881 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -2947,7 +2947,7 @@ def t2BR_JT : // FIXME: Add a non-pc based case that can be predicated. let isCodeGenOnly = 1 in // $id doesn't exist in asm string, should be lowered. -def t2TBB : +def t2TBB_JT : T2JTI<(outs), (ins tb_addrmode:$index, jt2block_operand:$jt, i32imm:$id), IIC_Br, "tbb\t$index$jt", []> { @@ -2959,7 +2959,7 @@ def t2TBB : } let isCodeGenOnly = 1 in // $id doesn't exist in asm string, should be lowered. -def t2TBH : +def t2TBH_JT : T2JTI<(outs), (ins tb_addrmode:$index, jt2block_operand:$jt, i32imm:$id), IIC_Br, "tbh\t$index$jt", []> { diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index f865b146b8f..476013156af 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -531,7 +531,7 @@ void ARMInstPrinter::printThumbAddrModeSPOperand(const MCInst *MI, unsigned Op, void ARMInstPrinter::printTBAddrMode(const MCInst *MI, unsigned OpNum, raw_ostream &O) { O << "[pc, " << getRegisterName(MI->getOperand(OpNum).getReg()); - if (MI->getOpcode() == ARM::t2TBH) + if (MI->getOpcode() == ARM::t2TBH_JT) O << ", lsl #1"; O << ']'; } diff --git a/utils/TableGen/ARMDecoderEmitter.cpp b/utils/TableGen/ARMDecoderEmitter.cpp index 60a31a2b3a3..f5d4eb08fe5 100644 --- a/utils/TableGen/ARMDecoderEmitter.cpp +++ b/utils/TableGen/ARMDecoderEmitter.cpp @@ -1719,7 +1719,7 @@ bool ARMDecoderEmitter::ARMDEBackend::populateInstruction( return false; // Ignore t2TBB, t2TBH and prefer the generic t2TBBgen, t2TBHgen. - if (Name == "t2TBB" || Name == "t2TBH") + if (Name == "t2TBB_JT" || Name == "t2TBH_JT") return false; // Resolve conflicts: -- 2.34.1