From cb94192ff01fabdd492e9b229683e5d98aa2099f Mon Sep 17 00:00:00 2001 From: Andrew Trick Date: Mon, 9 Jul 2012 20:43:03 +0000 Subject: [PATCH] Machine model: allow itineraries to be shared by different processor models. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159959 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/SubtargetEmitter.cpp | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/utils/TableGen/SubtargetEmitter.cpp b/utils/TableGen/SubtargetEmitter.cpp index 48dbdc2c7c2..39055c07b9c 100644 --- a/utils/TableGen/SubtargetEmitter.cpp +++ b/utils/TableGen/SubtargetEmitter.cpp @@ -336,10 +336,16 @@ EmitStageAndOperandCycleData(raw_ostream &OS, std::vector > &ProcItinLists) { + // Multiple processor models may share an itinerary record. Emit it once. + SmallPtrSet ItinsDefSet; + // Emit functional units for all the itineraries. for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(), PE = SchedModels.procModelEnd(); PI != PE; ++PI) { + if (!ItinsDefSet.insert(PI->ItinsDef)) + continue; + std::vector FUs = PI->ItinsDef->getValueAsListOfDefs("FU"); if (FUs.empty()) continue; @@ -508,12 +514,18 @@ void SubtargetEmitter:: EmitItineraries(raw_ostream &OS, std::vector > &ProcItinLists) { + // Multiple processor models may share an itinerary record. Emit it once. + SmallPtrSet ItinsDefSet; + // For each processor's machine model std::vector >::iterator ProcItinListsIter = ProcItinLists.begin(); for (CodeGenSchedModels::ProcIter PI = SchedModels.procModelBegin(), PE = SchedModels.procModelEnd(); PI != PE; ++PI) { + Record *ItinsDef = PI->ItinsDef; + if (!ItinsDefSet.insert(ItinsDef)) + continue; // Get processor itinerary name const std::string &Name = ItinsDef->getName(); -- 2.34.1