From bd2a7002089ebc74f6415d12162dc05c51553ecf Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Thu, 29 Jan 2015 00:19:42 +0000 Subject: [PATCH] Remove getSubtargetImpl from AArch64ISelLowering and cache the correct subtarget by passing it in during the constructor as TargetLowering is Subtarget specific. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227402 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64ISelLowering.cpp | 18 +++++++----------- lib/Target/AArch64/AArch64ISelLowering.h | 3 ++- lib/Target/AArch64/AArch64Subtarget.cpp | 2 +- 3 files changed, 10 insertions(+), 13 deletions(-) diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp index 14084e034b8..64f6e565768 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -67,10 +67,9 @@ EnableAArch64SlrGeneration("aarch64-shift-insert-generation", cl::Hidden, cl::desc("Allow AArch64 SLI/SRI formation"), cl::init(false)); - -AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM) - : TargetLowering(TM) { - Subtarget = &TM.getSubtarget(); +AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM, + const AArch64Subtarget &STI) + : TargetLowering(TM), Subtarget(&STI) { // AArch64 doesn't have comparisons which set GPRs or setcc instructions, so // we have to make something up. Arbitrarily, choose ZeroOrOne. @@ -879,7 +878,7 @@ AArch64TargetLowering::EmitF128CSEL(MachineInstr *MI, // Dest = PHI [IfTrue, TrueBB], [IfFalse, OrigBB] MachineFunction *MF = MBB->getParent(); - const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo(); + const TargetInstrInfo *TII = Subtarget->getInstrInfo(); const BasicBlock *LLVM_BB = MBB->getBasicBlock(); DebugLoc DL = MI->getDebugLoc(); MachineFunction::iterator It = MBB; @@ -2796,8 +2795,7 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI, // Add a register mask operand representing the call-preserved registers. const uint32_t *Mask; - const AArch64RegisterInfo *TRI = static_cast( - MF.getSubtarget().getRegisterInfo()); + const AArch64RegisterInfo *TRI = Subtarget->getRegisterInfo(); if (IsThisReturn) { // For 'this' returns, use the X0-preserving mask if applicable Mask = TRI->getThisReturnPreservedMask(CallConv); @@ -3027,8 +3025,7 @@ AArch64TargetLowering::LowerDarwinGlobalTLSAddress(SDValue Op, // trashed: X0 (it takes an argument), LR (it's a call) and NZCV (let's not be // silly). const uint32_t *Mask = - static_cast( - DAG.getSubtarget().getRegisterInfo())->getTLSCallPreservedMask(); + Subtarget->getRegisterInfo()->getTLSCallPreservedMask(); // Finally, we can make the call. This is just a degenerate version of a // normal AArch64 call node: x0 takes the address of the descriptor, and @@ -3076,8 +3073,7 @@ SDValue AArch64TargetLowering::LowerELFTLSDescCall(SDValue SymAddr, // trashed: X0 (it takes an argument), LR (it's a call) and NZCV (let's not be // silly). const uint32_t *Mask = - static_cast( - DAG.getSubtarget().getRegisterInfo())->getTLSCallPreservedMask(); + Subtarget->getRegisterInfo()->getTLSCallPreservedMask(); // The function takes only one argument: the address of the descriptor itself // in X0. diff --git a/lib/Target/AArch64/AArch64ISelLowering.h b/lib/Target/AArch64/AArch64ISelLowering.h index f4e86883902..6cbc425e71f 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.h +++ b/lib/Target/AArch64/AArch64ISelLowering.h @@ -207,7 +207,8 @@ class AArch64TargetLowering : public TargetLowering { bool RequireStrictAlign; public: - explicit AArch64TargetLowering(const TargetMachine &TM); + explicit AArch64TargetLowering(const TargetMachine &TM, + const AArch64Subtarget &STI); /// Selects the correct CCAssignFn for a given CallingConvention value. CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg) const; diff --git a/lib/Target/AArch64/AArch64Subtarget.cpp b/lib/Target/AArch64/AArch64Subtarget.cpp index d48a54decd8..c6130253dd8 100644 --- a/lib/Target/AArch64/AArch64Subtarget.cpp +++ b/lib/Target/AArch64/AArch64Subtarget.cpp @@ -51,7 +51,7 @@ AArch64Subtarget::AArch64Subtarget(const std::string &TT, HasZeroCycleRegMove(false), HasZeroCycleZeroing(false), IsLittle(LittleEndian), CPUString(CPU), TargetTriple(TT), FrameLowering(), InstrInfo(initializeSubtargetDependencies(FS)), - TSInfo(TM.getDataLayout()), TLInfo(TM) {} + TSInfo(TM.getDataLayout()), TLInfo(TM, *this) {} /// ClassifyGlobalReference - Find the target operand flags that describe /// how a global value should be referenced for the current subtarget. -- 2.34.1