From b975ecb43f74888e84d14d92ef95c9a86684549f Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Sat, 5 Dec 2015 20:03:44 +0000 Subject: [PATCH] [WebAssembly] Support inline asm constraints of type i16 and similar. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@254861 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../WebAssembly/WebAssemblyISelLowering.cpp | 11 +++++++---- test/CodeGen/WebAssembly/inline-asm.ll | 16 ++++++++++++++++ 2 files changed, 23 insertions(+), 4 deletions(-) diff --git a/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index baefd8d0758..6e1283b4d33 100644 --- a/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -228,10 +228,13 @@ WebAssemblyTargetLowering::getRegForInlineAsmConstraint( if (Constraint.size() == 1) { switch (Constraint[0]) { case 'r': - if (VT == MVT::i32) - return std::make_pair(0U, &WebAssembly::I32RegClass); - if (VT == MVT::i64) - return std::make_pair(0U, &WebAssembly::I64RegClass); + assert(VT != MVT::iPTR && "Pointer MVT not expected here"); + if (VT.isInteger() && !VT.isVector()) { + if (VT.getSizeInBits() <= 32) + return std::make_pair(0U, &WebAssembly::I32RegClass); + if (VT.getSizeInBits() <= 64) + return std::make_pair(0U, &WebAssembly::I64RegClass); + } break; default: break; diff --git a/test/CodeGen/WebAssembly/inline-asm.ll b/test/CodeGen/WebAssembly/inline-asm.ll index e9d2ebf51f6..646ea779dc8 100644 --- a/test/CodeGen/WebAssembly/inline-asm.ll +++ b/test/CodeGen/WebAssembly/inline-asm.ll @@ -56,6 +56,22 @@ entry: ret i64 %0 } +; CHECK-LABEL: X_i16: +; CHECK: foo $1{{$}} +; CHECK: i32.store16 $discard=, 0($0), $1{{$}} +define void @X_i16(i16 * %t) { + call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"(i16* %t) + ret void +} + +; CHECK-LABEL: X_ptr: +; CHECK: foo $1{{$}} +; CHECK: i32.store $discard=, 0($0), $1 +define void @X_ptr(i16 ** %t) { + call void asm sideeffect "foo $0", "=*X,~{dirflag},~{fpsr},~{flags},~{memory}"(i16** %t) + ret void +} + attributes #0 = { nounwind } !0 = !{i32 47} -- 2.34.1