From b646a4b0b8df01d6cffbc628ba7d7139537ee4fe Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Mon, 22 Dec 2014 13:29:46 +0000 Subject: [PATCH] Convert a few tests to FileCheck. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224705 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/ARM/2007-05-09-tailmerge-2.ll | 9 +++++++-- test/CodeGen/ARM/2007-05-22-tailmerge-3.ll | 23 +++++++++++++++++----- test/CodeGen/ARM/cse-libcalls.ll | 6 +++++- test/CodeGen/ARM/tls1.ll | 14 +++++++------ 4 files changed, 38 insertions(+), 14 deletions(-) diff --git a/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll b/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll index 48941162c81..37e41ecc4b1 100644 --- a/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll +++ b/test/CodeGen/ARM/2007-05-09-tailmerge-2.ll @@ -1,6 +1,11 @@ -; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*baz | count 1 -; RUN: llc < %s -march=arm -enable-tail-merge | grep bl.*quux | count 1 +; RUN: llc < %s -march=arm | FileCheck %s + ; Check that calls to baz and quux are tail-merged. +; CHECK: bl _baz +; CHECK-NOT: bl _baz +; CHECK: bl _quux +; CHECK-NOT: bl _quux + ; PR1628 ; ModuleID = 'tail.c' diff --git a/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll b/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll index acbab8a0a07..30ae7237395 100644 --- a/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll +++ b/test/CodeGen/ARM/2007-05-22-tailmerge-3.ll @@ -1,10 +1,23 @@ -; RUN: llc < %s -march=arm | grep bl.*baz | count 1 -; RUN: llc < %s -march=arm | grep bl.*quux | count 1 -; RUN: llc < %s -march=arm -enable-tail-merge=0 | grep bl.*baz | count 2 -; RUN: llc < %s -march=arm -enable-tail-merge=0 | grep bl.*quux | count 2 -; Check that tail merging is the default on ARM, and that -enable-tail-merge=0 works. +; RUN: llc < %s -march=arm | FileCheck %s +; RUN: llc < %s -march=arm -enable-tail-merge=0 | \ +; RUN: FileCheck --check-prefix=NOMERGE %s + +; Check that tail merging is the default on ARM, and that -enable-tail-merge=0 +; works. ; PR1628 +; CHECK: bl _baz +; CHECK-NOT: bl _baz + +; CHECK: bl _quux +; CHECK-NOT: bl _quux + +; NOMERGE: bl _baz +; NOMERGE: bl _baz + +; NOMERGE: bl _quux +; NOMERGE: bl _quux + ; ModuleID = 'tail.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" diff --git a/test/CodeGen/ARM/cse-libcalls.ll b/test/CodeGen/ARM/cse-libcalls.ll index 62b9e4380b2..4f5b7592c84 100644 --- a/test/CodeGen/ARM/cse-libcalls.ll +++ b/test/CodeGen/ARM/cse-libcalls.ll @@ -1,9 +1,13 @@ -; RUN: llc < %s -march=arm | grep "bl.*__ltdf" | count 1 +; RUN: llc < %s -march=arm | FileCheck %s + target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" ; Without CSE of libcalls, there are two calls in the output instead of one. +; CHECK: bl ___ltdf +; CHECK-NOT: bl ___ltdf + define double @u_f_nonbon(double %lambda) nounwind { entry: %tmp19.i.i = load double* null, align 4 ; [#uses=2] diff --git a/test/CodeGen/ARM/tls1.ll b/test/CodeGen/ARM/tls1.ll index a1ca0b758b4..b03f76b6ef0 100644 --- a/test/CodeGen/ARM/tls1.ll +++ b/test/CodeGen/ARM/tls1.ll @@ -1,11 +1,13 @@ -; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \ -; RUN: grep "i(TPOFF)" -; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \ -; RUN: grep "__aeabi_read_tp" -; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi \ -; RUN: -relocation-model=pic | grep "__tls_get_addr" +; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | FileCheck %s +; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi -relocation-model=pic | \ +; RUN: FileCheck %s --check-prefix=PIC +; CHECK: i(TPOFF) +; CHECK: __aeabi_read_tp + +; PIC: __tls_get_addr + @i = thread_local global i32 15 ; [#uses=2] define i32 @f() { -- 2.34.1