From b2e21a25bd44526fcf3a73bab2a1747b554e5e75 Mon Sep 17 00:00:00 2001 From: Dan Gohman Date: Fri, 20 Nov 2015 03:02:49 +0000 Subject: [PATCH] [WebAssembly] Rename SWITCH to TABLESWITCH to match the current wording in the spec. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253642 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/WebAssembly/WebAssemblyISD.def | 2 +- lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 6 +++--- lib/Target/WebAssembly/WebAssemblyInstrControl.td | 14 +++++++------- lib/Target/WebAssembly/WebAssemblyInstrInfo.td | 8 ++++---- test/CodeGen/WebAssembly/switch.ll | 4 ++-- 5 files changed, 17 insertions(+), 17 deletions(-) diff --git a/lib/Target/WebAssembly/WebAssemblyISD.def b/lib/Target/WebAssembly/WebAssemblyISD.def index 52c37757cdb..3a03fa55b22 100644 --- a/lib/Target/WebAssembly/WebAssemblyISD.def +++ b/lib/Target/WebAssembly/WebAssemblyISD.def @@ -20,6 +20,6 @@ HANDLE_NODETYPE(RETURN) HANDLE_NODETYPE(ARGUMENT) HANDLE_NODETYPE(Wrapper) HANDLE_NODETYPE(BR_IF) -HANDLE_NODETYPE(SWITCH) +HANDLE_NODETYPE(TABLESWITCH) // add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here... diff --git a/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index dbfe00e95ed..8b706b7501c 100644 --- a/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -437,8 +437,8 @@ SDValue WebAssemblyTargetLowering::LowerGlobalAddress(SDValue Op, SDValue WebAssemblyTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const { // There's no need for a Wrapper node because we always incorporate a jump - // table operand into a SWITCH instruction, rather than ever materializing - // it in a register. + // table operand into a TABLESWITCH instruction, rather than ever + // materializing it in a register. const JumpTableSDNode *JT = cast(Op); return DAG.getTargetJumpTable(JT->getIndex(), Op.getValueType(), JT->getTargetFlags()); @@ -468,7 +468,7 @@ SDValue WebAssemblyTargetLowering::LowerBR_JT(SDValue Op, for (auto MBB : MBBs) Ops.push_back(DAG.getBasicBlock(MBB)); - return DAG.getNode(WebAssemblyISD::SWITCH, DL, MVT::Other, Ops); + return DAG.getNode(WebAssemblyISD::TABLESWITCH, DL, MVT::Other, Ops); } //===----------------------------------------------------------------------===// diff --git a/lib/Target/WebAssembly/WebAssemblyInstrControl.td b/lib/Target/WebAssembly/WebAssemblyInstrControl.td index 998afbe51cb..92393d435c2 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrControl.td +++ b/lib/Target/WebAssembly/WebAssemblyInstrControl.td @@ -24,15 +24,15 @@ def BR : I<(outs), (ins bb_op:$dst), } // isBranch = 1, isTerminator = 1, hasCtrlDep = 1 // TODO: SelectionDAG's lowering insists on using a pointer as the index for -// jump tables, so in practice we don't ever use SWITCH_I64 in wasm32 mode +// jump tables, so in practice we don't ever use TABLESWITCH_I64 in wasm32 mode // currently. let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in { -def SWITCH_I32 : I<(outs), (ins I32:$index, variable_ops), - [(WebAssemblyswitch I32:$index)], - "switch \t$index">; -def SWITCH_I64 : I<(outs), (ins I64:$index, variable_ops), - [(WebAssemblyswitch I64:$index)], - "switch \t$index">; +def TABLESWITCH_I32 : I<(outs), (ins I32:$index, variable_ops), + [(WebAssemblytableswitch I32:$index)], + "tableswitch\t$index">; +def TABLESWITCH_I64 : I<(outs), (ins I64:$index, variable_ops), + [(WebAssemblytableswitch I64:$index)], + "tableswitch\t$index">; } // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 // Placemarkers to indicate the start of a block or loop scope. diff --git a/lib/Target/WebAssembly/WebAssemblyInstrInfo.td b/lib/Target/WebAssembly/WebAssemblyInstrInfo.td index 382f928be74..dae9cffd2f5 100644 --- a/lib/Target/WebAssembly/WebAssemblyInstrInfo.td +++ b/lib/Target/WebAssembly/WebAssemblyInstrInfo.td @@ -30,7 +30,7 @@ def SDT_WebAssemblyCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>; def SDT_WebAssemblyCall0 : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; def SDT_WebAssemblyCall1 : SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>; -def SDT_WebAssemblySwitch : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; +def SDT_WebAssemblyTableswitch : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>; def SDT_WebAssemblyReturn : SDTypeProfile<0, -1, []>; def SDT_WebAssemblyWrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, @@ -52,9 +52,9 @@ def WebAssemblycall0 : SDNode<"WebAssemblyISD::CALL0", def WebAssemblycall1 : SDNode<"WebAssemblyISD::CALL1", SDT_WebAssemblyCall1, [SDNPHasChain, SDNPVariadic]>; -def WebAssemblyswitch : SDNode<"WebAssemblyISD::SWITCH", - SDT_WebAssemblySwitch, - [SDNPHasChain, SDNPVariadic]>; +def WebAssemblytableswitch : SDNode<"WebAssemblyISD::TABLESWITCH", + SDT_WebAssemblyTableswitch, + [SDNPHasChain, SDNPVariadic]>; def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT", SDT_WebAssemblyArgument>; def WebAssemblyreturn : SDNode<"WebAssemblyISD::RETURN", diff --git a/test/CodeGen/WebAssembly/switch.ll b/test/CodeGen/WebAssembly/switch.ll index 8e49fd120e5..41c5b357d06 100644 --- a/test/CodeGen/WebAssembly/switch.ll +++ b/test/CodeGen/WebAssembly/switch.ll @@ -20,7 +20,7 @@ declare void @foo5() ; CHECK: block BB0_4{{$}} ; CHECK: block BB0_3{{$}} ; CHECK: block BB0_2{{$}} -; CHECK: switch {{.*}}, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_5, BB0_6, BB0_7{{$}} +; CHECK: tableswitch {{.*}}, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_2, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_3, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_4, BB0_5, BB0_6, BB0_7{{$}} ; CHECK: BB0_2: ; CHECK: call foo0 ; CHECK: BB0_3: @@ -100,7 +100,7 @@ sw.epilog: ; preds = %entry, %sw.bb.5, %s ; CHECK: block BB1_4{{$}} ; CHECK: block BB1_3{{$}} ; CHECK: block BB1_2{{$}} -; CHECK: switch {{.*}}, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_5, BB1_6, BB1_7{{$}} +; CHECK: tableswitch {{.*}}, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_2, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_3, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_4, BB1_5, BB1_6, BB1_7{{$}} ; CHECK: BB1_2: ; CHECK: call foo0 ; CHECK: BB1_3: -- 2.34.1