From ad4df4c0da1a0e4b091321e1ffdc7973669e4273 Mon Sep 17 00:00:00 2001 From: Johnny Chen Date: Mon, 1 Mar 2010 19:22:00 +0000 Subject: [PATCH] Added STRHT for disassembly only and fixed a bug in AI3sthpo class where the W bit should be set to 0 instead of 1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97481 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMInstrFormats.td | 2 +- lib/Target/ARM/ARMInstrInfo.td | 10 +++++++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index 7b5a1e3a7ed..76595fa2952 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -815,7 +815,7 @@ class AI3sthpo; -// STRT and STRBT are for disassembly only. +// STRT, STRBT, and STRHT are for disassembly only. def STRT : AI2stwpo<(outs GPR:$base_wb), (ins GPR:$src, GPR:$base,am2offset:$offset), @@ -1278,6 +1278,14 @@ def STRBT : AI2stbpo<(outs GPR:$base_wb), let Inst{21} = 1; // overwrite } +def STRHT: AI3sthpo<(outs GPR:$base_wb), + (ins GPR:$src, GPR:$base,am3offset:$offset), + StMiscFrm, IIC_iStoreru, + "strht", "\t$src, [$base], $offset", "$base = $base_wb", + [/* For disassembly only; pattern left blank */]> { + let Inst{21} = 1; // overwrite +} + //===----------------------------------------------------------------------===// // Load / store multiple Instructions. // -- 2.34.1