From ab21db79ef1d2530880ad11f21f0b87ffca02dd4 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Wed, 28 Oct 2009 00:19:10 +0000 Subject: [PATCH] rename indbr -> indirectbr to appease the residents of #llvm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85351 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/LangRef.html | 16 +++--- include/llvm/Bitcode/LLVMBitCodes.h | 2 +- include/llvm/Instruction.def | 2 +- include/llvm/Instructions.h | 56 +++++++++---------- include/llvm/Support/InstVisitor.h | 2 +- lib/Analysis/InlineCost.cpp | 2 +- lib/Analysis/SparsePropagation.cpp | 2 +- lib/AsmParser/LLLexer.cpp | 2 +- lib/AsmParser/LLParser.cpp | 16 +++--- lib/AsmParser/LLParser.h | 2 +- lib/AsmParser/LLToken.h | 3 +- lib/Bitcode/Reader/BitcodeReader.cpp | 10 ++-- lib/Bitcode/Writer/BitcodeWriter.cpp | 4 +- .../SelectionDAG/SelectionDAGBuild.cpp | 2 +- lib/CodeGen/SelectionDAG/SelectionDAGBuild.h | 4 +- lib/Target/CBackend/CBackend.cpp | 4 +- lib/Target/CppBackend/CPPBackend.cpp | 6 +- lib/VMCore/AsmWriter.cpp | 4 +- lib/VMCore/Instruction.cpp | 2 +- lib/VMCore/Instructions.cpp | 37 ++++++------ test/Feature/terminators.ll | 6 +- 21 files changed, 93 insertions(+), 91 deletions(-) diff --git a/docs/LangRef.html b/docs/LangRef.html index 23558e7f25c..e205dc29492 100644 --- a/docs/LangRef.html +++ b/docs/LangRef.html @@ -111,7 +111,7 @@
  • 'ret' Instruction
  • 'br' Instruction
  • 'switch' Instruction
    • -
  • 'indbr' Instruction
    • +
  • 'indirectbr' Instruction
  • 'invoke' Instruction
  • 'unwind' Instruction
  • 'unreachable' Instruction
    • @@ -2183,13 +2183,13 @@ has undefined behavior.

    the address of the entry block is illegal.

    This value only has defined behavior when used as an operand to the - 'indbr' instruction or for comparisons + 'indirectbr' instruction or for comparisons against null. Pointer equality tests between labels addresses is undefined behavior - though, again, comparison against null is ok, and no label is equal to the null pointer. This may also be passed around as an opaque pointer sized value as long as the bits are not inspected. This allows ptrtoint and arithmetic to be performed on these values so long as - the original value is reconstituted before the indbr.

    + the original value is reconstituted before the indirectbr.

    Finally, some targets may provide defined semantics when using the value as the operand to an inline assembly, but that is target @@ -2541,7 +2541,7 @@ Instructions 'ret' instruction, the 'br' instruction, the 'switch' instruction, the - ''indbr' Instruction, the + ''indirectbr' Instruction, the 'invoke' instruction, the 'unwind' instruction, and the 'unreachable' instruction.

    @@ -2703,19 +2703,19 @@ IfUnequal:
    - 'indbr' Instruction + 'indirectbr' Instruction
    Syntax:
    -  indbr <somety>* <address>, [ label <dest1>, label <dest2>, ... ]
+  indirectbr <somety>* <address>, [ label <dest1>, label <dest2>, ... ]
    Overview:
    -

    The 'indbr' instruction implements an indirect branch to a label +

    The 'indirectbr' instruction implements an indirect branch to a label within the current function, whose address is specified by "address". Address must be derived from a blockaddress constant.

    @@ -2743,7 +2743,7 @@ IfUnequal:
    Example:
    - indbr i8* %Addr, [ label %bb1, label %bb2, label %bb3 ]
+ indirectbr i8* %Addr, [ label %bb1, label %bb2, label %bb3 ]
    diff --git a/include/llvm/Bitcode/LLVMBitCodes.h b/include/llvm/Bitcode/LLVMBitCodes.h index 7cadd5807fa..abe9966aa0a 100644 --- a/include/llvm/Bitcode/LLVMBitCodes.h +++ b/include/llvm/Bitcode/LLVMBitCodes.h @@ -237,7 +237,7 @@ namespace bitc { // new select on i1 or [N x i1] FUNC_CODE_INST_VSELECT = 29, // VSELECT: [ty,opval,opval,predty,pred] FUNC_CODE_INST_INBOUNDS_GEP= 30, // INBOUNDS_GEP: [n x operands] - FUNC_CODE_INST_INDBR = 31 // INDBR: [opty, op0, op1, ...] + FUNC_CODE_INST_INDIRECTBR = 31 // INDIRECTBR: [opty, op0, op1, ...] }; } // End bitc namespace } // End llvm namespace diff --git a/include/llvm/Instruction.def b/include/llvm/Instruction.def index c0adf40316b..205f30313e7 100644 --- a/include/llvm/Instruction.def +++ b/include/llvm/Instruction.def @@ -97,7 +97,7 @@ HANDLE_TERM_INST ( 1, Ret , ReturnInst) HANDLE_TERM_INST ( 2, Br , BranchInst) HANDLE_TERM_INST ( 3, Switch , SwitchInst) -HANDLE_TERM_INST ( 4, IndBr , IndBrInst) +HANDLE_TERM_INST ( 4, IndirectBr , IndirectBrInst) HANDLE_TERM_INST ( 5, Invoke , InvokeInst) HANDLE_TERM_INST ( 6, Unwind , UnwindInst) HANDLE_TERM_INST ( 7, Unreachable, UnreachableInst) diff --git a/include/llvm/Instructions.h b/include/llvm/Instructions.h index ac194337357..28854dfe033 100644 --- a/include/llvm/Instructions.h +++ b/include/llvm/Instructions.h @@ -2220,61 +2220,61 @@ DEFINE_TRANSPARENT_OPERAND_ACCESSORS(SwitchInst, Value) //===----------------------------------------------------------------------===// -// IndBrInst Class +// IndirectBrInst Class //===----------------------------------------------------------------------===// //===--------------------------------------------------------------------------- -/// IndBrInst - Indirect Branch Instruction. +/// IndirectBrInst - Indirect Branch Instruction. /// -class IndBrInst : public TerminatorInst { +class IndirectBrInst : public TerminatorInst { void *operator new(size_t, unsigned); // DO NOT IMPLEMENT unsigned ReservedSpace; // Operand[0] = Value to switch on // Operand[1] = Default basic block destination // Operand[2n ] = Value to match // Operand[2n+1] = BasicBlock to go to on match - IndBrInst(const IndBrInst &IBI); + IndirectBrInst(const IndirectBrInst &IBI); void init(Value *Address, unsigned NumDests); void resizeOperands(unsigned No); // allocate space for exactly zero operands void *operator new(size_t s) { return User::operator new(s, 0); } - /// IndBrInst ctor - Create a new indbr instruction, specifying an Address to - /// jump to. The number of expected destinations can be specified here to - /// make memory allocation more efficient. This constructor can also + /// IndirectBrInst ctor - Create a new indirectbr instruction, specifying an + /// Address to jump to. The number of expected destinations can be specified + /// here to make memory allocation more efficient. This constructor can also /// autoinsert before another instruction. - IndBrInst(Value *Address, unsigned NumDests, Instruction *InsertBefore); + IndirectBrInst(Value *Address, unsigned NumDests, Instruction *InsertBefore); - /// IndBrInst ctor - Create a new indbr instruction, specifying an Address to - /// jump to. The number of expected destinations can be specified here to - /// make memory allocation more efficient. This constructor also autoinserts - /// at the end of the specified BasicBlock. - IndBrInst(Value *Address, unsigned NumDests, BasicBlock *InsertAtEnd); + /// IndirectBrInst ctor - Create a new indirectbr instruction, specifying an + /// Address to jump to. The number of expected destinations can be specified + /// here to make memory allocation more efficient. This constructor also + /// autoinserts at the end of the specified BasicBlock. + IndirectBrInst(Value *Address, unsigned NumDests, BasicBlock *InsertAtEnd); protected: - virtual IndBrInst *clone_impl() const; + virtual IndirectBrInst *clone_impl() const; public: - static IndBrInst *Create(Value *Address, unsigned NumDests, - Instruction *InsertBefore = 0) { - return new IndBrInst(Address, NumDests, InsertBefore); + static IndirectBrInst *Create(Value *Address, unsigned NumDests, + Instruction *InsertBefore = 0) { + return new IndirectBrInst(Address, NumDests, InsertBefore); } - static IndBrInst *Create(Value *Address, unsigned NumDests, - BasicBlock *InsertAtEnd) { - return new IndBrInst(Address, NumDests, InsertAtEnd); + static IndirectBrInst *Create(Value *Address, unsigned NumDests, + BasicBlock *InsertAtEnd) { + return new IndirectBrInst(Address, NumDests, InsertAtEnd); } - ~IndBrInst(); + ~IndirectBrInst(); /// Provide fast operand accessors. DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); - // Accessor Methods for IndBr instruction. + // Accessor Methods for IndirectBrInst instruction. Value *getAddress() { return getOperand(0); } const Value *getAddress() const { return getOperand(0); } void setAddress(Value *V) { setOperand(0, V); } /// getNumDestinations - return the number of possible destinations in this - /// indbr instruction. + /// indirectbr instruction. unsigned getNumDestinations() const { return getNumOperands()-1; } /// getDestination - Return the specified destination. @@ -2286,7 +2286,7 @@ public: void addDestination(BasicBlock *Dest); /// removeDestination - This method removes the specified successor from the - /// indbr instruction. + /// indirectbr instruction. void removeDestination(unsigned i); unsigned getNumSuccessors() const { return getNumOperands()-1; } @@ -2298,9 +2298,9 @@ public: } // Methods for support type inquiry through isa, cast, and dyn_cast: - static inline bool classof(const IndBrInst *) { return true; } + static inline bool classof(const IndirectBrInst *) { return true; } static inline bool classof(const Instruction *I) { - return I->getOpcode() == Instruction::IndBr; + return I->getOpcode() == Instruction::IndirectBr; } static inline bool classof(const Value *V) { return isa(V) && classof(cast(V)); @@ -2312,10 +2312,10 @@ private: }; template <> -struct OperandTraits : public HungoffOperandTraits<1> { +struct OperandTraits : public HungoffOperandTraits<1> { }; -DEFINE_TRANSPARENT_OPERAND_ACCESSORS(IndBrInst, Value) +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(IndirectBrInst, Value) //===----------------------------------------------------------------------===// diff --git a/include/llvm/Support/InstVisitor.h b/include/llvm/Support/InstVisitor.h index ce9788483a5..b2e5d58b7c3 100644 --- a/include/llvm/Support/InstVisitor.h +++ b/include/llvm/Support/InstVisitor.h @@ -160,7 +160,7 @@ public: RetTy visitReturnInst(ReturnInst &I) { DELEGATE(TerminatorInst);} RetTy visitBranchInst(BranchInst &I) { DELEGATE(TerminatorInst);} RetTy visitSwitchInst(SwitchInst &I) { DELEGATE(TerminatorInst);} - RetTy visitIndBrInst(IndBrInst &I) { DELEGATE(TerminatorInst);} + RetTy visitIndirectBrInst(IndirectBrInst &I) { DELEGATE(TerminatorInst);} RetTy visitInvokeInst(InvokeInst &I) { DELEGATE(TerminatorInst);} RetTy visitUnwindInst(UnwindInst &I) { DELEGATE(TerminatorInst);} RetTy visitUnreachableInst(UnreachableInst &I) { DELEGATE(TerminatorInst);} diff --git a/lib/Analysis/InlineCost.cpp b/lib/Analysis/InlineCost.cpp index 559f468bd64..ee8370ec9ca 100644 --- a/lib/Analysis/InlineCost.cpp +++ b/lib/Analysis/InlineCost.cpp @@ -31,7 +31,7 @@ unsigned InlineCostAnalyzer::FunctionInfo:: // Eliminating a switch is a big win, proportional to the number of edges // deleted. Reduction += (SI->getNumSuccessors()-1) * 40; - else if (isa(*UI)) + else if (isa(*UI)) // Eliminating an indirect branch is a big win. Reduction += 200; else if (CallInst *CI = dyn_cast(*UI)) { diff --git a/lib/Analysis/SparsePropagation.cpp b/lib/Analysis/SparsePropagation.cpp index a10e7cb14a4..d7bcac2b1e2 100644 --- a/lib/Analysis/SparsePropagation.cpp +++ b/lib/Analysis/SparsePropagation.cpp @@ -166,7 +166,7 @@ void SparseSolver::getFeasibleSuccessors(TerminatorInst &TI, return; } - if (isa(TI)) { + if (isa(TI)) { Succs.assign(Succs.size(), true); return; } diff --git a/lib/AsmParser/LLLexer.cpp b/lib/AsmParser/LLLexer.cpp index 1003907974d..f95110e57c6 100644 --- a/lib/AsmParser/LLLexer.cpp +++ b/lib/AsmParser/LLLexer.cpp @@ -645,7 +645,7 @@ lltok::Kind LLLexer::LexIdentifier() { INSTKEYWORD(ret, Ret); INSTKEYWORD(br, Br); INSTKEYWORD(switch, Switch); - INSTKEYWORD(indbr, IndBr); + INSTKEYWORD(indirectbr, IndirectBr); INSTKEYWORD(invoke, Invoke); INSTKEYWORD(unwind, Unwind); INSTKEYWORD(unreachable, Unreachable); diff --git a/lib/AsmParser/LLParser.cpp b/lib/AsmParser/LLParser.cpp index cf16e42b6a8..aba02648e89 100644 --- a/lib/AsmParser/LLParser.cpp +++ b/lib/AsmParser/LLParser.cpp @@ -2731,7 +2731,7 @@ bool LLParser::ParseInstruction(Instruction *&Inst, BasicBlock *BB, case lltok::kw_ret: return ParseRet(Inst, BB, PFS); case lltok::kw_br: return ParseBr(Inst, PFS); case lltok::kw_switch: return ParseSwitch(Inst, PFS); - case lltok::kw_indbr: return ParseIndBr(Inst, PFS); + case lltok::kw_indirectbr: return ParseIndirectBr(Inst, PFS); case lltok::kw_invoke: return ParseInvoke(Inst, PFS); // Binary Operators. case lltok::kw_add: @@ -3004,19 +3004,19 @@ bool LLParser::ParseSwitch(Instruction *&Inst, PerFunctionState &PFS) { return false; } -/// ParseIndBr +/// ParseIndirectBr /// Instruction -/// ::= 'indbr' TypeAndValue ',' '[' LabelList ']' -bool LLParser::ParseIndBr(Instruction *&Inst, PerFunctionState &PFS) { +/// ::= 'indirectbr' TypeAndValue ',' '[' LabelList ']' +bool LLParser::ParseIndirectBr(Instruction *&Inst, PerFunctionState &PFS) { LocTy AddrLoc; Value *Address; if (ParseTypeAndValue(Address, AddrLoc, PFS) || - ParseToken(lltok::comma, "expected ',' after indbr address") || - ParseToken(lltok::lsquare, "expected '[' with indbr")) + ParseToken(lltok::comma, "expected ',' after indirectbr address") || + ParseToken(lltok::lsquare, "expected '[' with indirectbr")) return true; if (!isa(Address->getType())) - return Error(AddrLoc, "indbr address must have pointer type"); + return Error(AddrLoc, "indirectbr address must have pointer type"); // Parse the destination list. SmallVector DestList; @@ -3037,7 +3037,7 @@ bool LLParser::ParseIndBr(Instruction *&Inst, PerFunctionState &PFS) { if (ParseToken(lltok::rsquare, "expected ']' at end of block list")) return true; - IndBrInst *IBI = IndBrInst::Create(Address, DestList.size()); + IndirectBrInst *IBI = IndirectBrInst::Create(Address, DestList.size()); for (unsigned i = 0, e = DestList.size(); i != e; ++i) IBI->addDestination(DestList[i]); Inst = IBI; diff --git a/lib/AsmParser/LLParser.h b/lib/AsmParser/LLParser.h index 37473a0a19b..ca2e2b695f8 100644 --- a/lib/AsmParser/LLParser.h +++ b/lib/AsmParser/LLParser.h @@ -270,7 +270,7 @@ namespace llvm { bool ParseRet(Instruction *&Inst, BasicBlock *BB, PerFunctionState &PFS); bool ParseBr(Instruction *&Inst, PerFunctionState &PFS); bool ParseSwitch(Instruction *&Inst, PerFunctionState &PFS); - bool ParseIndBr(Instruction *&Inst, PerFunctionState &PFS); + bool ParseIndirectBr(Instruction *&Inst, PerFunctionState &PFS); bool ParseInvoke(Instruction *&Inst, PerFunctionState &PFS); bool ParseArithmetic(Instruction *&I, PerFunctionState &PFS, unsigned Opc, diff --git a/lib/AsmParser/LLToken.h b/lib/AsmParser/LLToken.h index a25b6f08c0d..d6efaf4d448 100644 --- a/lib/AsmParser/LLToken.h +++ b/lib/AsmParser/LLToken.h @@ -111,7 +111,8 @@ namespace lltok { kw_fptoui, kw_fptosi, kw_inttoptr, kw_ptrtoint, kw_bitcast, kw_select, kw_va_arg, - kw_ret, kw_br, kw_switch, kw_indbr, kw_invoke, kw_unwind, kw_unreachable, + kw_ret, kw_br, kw_switch, kw_indirectbr, kw_invoke, kw_unwind, + kw_unreachable, kw_malloc, kw_alloca, kw_free, kw_load, kw_store, kw_getelementptr, diff --git a/lib/Bitcode/Reader/BitcodeReader.cpp b/lib/Bitcode/Reader/BitcodeReader.cpp index 41803c0eb45..1326b68ac59 100644 --- a/lib/Bitcode/Reader/BitcodeReader.cpp +++ b/lib/Bitcode/Reader/BitcodeReader.cpp @@ -1975,22 +1975,22 @@ bool BitcodeReader::ParseFunctionBody(Function *F) { I = SI; break; } - case bitc::FUNC_CODE_INST_INDBR: { // INDBR: [opty, op0, op1, ...] + case bitc::FUNC_CODE_INST_INDIRECTBR: { // INDIRECTBR: [opty, op0, op1, ...] if (Record.size() < 2) - return Error("Invalid INDBR record"); + return Error("Invalid INDIRECTBR record"); const Type *OpTy = getTypeByID(Record[0]); Value *Address = getFnValueByID(Record[1], OpTy); if (OpTy == 0 || Address == 0) - return Error("Invalid INDBR record"); + return Error("Invalid INDIRECTBR record"); unsigned NumDests = Record.size()-2; - IndBrInst *IBI = IndBrInst::Create(Address, NumDests); + IndirectBrInst *IBI = IndirectBrInst::Create(Address, NumDests); InstructionList.push_back(IBI); for (unsigned i = 0, e = NumDests; i != e; ++i) { if (BasicBlock *DestBB = getBasicBlock(Record[2+i])) { IBI->addDestination(DestBB); } else { delete IBI; - return Error("Invalid INDBR record!"); + return Error("Invalid INDIRECTBR record!"); } } I = IBI; diff --git a/lib/Bitcode/Writer/BitcodeWriter.cpp b/lib/Bitcode/Writer/BitcodeWriter.cpp index c0f97c19687..692c289b833 100644 --- a/lib/Bitcode/Writer/BitcodeWriter.cpp +++ b/lib/Bitcode/Writer/BitcodeWriter.cpp @@ -1015,8 +1015,8 @@ static void WriteInstruction(const Instruction &I, unsigned InstID, for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) Vals.push_back(VE.getValueID(I.getOperand(i))); break; - case Instruction::IndBr: - Code = bitc::FUNC_CODE_INST_INDBR; + case Instruction::IndirectBr: + Code = bitc::FUNC_CODE_INST_INDIRECTBR; Vals.push_back(VE.getTypeID(I.getOperand(0)->getType())); for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) Vals.push_back(VE.getValueID(I.getOperand(i))); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp index fe95c757e62..f86e584e999 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp @@ -2131,7 +2131,7 @@ void SelectionDAGLowering::visitSwitch(SwitchInst &SI) { } } -void SelectionDAGLowering::visitIndBr(IndBrInst &I) { +void SelectionDAGLowering::visitIndirectBr(IndirectBrInst &I) { // Update machine-CFG edges. for (unsigned i = 0, e = I.getNumSuccessors(); i != e; ++i) CurMBB->addSuccessor(FuncInfo.MBBMap[I.getSuccessor(i)]); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h index 9aca707ecfc..a0ec7aabd8a 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h @@ -49,7 +49,7 @@ class GetElementPtrInst; class GCFunctionInfo; class ICmpInst; class IntToPtrInst; -class IndBrInst; +class IndirectBrInst; class InvokeInst; class InsertElementInst; class InsertValueInst; @@ -449,7 +449,7 @@ private: void visitRet(ReturnInst &I); void visitBr(BranchInst &I); void visitSwitch(SwitchInst &I); - void visitIndBr(IndBrInst &I); + void visitIndirectBr(IndirectBrInst &I); void visitUnreachable(UnreachableInst &I) { /* noop */ } // Helpers for visitSwitch diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp index dae830dee16..9e4fe278c30 100644 --- a/lib/Target/CBackend/CBackend.cpp +++ b/lib/Target/CBackend/CBackend.cpp @@ -282,7 +282,7 @@ namespace { void visitReturnInst(ReturnInst &I); void visitBranchInst(BranchInst &I); void visitSwitchInst(SwitchInst &I); - void visitIndBrInst(IndBrInst &I); + void visitIndirectBrInst(IndirectBrInst &I); void visitInvokeInst(InvokeInst &I) { llvm_unreachable("Lowerinvoke pass didn't work!"); } @@ -2579,7 +2579,7 @@ void CWriter::visitSwitchInst(SwitchInst &SI) { Out << " }\n"; } -void CWriter::visitIndBrInst(IndBrInst &IBI) { +void CWriter::visitIndirectBrInst(IndirectBrInst &IBI) { Out << " goto *(void*)("; writeOperand(IBI.getOperand(0)); Out << ");\n"; diff --git a/lib/Target/CppBackend/CPPBackend.cpp b/lib/Target/CppBackend/CPPBackend.cpp index 171c6429dc9..4bae6c7111f 100644 --- a/lib/Target/CppBackend/CPPBackend.cpp +++ b/lib/Target/CppBackend/CPPBackend.cpp @@ -1132,9 +1132,9 @@ namespace { } break; } - case Instruction::IndBr: { - const IndBrInst *IBI = cast(I); - Out << "IndBrInst *" << iName << " = IndBrInst::Create(" + case Instruction::IndirectBr: { + const IndirectBrInst *IBI = cast(I); + Out << "IndirectBrInst *" << iName << " = IndirectBrInst::Create(" << opNames[0] << ", " << IBI->getNumDestinations() << ");"; nl(Out); for (unsigned i = 1; i != IBI->getNumOperands(); ++i) { diff --git a/lib/VMCore/AsmWriter.cpp b/lib/VMCore/AsmWriter.cpp index 5a92432062e..296cc25617e 100644 --- a/lib/VMCore/AsmWriter.cpp +++ b/lib/VMCore/AsmWriter.cpp @@ -1846,8 +1846,8 @@ void AssemblyWriter::printInstruction(const Instruction &I) { writeOperand(I.getOperand(op+1), true); } Out << "\n ]"; - } else if (isa(I)) { - // Special case indbr instruction to get formatting nice and correct. + } else if (isa(I)) { + // Special case indirectbr instruction to get formatting nice and correct. Out << ' '; writeOperand(Operand, true); Out << ", "; diff --git a/lib/VMCore/Instruction.cpp b/lib/VMCore/Instruction.cpp index c48e75c4453..879c073dffd 100644 --- a/lib/VMCore/Instruction.cpp +++ b/lib/VMCore/Instruction.cpp @@ -103,7 +103,7 @@ const char *Instruction::getOpcodeName(unsigned OpCode) { case Ret: return "ret"; case Br: return "br"; case Switch: return "switch"; - case IndBr: return "indbr"; + case IndirectBr: return "indirectbr"; case Invoke: return "invoke"; case Unwind: return "unwind"; case Unreachable: return "unreachable"; diff --git a/lib/VMCore/Instructions.cpp b/lib/VMCore/Instructions.cpp index 5a6d3764d5e..1e63436883c 100644 --- a/lib/VMCore/Instructions.cpp +++ b/lib/VMCore/Instructions.cpp @@ -3090,7 +3090,7 @@ void SwitchInst::setSuccessorV(unsigned idx, BasicBlock *B) { // SwitchInst Implementation //===----------------------------------------------------------------------===// -void IndBrInst::init(Value *Address, unsigned NumDests) { +void IndirectBrInst::init(Value *Address, unsigned NumDests) { assert(Address); ReservedSpace = 1+NumDests; NumOperands = 1; @@ -3107,7 +3107,7 @@ void IndBrInst::init(Value *Address, unsigned NumDests) { /// 2. If NumOps > NumOperands, reserve space for NumOps operands. /// 3. If NumOps == NumOperands, trim the reserved space. /// -void IndBrInst::resizeOperands(unsigned NumOps) { +void IndirectBrInst::resizeOperands(unsigned NumOps) { unsigned e = getNumOperands(); if (NumOps == 0) { NumOps = e*2; @@ -3129,21 +3129,22 @@ void IndBrInst::resizeOperands(unsigned NumOps) { if (OldOps) Use::zap(OldOps, OldOps + e, true); } -IndBrInst::IndBrInst(Value *Address, unsigned NumCases, - Instruction *InsertBefore) -: TerminatorInst(Type::getVoidTy(Address->getContext()), Instruction::IndBr, +IndirectBrInst::IndirectBrInst(Value *Address, unsigned NumCases, + Instruction *InsertBefore) +: TerminatorInst(Type::getVoidTy(Address->getContext()),Instruction::IndirectBr, 0, 0, InsertBefore) { init(Address, NumCases); } -IndBrInst::IndBrInst(Value *Address, unsigned NumCases, BasicBlock *InsertAtEnd) -: TerminatorInst(Type::getVoidTy(Address->getContext()), Instruction::IndBr, +IndirectBrInst::IndirectBrInst(Value *Address, unsigned NumCases, + BasicBlock *InsertAtEnd) +: TerminatorInst(Type::getVoidTy(Address->getContext()),Instruction::IndirectBr, 0, 0, InsertAtEnd) { init(Address, NumCases); } -IndBrInst::IndBrInst(const IndBrInst &IBI) - : TerminatorInst(Type::getVoidTy(IBI.getContext()), Instruction::IndBr, +IndirectBrInst::IndirectBrInst(const IndirectBrInst &IBI) + : TerminatorInst(Type::getVoidTy(IBI.getContext()), Instruction::IndirectBr, allocHungoffUses(IBI.getNumOperands()), IBI.getNumOperands()) { Use *OL = OperandList, *InOL = IBI.OperandList; @@ -3152,13 +3153,13 @@ IndBrInst::IndBrInst(const IndBrInst &IBI) SubclassOptionalData = IBI.SubclassOptionalData; } -IndBrInst::~IndBrInst() { +IndirectBrInst::~IndirectBrInst() { dropHungoffUses(OperandList); } /// addDestination - Add a destination. /// -void IndBrInst::addDestination(BasicBlock *DestBB) { +void IndirectBrInst::addDestination(BasicBlock *DestBB) { unsigned OpNo = NumOperands; if (OpNo+1 > ReservedSpace) resizeOperands(0); // Get more space! @@ -3169,8 +3170,8 @@ void IndBrInst::addDestination(BasicBlock *DestBB) { } /// removeDestination - This method removes the specified successor from the -/// indbr instruction. -void IndBrInst::removeDestination(unsigned idx) { +/// indirectbr instruction. +void IndirectBrInst::removeDestination(unsigned idx) { assert(idx < getNumOperands()-1 && "Successor index out of range!"); unsigned NumOps = getNumOperands(); @@ -3184,13 +3185,13 @@ void IndBrInst::removeDestination(unsigned idx) { NumOperands = NumOps-1; } -BasicBlock *IndBrInst::getSuccessorV(unsigned idx) const { +BasicBlock *IndirectBrInst::getSuccessorV(unsigned idx) const { return getSuccessor(idx); } -unsigned IndBrInst::getNumSuccessorsV() const { +unsigned IndirectBrInst::getNumSuccessorsV() const { return getNumSuccessors(); } -void IndBrInst::setSuccessorV(unsigned idx, BasicBlock *B) { +void IndirectBrInst::setSuccessorV(unsigned idx, BasicBlock *B) { setSuccessor(idx, B); } @@ -3335,8 +3336,8 @@ SwitchInst *SwitchInst::clone_impl() const { return new SwitchInst(*this); } -IndBrInst *IndBrInst::clone_impl() const { - return new IndBrInst(*this); +IndirectBrInst *IndirectBrInst::clone_impl() const { + return new IndirectBrInst(*this); } diff --git a/test/Feature/terminators.ll b/test/Feature/terminators.ll index d1b97108d2b..d3c68a71429 100644 --- a/test/Feature/terminators.ll +++ b/test/Feature/terminators.ll @@ -27,11 +27,11 @@ Case4: ; preds = %0 define i32 @indbrtest(i8* %P, i32* %Q) { - indbr i8* %P, [label %BB1, label %BB2, label %BB3] + indirectbr i8* %P, [label %BB1, label %BB2, label %BB3] BB1: - indbr i32* %Q, [] + indirectbr i32* %Q, [] BB2: - indbr i32* %Q, [label %BB1, label %BB2] + indirectbr i32* %Q, [label %BB1, label %BB2] BB3: ret i32 2 } -- 2.34.1