From a8e47b3319db56675f8e80f4bb015c163110b902 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Thu, 16 Sep 2010 03:45:21 +0000 Subject: [PATCH] store MC FP immediates as a double instead of as an APFloat, thus avoiding an unnecessary dtor for MCOperand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114064 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/MC/MCInst.h | 11 ++++------- lib/Target/ARM/ARMMCInstLower.cpp | 3 ++- lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp | 4 ++-- lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp | 5 ++++- 4 files changed, 12 insertions(+), 11 deletions(-) diff --git a/include/llvm/MC/MCInst.h b/include/llvm/MC/MCInst.h index f008b2036c6..2966f0dea6b 100644 --- a/include/llvm/MC/MCInst.h +++ b/include/llvm/MC/MCInst.h @@ -16,7 +16,6 @@ #ifndef LLVM_MC_MCINST_H #define LLVM_MC_MCINST_H -#include "llvm/ADT/APFloat.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringRef.h" #include "llvm/System/DataTypes.h" @@ -42,11 +41,9 @@ class MCOperand { union { unsigned RegVal; int64_t ImmVal; + double FPImmVal; const MCExpr *ExprVal; }; - // This can't go in the union due to the non-trivial copy constructor - // of APFloat. It's still only valid for Kind == kFPImmediate, though. - APFloat FPImmVal; public: MCOperand() : Kind(kInvalid), FPImmVal(0.0) {} @@ -78,12 +75,12 @@ public: ImmVal = Val; } - const APFloat &getFPImm() const { + const double &getFPImm() const { assert(isFPImm() && "This is not an FP immediate"); return FPImmVal; } - void setFPImm(const APFloat &Val) { + void setFPImm(double Val) { assert(isFPImm() && "This is not an FP immediate"); FPImmVal = Val; } @@ -109,7 +106,7 @@ public: Op.ImmVal = Val; return Op; } - static MCOperand CreateFPImm(const APFloat &Val) { + static MCOperand CreateFPImm(double Val) { MCOperand Op; Op.Kind = kFPImmediate; Op.FPImmVal = Val; diff --git a/lib/Target/ARM/ARMMCInstLower.cpp b/lib/Target/ARM/ARMMCInstLower.cpp index b26d327e363..8774010d89d 100644 --- a/lib/Target/ARM/ARMMCInstLower.cpp +++ b/lib/Target/ARM/ARMMCInstLower.cpp @@ -157,7 +157,8 @@ void ARMMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const { MO.getBlockAddress())); break; case MachineOperand::MO_FPImmediate: - MCOp = MCOperand::CreateFPImm(MO.getFPImm()->getValueAPF()); + MCOp = + MCOperand::CreateFPImm(MO.getFPImm()->getValueAPF().convertToDouble()); break; } diff --git a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp index b66c857dc14..f2ba2d0617c 100644 --- a/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp @@ -747,12 +747,12 @@ void ARMInstPrinter::printT2AddrModeSoRegOperand(const MCInst *MI, void ARMInstPrinter::printVFPf32ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { - O << '#' << MI->getOperand(OpNum).getFPImm().convertToFloat(); + O << '#' << (float)MI->getOperand(OpNum).getFPImm(); } void ARMInstPrinter::printVFPf64ImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { - O << '#' << MI->getOperand(OpNum).getFPImm().convertToDouble(); + O << '#' << MI->getOperand(OpNum).getFPImm(); } void ARMInstPrinter::printNEONModImmOperand(const MCInst *MI, unsigned OpNum, diff --git a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp index 4dc16bb72f4..971d64279e6 100644 --- a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp +++ b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp @@ -1973,7 +1973,10 @@ static bool DisassembleVFPMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn, // The asm syntax specifies the floating point value, not the 8-bit literal. APInt immRaw = VFPExpandImm(slice(insn,19,16) << 4 | slice(insn, 3, 0), Opcode == ARM::FCONSTD ? 64 : 32); - MI.addOperand(MCOperand::CreateFPImm(APFloat(immRaw, true))); + APFloat immFP = APFloat(immRaw, true); + double imm = Opcode == ARM::FCONSTD ? immFP.convertToDouble() : + immFP.convertToFloat(); + MI.addOperand(MCOperand::CreateFPImm(imm)); ++OpIdx; } -- 2.34.1