From a1fa640525203a4f87879311f63910b70ce836a5 Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Fri, 18 Jul 2014 00:08:50 +0000 Subject: [PATCH] Avoid resetting the UseSoftFloat and FloatABIType on the TargetMachine Options struct and move the comment to inMips16HardFloat. Use the fact that we now know whether or not we cared about soft float to set the libcalls. Accordingly rename mipsSEUsesSoftFloat to abiUsesSoftFloat and propagate since it's no longer CPU specific. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213335 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 2 +- lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.h | 2 +- lib/Target/Mips/Mips16ISelLowering.cpp | 2 +- lib/Target/Mips/MipsISelLowering.cpp | 8 ++++---- lib/Target/Mips/MipsSEISelLowering.cpp | 2 +- lib/Target/Mips/MipsSubtarget.cpp | 11 ++--------- lib/Target/Mips/MipsSubtarget.h | 6 +++++- 7 files changed, 15 insertions(+), 18 deletions(-) diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 2bedb5960ff..53b30f9210b 100644 --- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -292,7 +292,7 @@ public: return STI.getFeatureBits() & Mips::FeatureMips16; } // TODO: see how can we get this info. - bool mipsSEUsesSoftFloat() const { return false; } + bool abiUsesSoftFloat() const { return false; } /// Warn if RegNo is the current assembler temporary. void WarnIfAssemblerTemporary(int RegNo, SMLoc Loc); diff --git a/lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.h b/lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.h index e56efd04ac1..ea5bc12b074 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.h +++ b/lib/Target/Mips/MCTargetDesc/MipsABIFlagsSection.h @@ -181,7 +181,7 @@ public: template void setCPR1SizeFromPredicates(const PredicateLibrary &P) { - if (P.mipsSEUsesSoftFloat()) + if (P.abiUsesSoftFloat()) CPR1Size = AFL_REG_NONE; else if (P.hasMSA()) CPR1Size = AFL_REG_128; diff --git a/lib/Target/Mips/Mips16ISelLowering.cpp b/lib/Target/Mips/Mips16ISelLowering.cpp index 81a05df1a70..118612ae569 100644 --- a/lib/Target/Mips/Mips16ISelLowering.cpp +++ b/lib/Target/Mips/Mips16ISelLowering.cpp @@ -124,7 +124,7 @@ Mips16TargetLowering::Mips16TargetLowering(MipsTargetMachine &TM) // Set up the register classes addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass); - if (Subtarget->inMips16HardFloat()) + if (!TM.Options.UseSoftFloat) setMips16HardFloatLibCalls(); setOperationAction(ISD::ATOMIC_FENCE, MVT::Other, Expand); diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index b7af2d4aaf4..179e30a8151 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -2414,7 +2414,7 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, CCInfo, SpecialCallingConv); MipsCCInfo.analyzeCallOperands(Outs, IsVarArg, - Subtarget->mipsSEUsesSoftFloat(), + Subtarget->abiUsesSoftFloat(), Callee.getNode(), CLI.getArgs()); // Get a count of how many bytes are to be pushed on the stack. @@ -2615,7 +2615,7 @@ MipsTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, MipsCC MipsCCInfo(CallConv, Subtarget->isABI_O32(), Subtarget->isFP64bit(), CCInfo); - MipsCCInfo.analyzeCallResult(Ins, Subtarget->mipsSEUsesSoftFloat(), + MipsCCInfo.analyzeCallResult(Ins, Subtarget->abiUsesSoftFloat(), CallNode, RetTy); // Copy all of the result registers out of their specified physreg. @@ -2664,7 +2664,7 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain, CCInfo); Function::const_arg_iterator FuncArg = DAG.getMachineFunction().getFunction()->arg_begin(); - bool UseSoftFloat = Subtarget->mipsSEUsesSoftFloat(); + bool UseSoftFloat = Subtarget->abiUsesSoftFloat(); MipsCCInfo.analyzeFormalArguments(Ins, UseSoftFloat, FuncArg); MipsFI->setFormalArgInfo(CCInfo.getNextStackOffset(), @@ -2817,7 +2817,7 @@ MipsTargetLowering::LowerReturn(SDValue Chain, CCInfo); // Analyze return values. - MipsCCInfo.analyzeReturn(Outs, Subtarget->mipsSEUsesSoftFloat(), + MipsCCInfo.analyzeReturn(Outs, Subtarget->abiUsesSoftFloat(), MF.getFunction()->getReturnType()); SDValue Flag; diff --git a/lib/Target/Mips/MipsSEISelLowering.cpp b/lib/Target/Mips/MipsSEISelLowering.cpp index be4ca862540..45628afef28 100644 --- a/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/lib/Target/Mips/MipsSEISelLowering.cpp @@ -101,7 +101,7 @@ MipsSETargetLowering::MipsSETargetLowering(MipsTargetMachine &TM) setTargetDAGCombine(ISD::XOR); } - if (!Subtarget->mipsSEUsesSoftFloat()) { + if (!Subtarget->abiUsesSoftFloat()) { addRegisterClass(MVT::f32, &Mips::FGR32RegClass); // When dealing with single precision only, use libcalls diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp index d63b712f83d..2cb97ae7f72 100644 --- a/lib/Target/Mips/MipsSubtarget.cpp +++ b/lib/Target/Mips/MipsSubtarget.cpp @@ -200,15 +200,8 @@ MipsSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS, // Initialize scheduling itinerary for the specified CPU. InstrItins = getInstrItineraryForCPU(CPUName); - if (InMips16Mode && !TM->Options.UseSoftFloat) { - // Hard float for mips16 means essentially to compile as soft float - // but to use a runtime library for soft float that is written with - // native mips32 floating point instructions (those runtime routines - // run in mips32 hard float mode). - TM->Options.UseSoftFloat = true; - TM->Options.FloatABIType = FloatABI::Soft; + if (InMips16Mode && !TM->Options.UseSoftFloat) InMips16HardFloat = true; - } return *this; } @@ -293,7 +286,7 @@ void MipsSubtarget::setHelperClassesMipsSE() { assert(FrameLowering && "null frame lowering SE"); } -bool MipsSubtarget::mipsSEUsesSoftFloat() const { +bool MipsSubtarget::abiUsesSoftFloat() const { return TM->Options.UseSoftFloat && !InMips16HardFloat; } diff --git a/lib/Target/Mips/MipsSubtarget.h b/lib/Target/Mips/MipsSubtarget.h index 944e629898b..7810e0ee7fa 100644 --- a/lib/Target/Mips/MipsSubtarget.h +++ b/lib/Target/Mips/MipsSubtarget.h @@ -234,6 +234,10 @@ public: bool inMips16ModeDefault() const { return InMips16Mode; } + // Hard float for mips16 means essentially to compile as soft float + // but to use a runtime library for soft float that is written with + // native mips32 floating point instructions (those runtime routines + // run in mips32 hard float mode). bool inMips16HardFloat() const { return inMips16Mode() && InMips16HardFloat; } @@ -246,7 +250,7 @@ public: bool hasStandardEncoding() const { return !inMips16Mode(); } - bool mipsSEUsesSoftFloat() const; + bool abiUsesSoftFloat() const; bool enableLongBranchPass() const { return hasStandardEncoding() || allowMixed16_32(); -- 2.34.1