From 9f16772a3deb4146a22c1949b50693442717b13e Mon Sep 17 00:00:00 2001
From: JF Bastien <jfb@google.com>
Date: Tue, 20 Oct 2015 00:37:42 +0000
Subject: [PATCH] WebAssembly: fix syntax for br_if.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250777 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/WebAssembly/WebAssemblyISD.def     |  2 +-
 .../WebAssembly/WebAssemblyInstrControl.td    |  4 +--
 .../WebAssembly/WebAssemblyInstrInfo.cpp      |  4 +--
 test/CodeGen/WebAssembly/cfg-stackify.ll      | 26 +++++++++----------
 4 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/lib/Target/WebAssembly/WebAssemblyISD.def b/lib/Target/WebAssembly/WebAssemblyISD.def
index 403c6154dcd..36b6d9c68c8 100644
--- a/lib/Target/WebAssembly/WebAssemblyISD.def
+++ b/lib/Target/WebAssembly/WebAssemblyISD.def
@@ -19,7 +19,7 @@ HANDLE_NODETYPE(CALL0)
 HANDLE_NODETYPE(RETURN)
 HANDLE_NODETYPE(ARGUMENT)
 HANDLE_NODETYPE(Wrapper)
-HANDLE_NODETYPE(BRIF)
+HANDLE_NODETYPE(BR_IF_)
 HANDLE_NODETYPE(SWITCH)
 
 // add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here...
diff --git a/lib/Target/WebAssembly/WebAssemblyInstrControl.td b/lib/Target/WebAssembly/WebAssemblyInstrControl.td
index 4fa567c98d7..bfce22d0a93 100644
--- a/lib/Target/WebAssembly/WebAssemblyInstrControl.td
+++ b/lib/Target/WebAssembly/WebAssemblyInstrControl.td
@@ -26,8 +26,8 @@
  */
 
 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
-def BRIF : I<(outs), (ins bb_op:$dst, I32:$a),
-             [(brcond I32:$a, bb:$dst)]>;
+def BR_IF_ : I<(outs), (ins bb_op:$dst, I32:$a),
+               [(brcond I32:$a, bb:$dst)]>;
 let isBarrier = 1 in {
 def BR   : I<(outs), (ins bb_op:$dst),
              [(br bb:$dst)]>;
diff --git a/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp b/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
index 19a65dc2a2f..a18357da19e 100644
--- a/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
+++ b/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
@@ -51,7 +51,7 @@ bool WebAssemblyInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
     default:
       // Unhandled instruction; bail out.
       return true;
-    case WebAssembly::BRIF:
+    case WebAssembly::BR_IF_:
       if (HaveCond)
         return true;
       Cond.push_back(MI.getOperand(1));
@@ -104,7 +104,7 @@ unsigned WebAssemblyInstrInfo::InsertBranch(
     return 1;
   }
 
-  BuildMI(&MBB, DL, get(WebAssembly::BRIF))
+  BuildMI(&MBB, DL, get(WebAssembly::BR_IF_))
       .addMBB(TBB)
       .addOperand(Cond[0]);
   if (!FBB)
diff --git a/test/CodeGen/WebAssembly/cfg-stackify.ll b/test/CodeGen/WebAssembly/cfg-stackify.ll
index e74f2b8cf13..0e27b7ee929 100644
--- a/test/CodeGen/WebAssembly/cfg-stackify.ll
+++ b/test/CodeGen/WebAssembly/cfg-stackify.ll
@@ -12,7 +12,7 @@ declare void @something()
 ; CHECK-LABEL: test0:
 ; CHECK: loop
 ; CHECK: add
-; CHECK: brif
+; CHECK: br_if
 ; CHECK: call
 ; CHECK: br $BB0_1{{$}}
 ; CHECK: return{{$}}
@@ -40,7 +40,7 @@ back:
 ; CHECK-LABEL: test1:
 ; CHECK: loop
 ; CHECK: add
-; CHECK: brif
+; CHECK: br_if
 ; CHECK: call
 ; CHECK: br $BB1_1{{$}}
 ; CHECK: return{{$}}
@@ -67,9 +67,9 @@ back:
 
 ; CHECK-LABEL: test2:
 ; CHECK: block $BB2_2{{$}}
-; CHECK: brif $BB2_2, {{.*}}
+; CHECK: br_if $BB2_2, {{.*}}
 ; CHECK: BB2_1:
-; CHECK: brif $BB2_1, (get_local 16){{$}}
+; CHECK: br_if $BB2_1, (get_local 16){{$}}
 ; CHECK: BB2_2:
 ; CHECK: return{{$}}
 define void @test2(double* nocapture %p, i32 %n) {
@@ -101,10 +101,10 @@ for.end:
 ; CHECK: block $BB3_5{{$}}
 ; CHECK: block $BB3_4{{$}}
 ; CHECK: block $BB3_2{{$}}
-; CHECK: brif $BB3_2, (get_local 7){{$}}
+; CHECK: br_if $BB3_2, (get_local 7){{$}}
 ; CHECK: br $BB3_5{{$}}
 ; CHECK: BB3_2:
-; CHECK: brif $BB3_4, (get_local 10){{$}}
+; CHECK: br_if $BB3_4, (get_local 10){{$}}
 ; CHECK: br $BB3_5{{$}}
 ; CHECK: BB3_4:
 ; CHECK: BB3_5:
@@ -134,7 +134,7 @@ exit:
 
 ; CHECK-LABEL: triangle:
 ; CHECK: block $BB4_2{{$}}
-; CHECK: brif $BB4_2, (get_local 5){{$}}
+; CHECK: br_if $BB4_2, (get_local 5){{$}}
 ; CHECK: BB4_2:
 ; CHECK: return (get_local 4){{$}}
 define i32 @triangle(i32* %p, i32 %a) {
@@ -153,7 +153,7 @@ exit:
 ; CHECK-LABEL: diamond:
 ; CHECK: block $BB5_3{{$}}
 ; CHECK: block $BB5_2{{$}}
-; CHECK: brif $BB5_2, (get_local 5){{$}}
+; CHECK: br_if $BB5_2, (get_local 5){{$}}
 ; CHECK: br $BB5_3{{$}}
 ; CHECK: BB5_2:
 ; CHECK: BB5_3:
@@ -201,7 +201,7 @@ loop:
 ; CHECK-NOT: br
 ; CHECK: BB8_1:
 ; CHECK: loop $BB8_2{{$}}
-; CHECK: brif $BB8_1, (get_local 6){{$}}
+; CHECK: br_if $BB8_1, (get_local 6){{$}}
 ; CHECK: return (get_local 4){{$}}
 define i32 @simple_loop(i32* %p, i32 %a) {
 entry:
@@ -219,8 +219,8 @@ exit:
 ; CHECK-LABEL: doubletriangle:
 ; CHECK: block $BB9_4{{$}}
 ; CHECK: block $BB9_3{{$}}
-; CHECK: brif $BB9_4, (get_local 7){{$}}
-; CHECK: brif $BB9_3, (get_local 10){{$}}
+; CHECK: br_if $BB9_4, (get_local 7){{$}}
+; CHECK: br_if $BB9_3, (get_local 10){{$}}
 ; CHECK: BB9_3:
 ; CHECK: BB9_4:
 ; CHECK: return (get_local 6){{$}}
@@ -247,10 +247,10 @@ exit:
 ; CHECK-LABEL: ifelse_earlyexits:
 ; CHECK: block $BB10_4{{$}}
 ; CHECK: block $BB10_2{{$}}
-; CHECK: brif $BB10_2, (get_local 7){{$}}
+; CHECK: br_if $BB10_2, (get_local 7){{$}}
 ; CHECK: br $BB10_4{{$}}
 ; CHECK: BB10_2:
-; CHECK: brif $BB10_4, (get_local 10){{$}}
+; CHECK: br_if $BB10_4, (get_local 10){{$}}
 ; CHECK: BB10_4:
 ; CHECK: return (get_local 6){{$}}
 define i32 @ifelse_earlyexits(i32 %a, i32 %b, i32* %p) {
-- 
2.34.1