From 9da6e03161e6d79b9400955fac484fbd874c0279 Mon Sep 17 00:00:00 2001 From: Colin LeMahieu Date: Fri, 16 Jan 2015 19:53:35 +0000 Subject: [PATCH] [Hexagon] Removing old duplicate atomic load/store patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226309 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Hexagon/HexagonInstrInfo.td | 65 -------------------------- 1 file changed, 65 deletions(-) diff --git a/lib/Target/Hexagon/HexagonInstrInfo.td b/lib/Target/Hexagon/HexagonInstrInfo.td index ed908e421f2..ab8d1fb17f9 100644 --- a/lib/Target/Hexagon/HexagonInstrInfo.td +++ b/lib/Target/Hexagon/HexagonInstrInfo.td @@ -4089,71 +4089,6 @@ def : Pat<(HexagonTCRet texternalsym:$dst), def : Pat<(HexagonTCRet (i32 IntRegs:$dst)), (TCRETURNR (i32 IntRegs:$dst))>; -// Atomic load and store support -// 8 bit atomic load -def : Pat<(atomic_load_8 ADDRriS11_0:$src1), - (i32 (L2_loadrub_io AddrFI:$src1, 0))>; - -def : Pat<(atomic_load_8 (add (i32 IntRegs:$src1), s11_0ImmPred:$offset)), - (i32 (L2_loadrub_io (i32 IntRegs:$src1), s11_0ImmPred:$offset))>; - -// 16 bit atomic load -def : Pat<(atomic_load_16 ADDRriS11_1:$src1), - (i32 (L2_loadruh_io AddrFI:$src1, 0))>; - -def : Pat<(atomic_load_16 (add (i32 IntRegs:$src1), s11_1ImmPred:$offset)), - (i32 (L2_loadruh_io (i32 IntRegs:$src1), s11_1ImmPred:$offset))>; - -def : Pat<(atomic_load_32 ADDRriS11_2:$src1), - (i32 (L2_loadri_io AddrFI:$src1, 0))>; - -def : Pat<(atomic_load_32 (add (i32 IntRegs:$src1), s11_2ImmPred:$offset)), - (i32 (L2_loadri_io (i32 IntRegs:$src1), s11_2ImmPred:$offset))>; - -// 64 bit atomic load -def : Pat<(atomic_load_64 ADDRriS11_3:$src1), - (i64 (L2_loadrd_io AddrFI:$src1, 0))>; - -def : Pat<(atomic_load_64 (add (i32 IntRegs:$src1), s11_3ImmPred:$offset)), - (i64 (L2_loadrd_io (i32 IntRegs:$src1), s11_3ImmPred:$offset))>; - - -def : Pat<(atomic_store_8 ADDRriS11_0:$src2, (i32 IntRegs:$src1)), - (S2_storerb_io AddrFI:$src2, 0, (i32 IntRegs:$src1))>; - -def : Pat<(atomic_store_8 (add (i32 IntRegs:$src2), s11_0ImmPred:$offset), - (i32 IntRegs:$src1)), - (S2_storerb_io (i32 IntRegs:$src2), s11_0ImmPred:$offset, - (i32 IntRegs:$src1))>; - - -def : Pat<(atomic_store_16 ADDRriS11_1:$src2, (i32 IntRegs:$src1)), - (S2_storerh_io AddrFI:$src2, 0, (i32 IntRegs:$src1))>; - -def : Pat<(atomic_store_16 (i32 IntRegs:$src1), - (add (i32 IntRegs:$src2), s11_1ImmPred:$offset)), - (S2_storerh_io (i32 IntRegs:$src2), s11_1ImmPred:$offset, - (i32 IntRegs:$src1))>; - -def : Pat<(atomic_store_32 ADDRriS11_2:$src2, (i32 IntRegs:$src1)), - (S2_storeri_io AddrFI:$src2, 0, (i32 IntRegs:$src1))>; - -def : Pat<(atomic_store_32 (add (i32 IntRegs:$src2), s11_2ImmPred:$offset), - (i32 IntRegs:$src1)), - (S2_storeri_io (i32 IntRegs:$src2), s11_2ImmPred:$offset, - (i32 IntRegs:$src1))>; - - - - -def : Pat<(atomic_store_64 ADDRriS11_3:$src2, (i64 DoubleRegs:$src1)), - (S2_storerd_io AddrFI:$src2, 0, (i64 DoubleRegs:$src1))>; - -def : Pat<(atomic_store_64 (add (i32 IntRegs:$src2), s11_3ImmPred:$offset), - (i64 DoubleRegs:$src1)), - (S2_storerd_io (i32 IntRegs:$src2), s11_3ImmPred:$offset, - (i64 DoubleRegs:$src1))>; - // Map from r0 = and(r1, 65535) to r0 = zxth(r1) def : Pat <(and (i32 IntRegs:$src1), 65535), (A2_zxth (i32 IntRegs:$src1))>; -- 2.34.1