From 870fdb54c3aebe7ba21894814cb27dccba19c837 Mon Sep 17 00:00:00 2001 From: Bradley Smith Date: Mon, 16 Nov 2015 11:15:22 +0000 Subject: [PATCH] [ARM] Allow TargetParser to accurately target architectures Instead of defaulting to an empty string, we want to default to the CPU 'generic' in the case of no valid default CPU being found, (as long as the architecture is actually valid). In order to do this we add a default FPU for each architecture, as well as falling back to architecture defaults for extensions and FPU in the case of a generic CPU is specified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253198 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Support/ARMTargetParser.def | 61 ++++++++++++------------ include/llvm/Support/TargetParser.h | 6 +-- lib/Support/TargetParser.cpp | 19 ++++++-- 3 files changed, 48 insertions(+), 38 deletions(-) diff --git a/include/llvm/Support/ARMTargetParser.def b/include/llvm/Support/ARMTargetParser.def index ac1b09bc42b..ede223ad8ff 100644 --- a/include/llvm/Support/ARMTargetParser.def +++ b/include/llvm/Support/ARMTargetParser.def @@ -42,65 +42,67 @@ ARM_FPU("softvfp", FK_SOFTVFP, FV_NONE, NS_None, FR_None) #undef ARM_FPU #ifndef ARM_ARCH -#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_BASE_EXT) +#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) #endif ARM_ARCH("invalid", AK_INVALID, nullptr, nullptr, - ARMBuildAttrs::CPUArch::Pre_v4, AEK_NONE) + ARMBuildAttrs::CPUArch::Pre_v4, FK_NONE, AEK_NONE) ARM_ARCH("armv2", AK_ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4, - AEK_NONE) + FK_NONE, AEK_NONE) ARM_ARCH("armv2a", AK_ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4, - AEK_NONE) + FK_NONE, AEK_NONE) ARM_ARCH("armv3", AK_ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4, - AEK_NONE) + FK_NONE, AEK_NONE) ARM_ARCH("armv3m", AK_ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4, - AEK_NONE) + FK_NONE, AEK_NONE) ARM_ARCH("armv4", AK_ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4, - AEK_NONE) + FK_NONE, AEK_NONE) ARM_ARCH("armv4t", AK_ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T, - AEK_NONE) + FK_NONE, AEK_NONE) ARM_ARCH("armv5t", AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T, - AEK_NONE) + FK_NONE, AEK_NONE) ARM_ARCH("armv5te", AK_ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE, - AEK_DSP) + FK_NONE, AEK_DSP) ARM_ARCH("armv5tej", AK_ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ, - AEK_DSP) + FK_NONE, AEK_DSP) ARM_ARCH("armv6", AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6, - AEK_DSP) + FK_VFPV2, AEK_DSP) ARM_ARCH("armv6k", AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K, - AEK_DSP) + FK_VFPV2, AEK_DSP) ARM_ARCH("armv6t2", AK_ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2, - AEK_DSP) + FK_NONE, AEK_DSP) ARM_ARCH("armv6z", AK_ARMV6Z, "6Z", "v6z", ARMBuildAttrs::CPUArch::v6KZ, - (AEK_SEC | AEK_DSP)) + FK_VFPV2, (AEK_SEC | AEK_DSP)) ARM_ARCH("armv6zk", AK_ARMV6ZK, "6ZK", "v6zk", ARMBuildAttrs::CPUArch::v6KZ, - (AEK_SEC | AEK_DSP)) + FK_VFPV2, (AEK_SEC | AEK_DSP)) ARM_ARCH("armv6-m", AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M, - AEK_NONE) + FK_NONE, AEK_NONE) ARM_ARCH("armv7-a", AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7, - AEK_DSP) + FK_NEON, AEK_DSP) ARM_ARCH("armv7-r", AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7, - (AEK_HWDIV | AEK_DSP)) + FK_NONE, (AEK_HWDIV | AEK_DSP)) ARM_ARCH("armv7-m", AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7, - AEK_HWDIV) + FK_NONE, AEK_HWDIV) ARM_ARCH("armv7e-m", AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M, - (AEK_HWDIV | AEK_DSP)) + FK_NONE, (AEK_HWDIV | AEK_DSP)) ARM_ARCH("armv8-a", AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8, - (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | AEK_HWDIV | AEK_DSP)) + FK_CRYPTO_NEON_FP_ARMV8, (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | + AEK_HWDIV | AEK_DSP | AEK_CRC)) ARM_ARCH("armv8.1-a", AK_ARMV8_1A, "8.1-A", "v8.1a", ARMBuildAttrs::CPUArch::v8, - (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | AEK_HWDIV | AEK_DSP)) + FK_CRYPTO_NEON_FP_ARMV8, (AEK_SEC | AEK_MP | AEK_VIRT | AEK_HWDIVARM | + AEK_HWDIV | AEK_DSP | AEK_CRC)) // Non-standard Arch names. ARM_ARCH("iwmmxt", AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE, - AEK_NONE) + FK_NONE, AEK_NONE) ARM_ARCH("iwmmxt2", AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE, - AEK_NONE) + FK_NONE, AEK_NONE) ARM_ARCH("xscale", AK_XSCALE, "xscale", "", ARMBuildAttrs::CPUArch::v5TE, - AEK_NONE) + FK_NONE, AEK_NONE) ARM_ARCH("armv6j", AK_ARMV6J, "6J", "v6", ARMBuildAttrs::CPUArch::v6, - AEK_DSP) + FK_NONE, AEK_DSP) ARM_ARCH("armv7s", AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7, - AEK_DSP) + FK_NEON_VFPV4, AEK_DSP) ARM_ARCH("armv7k", AK_ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7, - AEK_DSP) + FK_NONE, AEK_DSP) #undef ARM_ARCH #ifndef ARM_ARCH_EXT_NAME @@ -209,7 +211,6 @@ ARM_CPU_NAME("cortex-a53", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true, AEK_CRC) ARM_CPU_NAME("cortex-a57", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC) ARM_CPU_NAME("cortex-a72", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC) ARM_CPU_NAME("cyclone", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC) -ARM_CPU_NAME("generic", AK_ARMV8_1A, FK_NEON_FP_ARMV8, true, AEK_NONE) // Non-standard Arch names. ARM_CPU_NAME("iwmmxt", AK_IWMMXT, FK_NONE, true, AEK_NONE) ARM_CPU_NAME("xscale", AK_XSCALE, FK_NONE, true, AEK_NONE) diff --git a/include/llvm/Support/TargetParser.h b/include/llvm/Support/TargetParser.h index 65a5568980a..216b4e8f32c 100644 --- a/include/llvm/Support/TargetParser.h +++ b/include/llvm/Support/TargetParser.h @@ -63,7 +63,7 @@ enum FPURestriction { // Arch names. enum ArchKind { -#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_BASE_EXT) ID, +#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID, #include "ARMTargetParser.def" AK_LAST }; @@ -122,8 +122,8 @@ StringRef getArchExtName(unsigned ArchExtKind); StringRef getHWDivName(unsigned HWDivKind); // Information by Name -unsigned getDefaultFPU(StringRef CPU); -unsigned getDefaultExtensions(StringRef CPU); +unsigned getDefaultFPU(StringRef CPU, unsigned ArchKind); +unsigned getDefaultExtensions(StringRef CPU, unsigned ArchKind); StringRef getDefaultCPU(StringRef Arch); // Parser diff --git a/lib/Support/TargetParser.cpp b/lib/Support/TargetParser.cpp index 7a2d177a562..4dbc44690ae 100644 --- a/lib/Support/TargetParser.cpp +++ b/lib/Support/TargetParser.cpp @@ -59,6 +59,7 @@ struct { const char *SubArchCStr; size_t SubArchLength; ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes. + unsigned DefaultFPU; unsigned ArchBaseExtensions; StringRef getName() const { return StringRef(NameCStr, NameLength); } @@ -69,9 +70,9 @@ struct { // Sub-Arch name. StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); } } ARCHNames[] = { -#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_BASE_EXT) \ +#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) \ {NAME, sizeof(NAME) - 1, ID, CPU_ATTR, sizeof(CPU_ATTR) - 1, SUB_ARCH, \ - sizeof(SUB_ARCH) - 1, ARCH_ATTR, ARCH_BASE_EXT}, + sizeof(SUB_ARCH) - 1, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT}, #include "llvm/Support/ARMTargetParser.def" }; @@ -151,7 +152,10 @@ unsigned llvm::ARM::getFPURestriction(unsigned FPUKind) { return FPUNames[FPUKind].Restriction; } -unsigned llvm::ARM::getDefaultFPU(StringRef CPU) { +unsigned llvm::ARM::getDefaultFPU(StringRef CPU, unsigned ArchKind) { + if (CPU == "generic") + return ARCHNames[ArchKind].DefaultFPU; + return StringSwitch(CPU) #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ .Case(NAME, DEFAULT_FPU) @@ -319,7 +323,10 @@ StringRef llvm::ARM::getHWDivName(unsigned HWDivKind) { return StringRef(); } -unsigned llvm::ARM::getDefaultExtensions(StringRef CPU) { +unsigned llvm::ARM::getDefaultExtensions(StringRef CPU, unsigned ArchKind) { + if (CPU == "generic") + return ARCHNames[ArchKind].ArchBaseExtensions; + for (const auto C : CPUNames) { if (CPU == C.getName()) return (ARCHNames[C.ArchID].ArchBaseExtensions | C.DefaultExtensions); @@ -337,7 +344,9 @@ StringRef llvm::ARM::getDefaultCPU(StringRef Arch) { if (CPU.ArchID == AK && CPU.Default) return CPU.getName(); } - return StringRef(); + + // If we can't find a default then target the architecture instead + return "generic"; } // ======================================================= // -- 2.34.1