From 6955c9d1acb0c5550abb566e993ec74aee50e994 Mon Sep 17 00:00:00 2001 From: Adam Nemet Date: Thu, 2 Oct 2014 23:18:30 +0000 Subject: [PATCH] [AVX512] Pull pattern for subvector insert into the instruction definition No functional change intended. Very similar to the change I made for subvector extract in r218480. test/CodeGen/X86/avx512-insert-extract.ll covers this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218928 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrAVX512.td | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/lib/Target/X86/X86InstrAVX512.td b/lib/Target/X86/X86InstrAVX512.td index f3c87ccc8eb..10055d065dc 100644 --- a/lib/Target/X86/X86InstrAVX512.td +++ b/lib/Target/X86/X86InstrAVX512.td @@ -309,7 +309,10 @@ multiclass vinsert_for_size, EVEX_4V, EVEX_V512; + [(set To.RC:$dst, (vinsert_insert:$src3 (To.VT VR512:$src1), + (From.VT From.RC:$src2), + (iPTR imm)))]>, + EVEX_4V, EVEX_V512; let mayLoad = 1 in def rm : AVX512AIi8, EVEX_4V, EVEX_V512, EVEX_CD8; } - // Codegen pattern, e.g. v4i32 -> v16i32 for vinserti32x4 - def : Pat<(vinsert_insert:$ins - (To.VT VR512:$src1), (From.VT From.RC:$src2), (iPTR imm)), - (To.VT (!cast(NAME # From.EltSize # "x4rr") - VR512:$src1, From.RC:$src2, - (INSERT_get_vinsert_imm VR512:$ins)))>; - // Codegen pattern with the alternative types, e.g. v2i64 -> v8i64 for // vinserti32x4 def : Pat<(vinsert_insert:$ins -- 2.34.1