From 63688e622ca5c822106efd152934009ce6408dd0 Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Fri, 3 Oct 2014 18:33:16 +0000 Subject: [PATCH] Eliminate some deep std::vector copies. NFC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218999 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetLowering.h | 9 ++++----- lib/CodeGen/MachineLICM.cpp | 20 +++---------------- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 9 +++------ lib/ProfileData/CoverageMapping.cpp | 2 +- lib/ProfileData/InstrProfWriter.cpp | 1 - lib/TableGen/TGParser.cpp | 2 +- .../AArch64/AArch64A57FPLoadBalancing.cpp | 4 ++-- lib/Target/ARM/ARMConstantIslandPass.cpp | 4 +--- lib/Target/Mips/MipsConstantIslandPass.cpp | 4 +--- lib/Target/R600/R600ControlFlowFinalizer.cpp | 4 ++-- lib/Target/R600/R600InstrInfo.cpp | 2 +- .../R600/R600OptimizeVectorRegisters.cpp | 5 ++--- lib/Target/XCore/XCoreFrameLowering.cpp | 7 +++---- lib/Transforms/IPO/ArgumentPromotion.cpp | 2 +- 14 files changed, 25 insertions(+), 50 deletions(-) diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 306bad00a21..fa7ac953752 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -2547,11 +2547,10 @@ public: unsigned getMatchedOperand() const; /// Copy constructor for copying from a ConstraintInfo. - AsmOperandInfo(const InlineAsm::ConstraintInfo &info) - : InlineAsm::ConstraintInfo(info), - ConstraintType(TargetLowering::C_Unknown), - CallOperandVal(nullptr), ConstraintVT(MVT::Other) { - } + AsmOperandInfo(InlineAsm::ConstraintInfo Info) + : InlineAsm::ConstraintInfo(std::move(Info)), + ConstraintType(TargetLowering::C_Unknown), CallOperandVal(nullptr), + ConstraintVT(MVT::Other) {} }; typedef std::vector AsmOperandInfoVector; diff --git a/lib/CodeGen/MachineLICM.cpp b/lib/CodeGen/MachineLICM.cpp index ce69cc5b9de..353a27b6cfb 100644 --- a/lib/CodeGen/MachineLICM.cpp +++ b/lib/CodeGen/MachineLICM.cpp @@ -143,9 +143,6 @@ namespace { RegPressure.clear(); RegLimit.clear(); BackTrace.clear(); - for (DenseMap >::iterator - CI = CSEMap.begin(), CE = CSEMap.end(); CI != CE; ++CI) - CI->second.clear(); CSEMap.clear(); } @@ -1300,15 +1297,7 @@ void MachineLICM::InitCSEMap(MachineBasicBlock *BB) { for (MachineBasicBlock::iterator I = BB->begin(),E = BB->end(); I != E; ++I) { const MachineInstr *MI = &*I; unsigned Opcode = MI->getOpcode(); - DenseMap >::iterator - CI = CSEMap.find(Opcode); - if (CI != CSEMap.end()) - CI->second.push_back(MI); - else { - std::vector CSEMIs; - CSEMIs.push_back(MI); - CSEMap.insert(std::make_pair(Opcode, CSEMIs)); - } + CSEMap[Opcode].push_back(MI); } } @@ -1448,11 +1437,8 @@ bool MachineLICM::Hoist(MachineInstr *MI, MachineBasicBlock *Preheader) { // Add to the CSE map. if (CI != CSEMap.end()) CI->second.push_back(MI); - else { - std::vector CSEMIs; - CSEMIs.push_back(MI); - CSEMap.insert(std::make_pair(Opcode, CSEMIs)); - } + else + CSEMap[Opcode].push_back(MI); } ++NumHoisted; diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index ee9c0f64172..db03e2ad8fd 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -2241,14 +2241,11 @@ TargetLowering::AsmOperandInfoVector TargetLowering::ParseConstraints( // Do a prepass over the constraints, canonicalizing them, and building up the // ConstraintOperands list. - InlineAsm::ConstraintInfoVector - ConstraintInfos = IA->ParseConstraints(); - unsigned ArgNo = 0; // ArgNo - The argument of the CallInst. unsigned ResNo = 0; // ResNo - The result number of the next output. - for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) { - ConstraintOperands.push_back(AsmOperandInfo(ConstraintInfos[i])); + for (InlineAsm::ConstraintInfo &CI : IA->ParseConstraints()) { + ConstraintOperands.emplace_back(std::move(CI)); AsmOperandInfo &OpInfo = ConstraintOperands.back(); // Update multiple alternative constraint count. @@ -2327,7 +2324,7 @@ TargetLowering::AsmOperandInfoVector TargetLowering::ParseConstraints( } // If we have multiple alternative constraints, select the best alternative. - if (ConstraintInfos.size()) { + if (ConstraintOperands.size()) { if (maCount) { unsigned bestMAIndex = 0; int bestWeight = -1; diff --git a/lib/ProfileData/CoverageMapping.cpp b/lib/ProfileData/CoverageMapping.cpp index df22eb791be..c7dba2c1340 100644 --- a/lib/ProfileData/CoverageMapping.cpp +++ b/lib/ProfileData/CoverageMapping.cpp @@ -202,7 +202,7 @@ CoverageMapping::load(ObjectFileCoverageMappingReader &CoverageReader, continue; } - Coverage->Functions.push_back(Function); + Coverage->Functions.push_back(std::move(Function)); } return std::move(Coverage); diff --git a/lib/ProfileData/InstrProfWriter.cpp b/lib/ProfileData/InstrProfWriter.cpp index 1c4a4fede28..ad1b876e19e 100644 --- a/lib/ProfileData/InstrProfWriter.cpp +++ b/lib/ProfileData/InstrProfWriter.cpp @@ -111,7 +111,6 @@ void InstrProfWriter::write(raw_fd_ostream &OS) { OnDiskChainedHashTableGenerator Generator; // Populate the hash table generator. - std::vector CounterBuffer; for (const auto &I : FunctionData) Generator.insert(I.getKey(), &I.getValue()); diff --git a/lib/TableGen/TGParser.cpp b/lib/TableGen/TGParser.cpp index 2e67f5fa977..4d4bbe989d4 100644 --- a/lib/TableGen/TGParser.cpp +++ b/lib/TableGen/TGParser.cpp @@ -2262,7 +2262,7 @@ bool TGParser::ParseTopLevelLet(MultiClass *CurMultiClass) { // Add this entry to the let stack. std::vector LetInfo = ParseLetList(); if (LetInfo.empty()) return true; - LetStack.push_back(LetInfo); + LetStack.push_back(std::move(LetInfo)); if (Lex.getCode() != tgtok::In) return TokError("expected 'in' at end of top-level 'let'"); diff --git a/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp b/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp index 98e4bc3e923..2503764a852 100644 --- a/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp +++ b/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp @@ -352,7 +352,7 @@ bool AArch64A57FPLoadBalancing::runOnBasicBlock(MachineBasicBlock &MBB) { for (auto I = EC.begin(), E = EC.end(); I != E; ++I) { std::vector Cs(EC.member_begin(I), EC.member_end()); if (Cs.empty()) continue; - V.push_back(Cs); + V.push_back(std::move(Cs)); } // Now we have a set of sets, order them by start address so @@ -377,7 +377,7 @@ bool AArch64A57FPLoadBalancing::runOnBasicBlock(MachineBasicBlock &MBB) { int Parity = 0; for (auto &I : V) - Changed |= colorChainSet(I, MBB, Parity); + Changed |= colorChainSet(std::move(I), MBB, Parity); return Changed; } diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp index 12a8ed67eaa..711a3bc40c0 100644 --- a/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -556,9 +556,7 @@ ARMConstantIslands::doInitialPlacement(std::vector &CPEMIs) { InsPoint[a] = CPEMI; // Add a new CPEntry, but no corresponding CPUser yet. - std::vector CPEs; - CPEs.push_back(CPEntry(CPEMI, i)); - CPEntries.push_back(CPEs); + CPEntries.emplace_back(1, CPEntry(CPEMI, i)); ++NumCPEs; DEBUG(dbgs() << "Moved CPI#" << i << " to end of function, size = " << Size << ", align = " << Align <<'\n'); diff --git a/lib/Target/Mips/MipsConstantIslandPass.cpp b/lib/Target/Mips/MipsConstantIslandPass.cpp index f40e53a34d8..13fceac3cba 100644 --- a/lib/Target/Mips/MipsConstantIslandPass.cpp +++ b/lib/Target/Mips/MipsConstantIslandPass.cpp @@ -590,9 +590,7 @@ MipsConstantIslands::doInitialPlacement(std::vector &CPEMIs) { if (InsPoint[a] == InsAt) InsPoint[a] = CPEMI; // Add a new CPEntry, but no corresponding CPUser yet. - std::vector CPEs; - CPEs.push_back(CPEntry(CPEMI, i)); - CPEntries.push_back(CPEs); + CPEntries.emplace_back(1, CPEntry(CPEMI, i)); ++NumCPEs; DEBUG(dbgs() << "Moved CPI#" << i << " to end of function, size = " << Size << ", align = " << Align <<'\n'); diff --git a/lib/Target/R600/R600ControlFlowFinalizer.cpp b/lib/Target/R600/R600ControlFlowFinalizer.cpp index 08e3c59d83a..44334651765 100644 --- a/lib/Target/R600/R600ControlFlowFinalizer.cpp +++ b/lib/Target/R600/R600ControlFlowFinalizer.cpp @@ -336,7 +336,7 @@ private: getHWInstrDesc(IsTex?CF_TC:CF_VC)) .addImm(0) // ADDR .addImm(AluInstCount - 1); // COUNT - return ClauseFile(MIb, ClauseContent); + return ClauseFile(MIb, std::move(ClauseContent)); } void getLiteral(MachineInstr *MI, std::vector &Lits) const { @@ -426,7 +426,7 @@ private: } assert(ClauseContent.size() < 128 && "ALU clause is too big"); ClauseHead->getOperand(7).setImm(ClauseContent.size() - 1); - return ClauseFile(ClauseHead, ClauseContent); + return ClauseFile(ClauseHead, std::move(ClauseContent)); } void diff --git a/lib/Target/R600/R600InstrInfo.cpp b/lib/Target/R600/R600InstrInfo.cpp index ff1cedbb288..1da2f5f1c2a 100644 --- a/lib/Target/R600/R600InstrInfo.cpp +++ b/lib/Target/R600/R600InstrInfo.cpp @@ -571,7 +571,7 @@ R600InstrInfo::fitsReadPortLimitations(const std::vector &IG, if (!isLastAluTrans) return FindSwizzleForVectorSlot(IGSrcs, ValidSwizzle, TransOps, TransBS); - TransOps = IGSrcs.back(); + TransOps = std::move(IGSrcs.back()); IGSrcs.pop_back(); ValidSwizzle.pop_back(); diff --git a/lib/Target/R600/R600OptimizeVectorRegisters.cpp b/lib/Target/R600/R600OptimizeVectorRegisters.cpp index 3b131d17365..742c0e0451c 100644 --- a/lib/Target/R600/R600OptimizeVectorRegisters.cpp +++ b/lib/Target/R600/R600OptimizeVectorRegisters.cpp @@ -280,9 +280,8 @@ bool R600VectorRegMerger::tryMergeUsingCommonSlot(RegSeqInfo &RSI, continue; if (PreviousRegSeqByReg[MOp->getReg()].empty()) continue; - std::vector MIs = PreviousRegSeqByReg[MOp->getReg()]; - for (unsigned i = 0, e = MIs.size(); i < e; i++) { - CompatibleRSI = PreviousRegSeq[MIs[i]]; + for (MachineInstr *MI : PreviousRegSeqByReg[MOp->getReg()]) { + CompatibleRSI = PreviousRegSeq[MI]; if (RSI == CompatibleRSI) continue; if (tryMergeVector(&CompatibleRSI, &RSI, RemapChan)) diff --git a/lib/Target/XCore/XCoreFrameLowering.cpp b/lib/Target/XCore/XCoreFrameLowering.cpp index 734ea6b2df3..7c743401ae1 100644 --- a/lib/Target/XCore/XCoreFrameLowering.cpp +++ b/lib/Target/XCore/XCoreFrameLowering.cpp @@ -312,11 +312,10 @@ void XCoreFrameLowering::emitPrologue(MachineFunction &MF) const { if (emitFrameMoves) { // Frame moves for callee saved. - auto SpillLabels = XFI->getSpillLabels(); - for (unsigned I = 0, E = SpillLabels.size(); I != E; ++I) { - MachineBasicBlock::iterator Pos = SpillLabels[I].first; + for (const auto &SpillLabel : XFI->getSpillLabels()) { + MachineBasicBlock::iterator Pos = SpillLabel.first; ++Pos; - CalleeSavedInfo &CSI = SpillLabels[I].second; + const CalleeSavedInfo &CSI = SpillLabel.second; int Offset = MFI->getObjectOffset(CSI.getFrameIdx()); unsigned DRegNum = MRI->getDwarfRegNum(CSI.getReg(), true); EmitCfiOffset(MBB, Pos, dl, TII, MMI, DRegNum, Offset); diff --git a/lib/Transforms/IPO/ArgumentPromotion.cpp b/lib/Transforms/IPO/ArgumentPromotion.cpp index a52cc160c90..5934619b4c1 100644 --- a/lib/Transforms/IPO/ArgumentPromotion.cpp +++ b/lib/Transforms/IPO/ArgumentPromotion.cpp @@ -530,7 +530,7 @@ bool ArgPromotion::isSafeToPromoteArgument(Argument *Arg, // of elements of the aggregate. return false; } - ToPromote.insert(Operands); + ToPromote.insert(std::move(Operands)); } } -- 2.34.1