From 604e1b770ce7940468249a38cd06237a4d108c45 Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Sun, 1 Feb 2015 20:16:10 +0000 Subject: [PATCH] [PowerPC] Add implicit ops to conditional returns in PPCEarlyReturn When PPCEarlyReturn, it should really copy implicit ops from the old return instruction to the new one. This currently does not matter much, because we run PPCEarlyReturn very late in the pipeline (there is nothing to do DCE on definitions of those registers). However, for completeness, we should do it anyway. Noticed by inspection (and there should be no functional change); thus, no test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227763 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCInstrInfo.cpp | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp index 13ec79ec495..c1cfc2567c4 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -2150,11 +2150,14 @@ protected: PIE = ReturnMBB.pred_end(); PI != PIE; ++PI) { bool OtherReference = false, BlockChanged = false; for (MachineBasicBlock::iterator J = (*PI)->getLastNonDebugInstr();;) { + MachineInstrBuilder MIB; if (J->getOpcode() == PPC::B) { if (J->getOperand(0).getMBB() == &ReturnMBB) { // This is an unconditional branch to the return. Replace the // branch with a blr. - BuildMI(**PI, J, J->getDebugLoc(), TII->get(I->getOpcode())); + MIB = + BuildMI(**PI, J, J->getDebugLoc(), TII->get(I->getOpcode())); + MIB.copyImplicitOps(I); MachineBasicBlock::iterator K = J--; K->eraseFromParent(); BlockChanged = true; @@ -2165,9 +2168,10 @@ protected: if (J->getOperand(2).getMBB() == &ReturnMBB) { // This is a conditional branch to the return. Replace the branch // with a bclr. - BuildMI(**PI, J, J->getDebugLoc(), TII->get(PPC::BCCLR)) - .addImm(J->getOperand(0).getImm()) - .addReg(J->getOperand(1).getReg()); + MIB = BuildMI(**PI, J, J->getDebugLoc(), TII->get(PPC::BCCLR)) + .addImm(J->getOperand(0).getImm()) + .addReg(J->getOperand(1).getReg()); + MIB.copyImplicitOps(I); MachineBasicBlock::iterator K = J--; K->eraseFromParent(); BlockChanged = true; @@ -2178,10 +2182,11 @@ protected: if (J->getOperand(1).getMBB() == &ReturnMBB) { // This is a conditional branch to the return. Replace the branch // with a bclr. - BuildMI(**PI, J, J->getDebugLoc(), - TII->get(J->getOpcode() == PPC::BC ? - PPC::BCLR : PPC::BCLRn)) - .addReg(J->getOperand(0).getReg()); + MIB = BuildMI(**PI, J, J->getDebugLoc(), + TII->get(J->getOpcode() == PPC::BC ? + PPC::BCLR : PPC::BCLRn)) + .addReg(J->getOperand(0).getReg()); + MIB.copyImplicitOps(I); MachineBasicBlock::iterator K = J--; K->eraseFromParent(); BlockChanged = true; -- 2.34.1