From 5d59bb44eeb9a40fae29fc710761fca48b7bb658 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 17 Jan 2014 07:25:39 +0000 Subject: [PATCH] Fix intel syntax for 64-bit version of FXSAVE/FXRSTOR to use '64' suffix instead of 'q' git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199474 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrFPStack.td | 4 ++-- test/MC/X86/intel-syntax.s | 6 ++++++ 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/lib/Target/X86/X86InstrFPStack.td b/lib/Target/X86/X86InstrFPStack.td index ded44eea06a..122c6d87bb1 100644 --- a/lib/Target/X86/X86InstrFPStack.td +++ b/lib/Target/X86/X86InstrFPStack.td @@ -622,12 +622,12 @@ def FCOMPP : I<0xD9, RawFrm, (outs), (ins), "fcompp", [], IIC_FCOMPP>, DE; def FXSAVE : I<0xAE, MRM0m, (outs opaque512mem:$dst), (ins), "fxsave\t$dst", [], IIC_FXSAVE>, TB; def FXSAVE64 : I<0xAE, MRM0m, (outs opaque512mem:$dst), (ins), - "fxsaveq\t$dst", [], IIC_FXSAVE>, TB, REX_W, + "fxsave{q|64}\t$dst", [], IIC_FXSAVE>, TB, REX_W, Requires<[In64BitMode]>; def FXRSTOR : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src), "fxrstor\t$src", [], IIC_FXRSTOR>, TB; def FXRSTOR64 : I<0xAE, MRM1m, (outs), (ins opaque512mem:$src), - "fxrstorq\t$src", [], IIC_FXRSTOR>, TB, REX_W, + "fxrstor{q|64}\t$src", [], IIC_FXRSTOR>, TB, REX_W, Requires<[In64BitMode]>; } // SchedRW diff --git a/test/MC/X86/intel-syntax.s b/test/MC/X86/intel-syntax.s index 9677da731c1..dba72b3dcd0 100644 --- a/test/MC/X86/intel-syntax.s +++ b/test/MC/X86/intel-syntax.s @@ -584,3 +584,9 @@ fsub ST(1) fsubr ST(1) fdiv ST(1) fdivr ST(1) + + +// CHECK: fxsaveq (%rax) +// CHECK: fxrstorq (%rax) +fxsave64 [rax] +fxrstor64 [rax] -- 2.34.1