From 5aacafc256d19a105f51f0b003117a2087f26557 Mon Sep 17 00:00:00 2001 From: Richard Smith Date: Sun, 20 Apr 2014 21:35:26 +0000 Subject: [PATCH] Don't define llvm::X86Disassembler::InstructionSpecifier in different ways in different source files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206719 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../X86/Disassembler/X86DisassemblerDecoder.h | 11 ++++++--- .../X86DisassemblerDecoderCommon.h | 9 -------- utils/TableGen/X86DisassemblerShared.h | 23 ++++++++++--------- 3 files changed, 20 insertions(+), 23 deletions(-) diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h index 19455e33ed9..67f52e55fac 100644 --- a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h +++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h @@ -16,9 +16,6 @@ #ifndef X86DISASSEMBLERDECODER_H #define X86DISASSEMBLERDECODER_H -#define INSTRUCTION_SPECIFIER_FIELDS \ - uint16_t operands; - #define INSTRUCTION_IDS \ uint16_t instructionIDs; @@ -531,6 +528,14 @@ typedef int (*byteReader_t)(const void* arg, uint8_t* byte, uint64_t address); */ typedef void (*dlog_t)(void* arg, const char *log); +/* + * The specification for how to extract and interpret a full instruction and + * its operands. + */ +struct InstructionSpecifier { + uint16_t operands; +}; + /* * The x86 internal instruction, which is produced by the decoder. */ diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h b/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h index b8130a0f9c7..d323fa2cc72 100644 --- a/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h +++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h @@ -538,15 +538,6 @@ enum ModifierType { #define X86_MAX_OPERANDS 5 -/* - * The specification for how to extract and interpret a full instruction and - * its operands. - */ -struct InstructionSpecifier { - /* The macro below must be defined wherever this file is included. */ - INSTRUCTION_SPECIFIER_FIELDS -}; - /* * Decoding mode for the Intel disassembler. 16-bit, 32-bit, and 64-bit mode * are supported, and represent real mode, IA-32e, and IA-32e in 64-bit mode, diff --git a/utils/TableGen/X86DisassemblerShared.h b/utils/TableGen/X86DisassemblerShared.h index 036e92430b0..2d3d3fc1bcb 100644 --- a/utils/TableGen/X86DisassemblerShared.h +++ b/utils/TableGen/X86DisassemblerShared.h @@ -13,17 +13,6 @@ #include #include -#define INSTRUCTION_SPECIFIER_FIELDS \ - struct OperandSpecifier operands[X86_MAX_OPERANDS]; \ - InstructionContext insnContext; \ - std::string name; \ - \ - InstructionSpecifier() { \ - insnContext = IC; \ - name = ""; \ - memset(operands, 0, sizeof(operands)); \ - } - #define INSTRUCTION_IDS \ InstrUID instructionIDs[256]; @@ -32,4 +21,16 @@ #undef INSTRUCTION_SPECIFIER_FIELDS #undef INSTRUCTION_IDS +struct InstructionSpecifier { + llvm::X86Disassembler::OperandSpecifier operands[X86_MAX_OPERANDS]; + llvm::X86Disassembler::InstructionContext insnContext; + std::string name; + + InstructionSpecifier() { + insnContext = llvm::X86Disassembler::IC; + name = ""; + memset(operands, 0, sizeof(operands)); + } +}; + #endif -- 2.34.1