From 4f255d63c64ef12a32902d91c7fc022b3cc9cfb5 Mon Sep 17 00:00:00 2001 From: Jonas Paulsson Date: Sat, 10 Oct 2015 07:14:24 +0000 Subject: [PATCH] [SystemZ] Fixes in the backend I/R. expandPostRAPseudo(): STX -> 2 * STD: The first STD should not have the kill flag set for the address. SystemZElimCompare: BRC -> BRCT conversion: Don't forget to remove the CC operand. Needed to make SystemZ/asm-17.ll pass with -verify-machineinstrs, which now runs with this flag. Reviewed by Ulrich Weigand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249945 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/SystemZ/SystemZElimCompare.cpp | 5 ++--- lib/Target/SystemZ/SystemZInstrInfo.cpp | 3 +++ test/CodeGen/SystemZ/asm-17.ll | 3 ++- 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/lib/Target/SystemZ/SystemZElimCompare.cpp b/lib/Target/SystemZ/SystemZElimCompare.cpp index 5daa4d77671..adddeef0090 100644 --- a/lib/Target/SystemZ/SystemZElimCompare.cpp +++ b/lib/Target/SystemZ/SystemZElimCompare.cpp @@ -206,9 +206,8 @@ SystemZElimCompare::convertToBRCT(MachineInstr *MI, MachineInstr *Compare, // The transformation is OK. Rebuild Branch as a BRCT(G). MachineOperand Target(Branch->getOperand(2)); - Branch->RemoveOperand(2); - Branch->RemoveOperand(1); - Branch->RemoveOperand(0); + while (Branch->getNumOperands()) + Branch->RemoveOperand(0); Branch->setDesc(TII->get(BRCT)); MachineInstrBuilder(*Branch->getParent()->getParent(), Branch) .addOperand(MI->getOperand(0)) diff --git a/lib/Target/SystemZ/SystemZInstrInfo.cpp b/lib/Target/SystemZ/SystemZInstrInfo.cpp index a319e1c6aa8..5d7accc6c0e 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.cpp +++ b/lib/Target/SystemZ/SystemZInstrInfo.cpp @@ -69,6 +69,9 @@ void SystemZInstrInfo::splitMove(MachineBasicBlock::iterator MI, MachineOperand &LowOffsetOp = MI->getOperand(2); LowOffsetOp.setImm(LowOffsetOp.getImm() + 8); + // Clear the kill flag for the address reg in the first instruction. + EarlierMI->getOperand(1).setIsKill(false); + // Set the opcodes. unsigned HighOpcode = getOpcodeForOffset(NewOpcode, HighOffsetOp.getImm()); unsigned LowOpcode = getOpcodeForOffset(NewOpcode, LowOffsetOp.getImm()); diff --git a/test/CodeGen/SystemZ/asm-17.ll b/test/CodeGen/SystemZ/asm-17.ll index 533b5e90d62..acf2aff4542 100644 --- a/test/CodeGen/SystemZ/asm-17.ll +++ b/test/CodeGen/SystemZ/asm-17.ll @@ -1,6 +1,7 @@ ; Test explicit register names. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -no-integrated-as | FileCheck %s +; RUN: llc < %s -verify-machineinstrs -mtriple=s390x-linux-gnu -no-integrated-as \ +; RUN: | FileCheck %s ; Test i32 GPRs. define i32 @f1() { -- 2.34.1