From 483ec21d90295c146b5555ed66c16860bcfff942 Mon Sep 17 00:00:00 2001 From: Dale Johannesen Date: Wed, 7 Nov 2007 00:25:05 +0000 Subject: [PATCH] Interchange Dwarf numbers of ESP and EBP on x86 Darwin. Much improvement in exception handling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43794 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86RegisterInfo.cpp | 16 ++++++++++++++++ lib/Target/X86/X86RegisterInfo.h | 4 ++++ utils/TableGen/RegisterInfoEmitter.cpp | 2 +- 3 files changed, 21 insertions(+), 1 deletion(-) diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index d37db976c6b..72528c73b19 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -654,6 +654,22 @@ X86RegisterInfo::X86RegisterInfo(X86TargetMachine &tm, assert(AmbEntries.empty() && "Duplicated entries in unfolding maps?"); } +// getDwarfRegNum - This function maps LLVM register identifiers to the +// Dwarf specific numbering, used in debug info and exception tables. +// The registers are given "basic" dwarf numbers in the .td files, +// which are collected by TableGen into X86GenRegisterInfo::getDwarfRegNum. +// This wrapper allows for target-specific overrides. +int X86RegisterInfo::getDwarfRegNum(unsigned RegNo) const { + int n = X86GenRegisterInfo::getDwarfRegNum(RegNo); + const X86Subtarget *Subtarget = &TM.getSubtarget(); + if (Subtarget->isDarwin) { + // ESP and EBP are switched. + if (n==4) return 5; + if (n==5) return 4; + } + return n; +} + // getX86RegNum - This function maps LLVM register identifiers to their X86 // specific numbering, which is used in various places encoding instructions. // diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h index 3f0db25f2a7..ec526c1773b 100644 --- a/lib/Target/X86/X86RegisterInfo.h +++ b/lib/Target/X86/X86RegisterInfo.h @@ -77,6 +77,10 @@ public: /// register identifier. unsigned getX86RegNum(unsigned RegNo); + /// getDwarfRegNum - allows modification of X86GenRegisterInfo::getDwarfRegNum + /// (created by TableGen) for target dependencies. + int getDwarfRegNum(unsigned RegNum) const; + /// Code Generation virtual methods... /// bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index 2f948afa3de..48262babdf1 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -60,7 +60,7 @@ void RegisterInfoEmitter::runHeader(std::ostream &OS) { OS << "struct " << ClassName << " : public MRegisterInfo {\n" << " " << ClassName << "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n" - << " int getDwarfRegNum(unsigned RegNum) const;\n" + << " virtual int getDwarfRegNum(unsigned RegNum) const;\n" << " unsigned getSubReg(unsigned RegNo, unsigned Index) const;\n" << "};\n\n"; -- 2.34.1