From 3aa56ba98e7c0ca73adeab139adcb5144c928f8d Mon Sep 17 00:00:00 2001 From: Eric Christopher Date: Fri, 25 Jul 2014 22:22:39 +0000 Subject: [PATCH] Move R600 subtarget dependent variables onto the subtarget. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213982 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/AMDGPUIntrinsicInfo.cpp | 2 +- lib/Target/R600/AMDGPUIntrinsicInfo.h | 2 +- lib/Target/R600/AMDGPUSubtarget.cpp | 70 ++++++++++++++++--------- lib/Target/R600/AMDGPUSubtarget.h | 33 ++++++++---- lib/Target/R600/AMDGPUTargetMachine.cpp | 40 +++----------- lib/Target/R600/AMDGPUTargetMachine.h | 19 +++---- 6 files changed, 83 insertions(+), 83 deletions(-) diff --git a/lib/Target/R600/AMDGPUIntrinsicInfo.cpp b/lib/Target/R600/AMDGPUIntrinsicInfo.cpp index 58916a99549..e94bb6013d8 100644 --- a/lib/Target/R600/AMDGPUIntrinsicInfo.cpp +++ b/lib/Target/R600/AMDGPUIntrinsicInfo.cpp @@ -24,7 +24,7 @@ using namespace llvm; #include "AMDGPUGenIntrinsics.inc" #undef GET_LLVM_INTRINSIC_FOR_GCC_BUILTIN -AMDGPUIntrinsicInfo::AMDGPUIntrinsicInfo(TargetMachine *tm) +AMDGPUIntrinsicInfo::AMDGPUIntrinsicInfo() : TargetIntrinsicInfo() {} std::string AMDGPUIntrinsicInfo::getName(unsigned IntrID, Type **Tys, diff --git a/lib/Target/R600/AMDGPUIntrinsicInfo.h b/lib/Target/R600/AMDGPUIntrinsicInfo.h index 5be68a217da..0a193170132 100644 --- a/lib/Target/R600/AMDGPUIntrinsicInfo.h +++ b/lib/Target/R600/AMDGPUIntrinsicInfo.h @@ -33,7 +33,7 @@ enum ID { class AMDGPUIntrinsicInfo : public TargetIntrinsicInfo { public: - AMDGPUIntrinsicInfo(TargetMachine *tm); + AMDGPUIntrinsicInfo(); std::string getName(unsigned IntrId, Type **Tys = nullptr, unsigned numTys = 0) const override; unsigned lookupName(const char *Name, unsigned Len) const override; diff --git a/lib/Target/R600/AMDGPUSubtarget.cpp b/lib/Target/R600/AMDGPUSubtarget.cpp index e3c2a50ab82..6a09d4eb547 100644 --- a/lib/Target/R600/AMDGPUSubtarget.cpp +++ b/lib/Target/R600/AMDGPUSubtarget.cpp @@ -13,8 +13,11 @@ //===----------------------------------------------------------------------===// #include "AMDGPUSubtarget.h" +#include "R600ISelLowering.h" #include "R600InstrInfo.h" +#include "R600MachineScheduler.h" #include "SIInstrInfo.h" +#include "SIISelLowering.h" #include "llvm/ADT/SmallString.h" #include "llvm/ADT/SmallString.h" @@ -28,26 +31,23 @@ using namespace llvm; #define GET_SUBTARGETINFO_CTOR #include "AMDGPUGenSubtargetInfo.inc" -AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS) : - AMDGPUGenSubtargetInfo(TT, GPU, FS), - DevName(GPU), - Is64bit(false), - DumpCode(false), - R600ALUInst(false), - HasVertexCache(false), - TexVTXClauseSize(0), - Gen(AMDGPUSubtarget::R600), - FP64(false), - FP64Denormals(false), - FP32Denormals(false), - CaymanISA(false), - EnableIRStructurizer(true), - EnablePromoteAlloca(false), - EnableIfCvt(true), - WavefrontSize(0), - CFALUBug(false), - LocalMemorySize(0), - InstrItins(getInstrItineraryForCPU(GPU)) { +static std::string computeDataLayout(const AMDGPUSubtarget &ST) { + std::string Ret = "e-p:32:32"; + + if (ST.is64bit()) { + // 32-bit local, and region pointers. 64-bit private, global, and constant. + Ret += "-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64"; + } + + Ret += "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256" + "-v512:512-v1024:1024-v2048:2048-n32:64"; + + return Ret; +} + +AMDGPUSubtarget & +AMDGPUSubtarget::initializeSubtargetDependencies(StringRef GPU, StringRef FS) { + // Determine default and user-specified characteristics // On SI+, we want FP64 denormals to be on by default. FP32 denormals can be // enabled, but some instructions do not respect them and they run at the // double precision rate, so don't enable by default. @@ -61,16 +61,36 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS) : ParseSubtargetFeatures(GPU, FullFS); + // FIXME: I don't think think Evergreen has any useful support for + // denormals, but should be checked. Should we issue a warning somewhere + // if someone tries to enable these? if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { - InstrInfo.reset(new R600InstrInfo(*this)); - - // FIXME: I don't think think Evergreen has any useful support for - // denormals, but should be checked. Should we issue a warning somewhere if - // someone tries to enable these? FP32Denormals = false; FP64Denormals = false; + } + return *this; +} + +AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS, + TargetMachine &TM) + : AMDGPUGenSubtargetInfo(TT, GPU, FS), DevName(GPU), Is64bit(false), + DumpCode(false), R600ALUInst(false), HasVertexCache(false), + TexVTXClauseSize(0), Gen(AMDGPUSubtarget::R600), FP64(false), + FP64Denormals(false), FP32Denormals(false), CaymanISA(false), + EnableIRStructurizer(true), EnablePromoteAlloca(false), EnableIfCvt(true), + WavefrontSize(0), CFALUBug(false), LocalMemorySize(0), + DL(computeDataLayout(initializeSubtargetDependencies(GPU, FS))), + FrameLowering(TargetFrameLowering::StackGrowsUp, + 64 * 16, // Maximum stack alignment (long16) + 0), + IntrinsicInfo(), InstrItins(getInstrItineraryForCPU(GPU)) { + + if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { + InstrInfo.reset(new R600InstrInfo(*this)); + TLInfo.reset(new R600TargetLowering(TM)); } else { InstrInfo.reset(new SIInstrInfo(*this)); + TLInfo.reset(new SITargetLowering(TM)); } } diff --git a/lib/Target/R600/AMDGPUSubtarget.h b/lib/Target/R600/AMDGPUSubtarget.h index a844b37b6be..c6d097b1ff5 100644 --- a/lib/Target/R600/AMDGPUSubtarget.h +++ b/lib/Target/R600/AMDGPUSubtarget.h @@ -15,7 +15,12 @@ #ifndef AMDGPUSUBTARGET_H #define AMDGPUSUBTARGET_H #include "AMDGPU.h" +#include "AMDGPUFrameLowering.h" #include "AMDGPUInstrInfo.h" +#include "AMDGPUIntrinsicInfo.h" +#include "AMDGPUSubtarget.h" +#include "R600ISelLowering.h" +#include "llvm/IR/DataLayout.h" #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/StringRef.h" #include "llvm/Target/TargetSubtargetInfo.h" @@ -29,8 +34,6 @@ namespace llvm { class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo { - std::unique_ptr InstrInfo; - public: enum Generation { R600 = 0, @@ -60,18 +63,26 @@ private: bool CFALUBug; int LocalMemorySize; + const DataLayout DL; + AMDGPUFrameLowering FrameLowering; + AMDGPUIntrinsicInfo IntrinsicInfo; + std::unique_ptr TLInfo; + std::unique_ptr InstrInfo; InstrItineraryData InstrItins; public: - AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS); - - const AMDGPUInstrInfo *getInstrInfo() const { - return InstrInfo.get(); - } - - const InstrItineraryData &getInstrItineraryData() const { - return InstrItins; - } + AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS, TargetMachine &TM); + AMDGPUSubtarget &initializeSubtargetDependencies(StringRef GPU, StringRef FS); + + const AMDGPUFrameLowering *getFrameLowering() const { return &FrameLowering; } + const AMDGPUIntrinsicInfo *getIntrinsicInfo() const { return &IntrinsicInfo; } + const AMDGPUInstrInfo *getInstrInfo() const { return InstrInfo.get(); } + const AMDGPURegisterInfo *getRegisterInfo() const { + return &InstrInfo->getRegisterInfo(); + } + AMDGPUTargetLowering *getTargetLowering() const { return TLInfo.get(); } + const DataLayout *getDataLayout() const { return &DL; } + const InstrItineraryData &getInstrItineraryData() const { return InstrItins; } void ParseSubtargetFeatures(StringRef CPU, StringRef FS); diff --git a/lib/Target/R600/AMDGPUTargetMachine.cpp b/lib/Target/R600/AMDGPUTargetMachine.cpp index 56ba719e686..c5515e6dfa8 100644 --- a/lib/Target/R600/AMDGPUTargetMachine.cpp +++ b/lib/Target/R600/AMDGPUTargetMachine.cpp @@ -48,41 +48,13 @@ static MachineSchedRegistry SchedCustomRegistry("r600", "Run R600's custom scheduler", createR600MachineScheduler); -static std::string computeDataLayout(const AMDGPUSubtarget &ST) { - std::string Ret = "e-p:32:32"; - - if (ST.is64bit()) { - // 32-bit local, and region pointers. 64-bit private, global, and constant. - Ret += "-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64"; - } - - Ret += "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256" - "-v512:512-v1024:1024-v2048:2048-n32:64"; - - return Ret; -} - AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, StringRef TT, - StringRef CPU, StringRef FS, - TargetOptions Options, - Reloc::Model RM, CodeModel::Model CM, - CodeGenOpt::Level OptLevel -) -: - LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel), - Subtarget(TT, CPU, FS), - Layout(computeDataLayout(Subtarget)), - FrameLowering(TargetFrameLowering::StackGrowsUp, - 64 * 16 // Maximum stack alignment (long16) - , 0), - IntrinsicInfo(this), - InstrItins(&Subtarget.getInstrItineraryData()) { - // TLInfo uses InstrInfo so it must be initialized after. - if (Subtarget.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { - TLInfo.reset(new R600TargetLowering(*this)); - } else { - TLInfo.reset(new SITargetLowering(*this)); - } + StringRef CPU, StringRef FS, + TargetOptions Options, Reloc::Model RM, + CodeModel::Model CM, + CodeGenOpt::Level OptLevel) + : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel), + Subtarget(TT, CPU, FS, *this) { setRequiresStructuredCFG(true); initAsmInfo(); } diff --git a/lib/Target/R600/AMDGPUTargetMachine.h b/lib/Target/R600/AMDGPUTargetMachine.h index 3bb15beb6bf..64f25462821 100644 --- a/lib/Target/R600/AMDGPUTargetMachine.h +++ b/lib/Target/R600/AMDGPUTargetMachine.h @@ -27,11 +27,6 @@ namespace llvm { class AMDGPUTargetMachine : public LLVMTargetMachine { AMDGPUSubtarget Subtarget; - const DataLayout Layout; - AMDGPUFrameLowering FrameLowering; - AMDGPUIntrinsicInfo IntrinsicInfo; - std::unique_ptr TLInfo; - const InstrItineraryData *InstrItins; public: AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS, @@ -39,10 +34,10 @@ public: CodeModel::Model CM, CodeGenOpt::Level OL); ~AMDGPUTargetMachine(); const AMDGPUFrameLowering *getFrameLowering() const override { - return &FrameLowering; + return getSubtargetImpl()->getFrameLowering(); } const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override { - return &IntrinsicInfo; + return getSubtargetImpl()->getIntrinsicInfo(); } const AMDGPUInstrInfo *getInstrInfo() const override { return getSubtargetImpl()->getInstrInfo(); @@ -51,15 +46,17 @@ public: return &Subtarget; } const AMDGPURegisterInfo *getRegisterInfo() const override { - return &getInstrInfo()->getRegisterInfo(); + return getSubtargetImpl()->getRegisterInfo(); } AMDGPUTargetLowering *getTargetLowering() const override { - return TLInfo.get(); + return getSubtargetImpl()->getTargetLowering(); } const InstrItineraryData *getInstrItineraryData() const override { - return InstrItins; + return &getSubtargetImpl()->getInstrItineraryData(); + } + const DataLayout *getDataLayout() const override { + return getSubtargetImpl()->getDataLayout(); } - const DataLayout *getDataLayout() const override { return &Layout; } TargetPassConfig *createPassConfig(PassManagerBase &PM) override; /// \brief Register R600 analysis passes with a pass manager. -- 2.34.1