From 2883bf35a60eba7dfec8172be76f32b829e37e8d Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Tue, 14 Jul 2015 20:11:28 +0000 Subject: [PATCH] Fix Windows build: replace __func__ with LLVM_FUNCTION_NAME git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242192 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Hexagon/HexagonGenPredicate.cpp | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/lib/Target/Hexagon/HexagonGenPredicate.cpp b/lib/Target/Hexagon/HexagonGenPredicate.cpp index 9e31c64192a..6a97cd4bd86 100644 --- a/lib/Target/Hexagon/HexagonGenPredicate.cpp +++ b/lib/Target/Hexagon/HexagonGenPredicate.cpp @@ -202,7 +202,8 @@ void HexagonGenPredicate::collectPredicateGPR(MachineFunction &MF) { void HexagonGenPredicate::processPredicateGPR(const Register &Reg) { - DEBUG(dbgs() << __func__ << ": " << PrintReg(Reg.R, TRI, Reg.S) << "\n"); + DEBUG(dbgs() << LLVM_FUNCTION_NAME << ": " + << PrintReg(Reg.R, TRI, Reg.S) << "\n"); typedef MachineRegisterInfo::use_iterator use_iterator; use_iterator I = MRI->use_begin(Reg.R), E = MRI->use_end(); if (I == E) { @@ -229,7 +230,7 @@ Register HexagonGenPredicate::getPredRegFor(const Register &Reg) { if (F != G2P.end()) return F->second; - DEBUG(dbgs() << __func__ << ": " << PrintRegister(Reg, *TRI)); + DEBUG(dbgs() << LLVM_FUNCTION_NAME << ": " << PrintRegister(Reg, *TRI)); MachineInstr *DefI = MRI->getVRegDef(Reg.R); assert(DefI); unsigned Opc = DefI->getOpcode(); @@ -345,7 +346,7 @@ bool HexagonGenPredicate::isScalarPred(Register PredReg) { bool HexagonGenPredicate::convertToPredForm(MachineInstr *MI) { - DEBUG(dbgs() << __func__ << ": " << MI << " " << *MI); + DEBUG(dbgs() << LLVM_FUNCTION_NAME << ": " << MI << " " << *MI); unsigned Opc = MI->getOpcode(); assert(isConvertibleToPredForm(MI)); @@ -431,7 +432,7 @@ bool HexagonGenPredicate::convertToPredForm(MachineInstr *MI) { bool HexagonGenPredicate::eliminatePredCopies(MachineFunction &MF) { - DEBUG(dbgs() << __func__ << "\n"); + DEBUG(dbgs() << LLVM_FUNCTION_NAME << "\n"); const TargetRegisterClass *PredRC = &Hexagon::PredRegsRegClass; bool Changed = false; VectOfInst Erase; -- 2.34.1