From 1bcadc9b5c54fc5ffb48fba2ef022a5cb9f3b3ce Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 29 Sep 2014 15:50:26 +0000 Subject: [PATCH] R600/SI: Fix hardcoded values for modifiers. Move enums to SIDefines.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218610 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../R600/InstPrinter/AMDGPUInstPrinter.cpp | 8 +++++--- lib/Target/R600/SIDefines.h | 16 ++++++++++++++++ lib/Target/R600/SIInsertWaits.cpp | 1 + lib/Target/R600/SIInstrInfo.h | 16 ---------------- 4 files changed, 22 insertions(+), 19 deletions(-) diff --git a/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp b/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp index 6d893b27790..9bb8beca7bb 100644 --- a/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp +++ b/lib/Target/R600/InstPrinter/AMDGPUInstPrinter.cpp @@ -9,6 +9,8 @@ //===----------------------------------------------------------------------===// #include "AMDGPUInstPrinter.h" +#include "SIDefines.h" + #include "MCTargetDesc/AMDGPUMCTargetDesc.h" #include "llvm/MC/MCExpr.h" #include "llvm/MC/MCInst.h" @@ -239,12 +241,12 @@ void AMDGPUInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, void AMDGPUInstPrinter::printOperandAndMods(const MCInst *MI, unsigned OpNo, raw_ostream &O) { unsigned InputModifiers = MI->getOperand(OpNo).getImm(); - if (InputModifiers & 0x1) + if (InputModifiers & SISrcMods::NEG) O << '-'; - if (InputModifiers & 0x2) + if (InputModifiers & SISrcMods::ABS) O << '|'; printOperand(MI, OpNo + 1, O); - if (InputModifiers & 0x2) + if (InputModifiers & SISrcMods::ABS) O << '|'; } diff --git a/lib/Target/R600/SIDefines.h b/lib/Target/R600/SIDefines.h index 0a247379e9b..29be2e67169 100644 --- a/lib/Target/R600/SIDefines.h +++ b/lib/Target/R600/SIDefines.h @@ -27,6 +27,22 @@ enum { }; } +namespace SIInstrFlags { + enum Flags { + // First 4 bits are the instruction encoding + VM_CNT = 1 << 0, + EXP_CNT = 1 << 1, + LGKM_CNT = 1 << 2 + }; +} + +namespace SISrcMods { + enum { + NEG = 1 << 0, + ABS = 1 << 1 + }; +} + #define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028 #define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C #define S_00B02C_EXTRA_LDS_SIZE(x) (((x) & 0xFF) << 8) diff --git a/lib/Target/R600/SIInsertWaits.cpp b/lib/Target/R600/SIInsertWaits.cpp index 23ade02927c..792500b457a 100644 --- a/lib/Target/R600/SIInsertWaits.cpp +++ b/lib/Target/R600/SIInsertWaits.cpp @@ -19,6 +19,7 @@ #include "AMDGPU.h" #include "AMDGPUSubtarget.h" #include "SIInstrInfo.h" +#include "SIDefines.h" #include "SIMachineFunctionInfo.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunctionPass.h" diff --git a/lib/Target/R600/SIInstrInfo.h b/lib/Target/R600/SIInstrInfo.h index 7454f8d687d..f2edd8cc2c1 100644 --- a/lib/Target/R600/SIInstrInfo.h +++ b/lib/Target/R600/SIInstrInfo.h @@ -270,20 +270,4 @@ enum Offsets { } // End namespace llvm -namespace SIInstrFlags { - enum Flags { - // First 4 bits are the instruction encoding - VM_CNT = 1 << 0, - EXP_CNT = 1 << 1, - LGKM_CNT = 1 << 2 - }; -} - -namespace SISrcMods { - enum { - NEG = 1 << 0, - ABS = 1 << 1 - }; -} - #endif -- 2.34.1