From 1ba00eab2630f7adaf9f1cb5dd8a2fe9c10d716e Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Tue, 7 Oct 2014 21:29:56 +0000 Subject: [PATCH] R600: Remove dead code git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219242 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/AMDGPUInstrInfo.cpp | 17 +---------------- lib/Target/R600/AMDGPUInstrInfo.h | 2 -- 2 files changed, 1 insertion(+), 18 deletions(-) diff --git a/lib/Target/R600/AMDGPUInstrInfo.cpp b/lib/Target/R600/AMDGPUInstrInfo.cpp index ef3bdb17e99..a8fc614d9b0 100644 --- a/lib/Target/R600/AMDGPUInstrInfo.cpp +++ b/lib/Target/R600/AMDGPUInstrInfo.cpp @@ -86,21 +86,6 @@ AMDGPUInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, // TODO: Implement this function return nullptr; } -bool AMDGPUInstrInfo::getNextBranchInstr(MachineBasicBlock::iterator &iter, - MachineBasicBlock &MBB) const { - while (iter != MBB.end()) { - switch (iter->getOpcode()) { - default: - break; - case AMDGPU::BRANCH_COND_i32: - case AMDGPU::BRANCH_COND_f32: - case AMDGPU::BRANCH: - return true; - }; - ++iter; - } - return false; -} void AMDGPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, @@ -352,7 +337,7 @@ int AMDGPUInstrInfo::getMaskedMIMGOp(uint16_t Opcode, unsigned Channels) const { } // Wrapper for Tablegen'd function. enum Subtarget is not defined in any -// header files, so we need to wrap it in a function that takes unsigned +// header files, so we need to wrap it in a function that takes unsigned // instead. namespace llvm { namespace AMDGPU { diff --git a/lib/Target/R600/AMDGPUInstrInfo.h b/lib/Target/R600/AMDGPUInstrInfo.h index fa56977be84..da9833d25a5 100644 --- a/lib/Target/R600/AMDGPUInstrInfo.h +++ b/lib/Target/R600/AMDGPUInstrInfo.h @@ -40,8 +40,6 @@ class MachineInstrBuilder; class AMDGPUInstrInfo : public AMDGPUGenInstrInfo { private: const AMDGPURegisterInfo RI; - bool getNextBranchInstr(MachineBasicBlock::iterator &iter, - MachineBasicBlock &MBB) const; virtual void anchor(); protected: const AMDGPUSubtarget &ST; -- 2.34.1