From 19f4e17b6d75d9303eff4c5dcdeb3c5ed633417e Mon Sep 17 00:00:00 2001 From: Chandler Carruth Date: Sun, 30 Aug 2015 05:27:31 +0000 Subject: [PATCH] Refactor the ARM target parsing to use a def file with macros to expand the necessary tables. This will allow me to restructure the code and structures using this to be significantly more efficient. It also removes the duplication of the list of several enumerators. It also enshrines that the order of enumerators match the order of the entries in the tables, something the implementation code actually uses. No functionality changed (yet). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246370 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Support/ARMTargetParser.def | 204 +++++++++++++++++++++++ include/llvm/Support/TargetParser.h | 62 +------ lib/Support/TargetParser.cpp | 178 ++------------------ 3 files changed, 222 insertions(+), 222 deletions(-) create mode 100644 include/llvm/Support/ARMTargetParser.def diff --git a/include/llvm/Support/ARMTargetParser.def b/include/llvm/Support/ARMTargetParser.def new file mode 100644 index 00000000000..d8c9a7215fe --- /dev/null +++ b/include/llvm/Support/ARMTargetParser.def @@ -0,0 +1,204 @@ +//===- ARMTargetParser.def - ARM target parsing defines ---------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file provides defines to build up the ARM target parser's logic. +// +//===----------------------------------------------------------------------===// + +// NOTE: NO INCLUDE GUARD DESIRED! + +#ifndef ARM_FPU +#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) +#endif +ARM_FPU("invalid", FK_INVALID, FV_NONE, NS_None, FR_None) +ARM_FPU("none", FK_NONE, FV_NONE, NS_None, FR_None) +ARM_FPU("vfp", FK_VFP, FV_VFPV2, NS_None, FR_None) +ARM_FPU("vfpv2", FK_VFPV2, FV_VFPV2, NS_None, FR_None) +ARM_FPU("vfpv3", FK_VFPV3, FV_VFPV3, NS_None, FR_None) +ARM_FPU("vfpv3-fp16", FK_VFPV3_FP16, FV_VFPV3_FP16, NS_None, FR_None) +ARM_FPU("vfpv3-d16", FK_VFPV3_D16, FV_VFPV3, NS_None, FR_D16) +ARM_FPU("vfpv3-d16-fp16", FK_VFPV3_D16_FP16, FV_VFPV3_FP16, NS_None, FR_D16) +ARM_FPU("vfpv3xd", FK_VFPV3XD, FV_VFPV3, NS_None, FR_SP_D16) +ARM_FPU("vfpv3xd-fp16", FK_VFPV3XD_FP16, FV_VFPV3_FP16, NS_None, FR_SP_D16) +ARM_FPU("vfpv4", FK_VFPV4, FV_VFPV4, NS_None, FR_None) +ARM_FPU("vfpv4-d16", FK_VFPV4_D16, FV_VFPV4, NS_None, FR_D16) +ARM_FPU("fpv4-sp-d16", FK_FPV4_SP_D16, FV_VFPV4, NS_None, FR_SP_D16) +ARM_FPU("fpv5-d16", FK_FPV5_D16, FV_VFPV5, NS_None, FR_D16) +ARM_FPU("fpv5-sp-d16", FK_FPV5_SP_D16, FV_VFPV5, NS_None, FR_SP_D16) +ARM_FPU("fp-armv8", FK_FP_ARMV8, FV_VFPV5, NS_None, FR_None) +ARM_FPU("neon", FK_NEON, FV_VFPV3, NS_Neon, FR_None) +ARM_FPU("neon-fp16", FK_NEON_FP16, FV_VFPV3_FP16, NS_Neon, FR_None) +ARM_FPU("neon-vfpv4", FK_NEON_VFPV4, FV_VFPV4, NS_Neon, FR_None) +ARM_FPU("neon-fp-armv8", FK_NEON_FP_ARMV8, FV_VFPV5, NS_Neon, FR_None) +ARM_FPU("crypto-neon-fp-armv8", FK_CRYPTO_NEON_FP_ARMV8, FV_VFPV5, NS_Crypto, + FR_None) +ARM_FPU("softvfp", FK_SOFTVFP, FV_NONE, NS_None, FR_None) +#undef ARM_FPU + +#ifndef ARM_ARCH +#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR) +#endif +ARM_ARCH("invalid", AK_INVALID, nullptr, nullptr, + ARMBuildAttrs::CPUArch::Pre_v4) +ARM_ARCH("armv2", AK_ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4) +ARM_ARCH("armv2a", AK_ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4) +ARM_ARCH("armv3", AK_ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4) +ARM_ARCH("armv3m", AK_ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4) +ARM_ARCH("armv4", AK_ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4) +ARM_ARCH("armv4t", AK_ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T) +ARM_ARCH("armv5t", AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T) +ARM_ARCH("armv5te", AK_ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE) +ARM_ARCH("armv5tej", AK_ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ) +ARM_ARCH("armv6", AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6) +ARM_ARCH("armv6k", AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K) +ARM_ARCH("armv6t2", AK_ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2) +ARM_ARCH("armv6z", AK_ARMV6Z, "6Z", "v6z", ARMBuildAttrs::CPUArch::v6KZ) +ARM_ARCH("armv6zk", AK_ARMV6ZK, "6ZK", "v6zk", ARMBuildAttrs::CPUArch::v6KZ) +ARM_ARCH("armv6-m", AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M) +ARM_ARCH("armv6s-m", AK_ARMV6SM, "6S-M", "v6sm", ARMBuildAttrs::CPUArch::v6S_M) +ARM_ARCH("armv7-a", AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7) +ARM_ARCH("armv7-r", AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7) +ARM_ARCH("armv7-m", AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7) +ARM_ARCH("armv7e-m", AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M) +ARM_ARCH("armv8-a", AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8) +ARM_ARCH("armv8.1-a", AK_ARMV8_1A, "8.1-A", "v8.1a", ARMBuildAttrs::CPUArch::v8) +// Non-standard Arch names. +ARM_ARCH("iwmmxt", AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE) +ARM_ARCH("iwmmxt2", AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE) +ARM_ARCH("xscale", AK_XSCALE, "xscale", "", ARMBuildAttrs::CPUArch::v5TE) +ARM_ARCH("armv5", AK_ARMV5, "5T", "v5", ARMBuildAttrs::CPUArch::v5T) +ARM_ARCH("armv5e", AK_ARMV5E, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE) +ARM_ARCH("armv6j", AK_ARMV6J, "6J", "v6", ARMBuildAttrs::CPUArch::v6) +ARM_ARCH("armv6hl", AK_ARMV6HL, "6-M", "v6hl", ARMBuildAttrs::CPUArch::v6_M) +ARM_ARCH("armv7", AK_ARMV7, "7", "v7", ARMBuildAttrs::CPUArch::v7) +ARM_ARCH("armv7l", AK_ARMV7L, "7-L", "v7l", ARMBuildAttrs::CPUArch::v7) +ARM_ARCH("armv7hl", AK_ARMV7HL, "7-L", "v7hl", ARMBuildAttrs::CPUArch::v7) +ARM_ARCH("armv7s", AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7) +ARM_ARCH("armv7k", AK_ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7) +#undef ARM_ARCH + +#ifndef ARM_ARCH_EXT_NAME +#define ARM_ARCH_EXT_NAME(NAME, ID) +#endif +ARM_ARCH_EXT_NAME("invalid", AEK_INVALID) +ARM_ARCH_EXT_NAME("none", AEK_NONE) +ARM_ARCH_EXT_NAME("crc", AEK_CRC) +ARM_ARCH_EXT_NAME("crypto", AEK_CRYPTO) +ARM_ARCH_EXT_NAME("fp", AEK_FP) +ARM_ARCH_EXT_NAME("idiv", (AEK_HWDIVARM | AEK_HWDIV)) +ARM_ARCH_EXT_NAME("mp", AEK_MP) +ARM_ARCH_EXT_NAME("simd", AEK_SIMD) +ARM_ARCH_EXT_NAME("sec", AEK_SEC) +ARM_ARCH_EXT_NAME("virt", AEK_VIRT) +ARM_ARCH_EXT_NAME("os", AEK_OS) +ARM_ARCH_EXT_NAME("iwmmxt", AEK_IWMMXT) +ARM_ARCH_EXT_NAME("iwmmxt2", AEK_IWMMXT2) +ARM_ARCH_EXT_NAME("maverick", AEK_MAVERICK) +ARM_ARCH_EXT_NAME("xscale", AEK_XSCALE) +#undef ARM_ARCH_EXT_NAME + +#ifndef ARM_HW_DIV_NAME +#define ARM_HW_DIV_NAME(NAME, ID) +#endif +ARM_HW_DIV_NAME("invalid", AEK_INVALID) +ARM_HW_DIV_NAME("none", AEK_NONE) +ARM_HW_DIV_NAME("thumb", AEK_HWDIV) +ARM_HW_DIV_NAME("arm", AEK_HWDIVARM) +ARM_HW_DIV_NAME("arm,thumb", (AEK_HWDIVARM | AEK_HWDIV)) +#undef ARM_HW_DIV_NAME + +#ifndef ARM_CPU_NAME +#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT) +#endif +ARM_CPU_NAME("arm2", AK_ARMV2, FK_NONE, true) +ARM_CPU_NAME("arm3", AK_ARMV2A, FK_NONE, true) +ARM_CPU_NAME("arm6", AK_ARMV3, FK_NONE, true) +ARM_CPU_NAME("arm7m", AK_ARMV3M, FK_NONE, true) +ARM_CPU_NAME("arm8", AK_ARMV4, FK_NONE, false) +ARM_CPU_NAME("arm810", AK_ARMV4, FK_NONE, false) +ARM_CPU_NAME("strongarm", AK_ARMV4, FK_NONE, true) +ARM_CPU_NAME("strongarm110", AK_ARMV4, FK_NONE, false) +ARM_CPU_NAME("strongarm1100", AK_ARMV4, FK_NONE, false) +ARM_CPU_NAME("strongarm1110", AK_ARMV4, FK_NONE, false) +ARM_CPU_NAME("arm7tdmi", AK_ARMV4T, FK_NONE, true) +ARM_CPU_NAME("arm7tdmi-s", AK_ARMV4T, FK_NONE, false) +ARM_CPU_NAME("arm710t", AK_ARMV4T, FK_NONE, false) +ARM_CPU_NAME("arm720t", AK_ARMV4T, FK_NONE, false) +ARM_CPU_NAME("arm9", AK_ARMV4T, FK_NONE, false) +ARM_CPU_NAME("arm9tdmi", AK_ARMV4T, FK_NONE, false) +ARM_CPU_NAME("arm920", AK_ARMV4T, FK_NONE, false) +ARM_CPU_NAME("arm920t", AK_ARMV4T, FK_NONE, false) +ARM_CPU_NAME("arm922t", AK_ARMV4T, FK_NONE, false) +ARM_CPU_NAME("arm9312", AK_ARMV4T, FK_NONE, false) +ARM_CPU_NAME("arm940t", AK_ARMV4T, FK_NONE, false) +ARM_CPU_NAME("ep9312", AK_ARMV4T, FK_NONE, false) +ARM_CPU_NAME("arm10tdmi", AK_ARMV5T, FK_NONE, true) +ARM_CPU_NAME("arm1020t", AK_ARMV5T, FK_NONE, false) +ARM_CPU_NAME("arm9e", AK_ARMV5TE, FK_NONE, false) +ARM_CPU_NAME("arm946e-s", AK_ARMV5TE, FK_NONE, false) +ARM_CPU_NAME("arm966e-s", AK_ARMV5TE, FK_NONE, false) +ARM_CPU_NAME("arm968e-s", AK_ARMV5TE, FK_NONE, false) +ARM_CPU_NAME("arm10e", AK_ARMV5TE, FK_NONE, false) +ARM_CPU_NAME("arm1020e", AK_ARMV5TE, FK_NONE, false) +ARM_CPU_NAME("arm1022e", AK_ARMV5TE, FK_NONE, true) +ARM_CPU_NAME("iwmmxt", AK_ARMV5TE, FK_NONE, false) +ARM_CPU_NAME("xscale", AK_ARMV5TE, FK_NONE, false) +ARM_CPU_NAME("arm926ej-s", AK_ARMV5TEJ, FK_NONE, true) +ARM_CPU_NAME("arm1136jf-s", AK_ARMV6, FK_VFPV2, true) +ARM_CPU_NAME("arm1176j-s", AK_ARMV6K, FK_NONE, false) +ARM_CPU_NAME("arm1176jz-s", AK_ARMV6K, FK_NONE, false) +ARM_CPU_NAME("mpcore", AK_ARMV6K, FK_VFPV2, false) +ARM_CPU_NAME("mpcorenovfp", AK_ARMV6K, FK_NONE, false) +ARM_CPU_NAME("arm1176jzf-s", AK_ARMV6K, FK_VFPV2, true) +ARM_CPU_NAME("arm1176jzf-s", AK_ARMV6Z, FK_VFPV2, true) +ARM_CPU_NAME("arm1176jzf-s", AK_ARMV6ZK, FK_VFPV2, true) +ARM_CPU_NAME("arm1156t2-s", AK_ARMV6T2, FK_NONE, true) +ARM_CPU_NAME("arm1156t2f-s", AK_ARMV6T2, FK_VFPV2, false) +ARM_CPU_NAME("cortex-m0", AK_ARMV6M, FK_NONE, true) +ARM_CPU_NAME("cortex-m0plus", AK_ARMV6M, FK_NONE, false) +ARM_CPU_NAME("cortex-m1", AK_ARMV6M, FK_NONE, false) +ARM_CPU_NAME("sc000", AK_ARMV6M, FK_NONE, false) +ARM_CPU_NAME("cortex-a5", AK_ARMV7A, FK_NEON_VFPV4, false) +ARM_CPU_NAME("cortex-a7", AK_ARMV7A, FK_NEON_VFPV4, false) +ARM_CPU_NAME("cortex-a8", AK_ARMV7A, FK_NEON, true) +ARM_CPU_NAME("cortex-a9", AK_ARMV7A, FK_NEON_FP16, false) +ARM_CPU_NAME("cortex-a12", AK_ARMV7A, FK_NEON_VFPV4, false) +ARM_CPU_NAME("cortex-a15", AK_ARMV7A, FK_NEON_VFPV4, false) +ARM_CPU_NAME("cortex-a17", AK_ARMV7A, FK_NEON_VFPV4, false) +ARM_CPU_NAME("krait", AK_ARMV7A, FK_NEON_VFPV4, false) +ARM_CPU_NAME("cortex-r4", AK_ARMV7R, FK_NONE, true) +ARM_CPU_NAME("cortex-r4f", AK_ARMV7R, FK_VFPV3_D16, false) +ARM_CPU_NAME("cortex-r5", AK_ARMV7R, FK_VFPV3_D16, false) +ARM_CPU_NAME("cortex-r7", AK_ARMV7R, FK_VFPV3_D16_FP16, false) +ARM_CPU_NAME("sc300", AK_ARMV7M, FK_NONE, false) +ARM_CPU_NAME("cortex-m3", AK_ARMV7M, FK_NONE, true) +ARM_CPU_NAME("cortex-m4", AK_ARMV7EM, FK_FPV4_SP_D16, true) +ARM_CPU_NAME("cortex-m7", AK_ARMV7EM, FK_FPV5_D16, false) +ARM_CPU_NAME("cortex-a53", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true) +ARM_CPU_NAME("cortex-a57", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false) +ARM_CPU_NAME("cortex-a72", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false) +ARM_CPU_NAME("cyclone", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false) +ARM_CPU_NAME("generic", AK_ARMV8_1A, FK_NEON_FP_ARMV8, true) +// Non-standard Arch names. +ARM_CPU_NAME("iwmmxt", AK_IWMMXT, FK_NONE, true) +ARM_CPU_NAME("xscale", AK_XSCALE, FK_NONE, true) +ARM_CPU_NAME("arm10tdmi", AK_ARMV5, FK_NONE, true) +ARM_CPU_NAME("arm1022e", AK_ARMV5E, FK_NONE, true) +ARM_CPU_NAME("arm1136j-s", AK_ARMV6J, FK_NONE, true) +ARM_CPU_NAME("arm1136jz-s", AK_ARMV6J, FK_NONE, false) +ARM_CPU_NAME("cortex-m0", AK_ARMV6SM, FK_NONE, true) +ARM_CPU_NAME("arm1176jzf-s", AK_ARMV6HL, FK_VFPV2, true) +ARM_CPU_NAME("cortex-a8", AK_ARMV7, FK_NEON, true) +ARM_CPU_NAME("cortex-a8", AK_ARMV7L, FK_NEON, true) +ARM_CPU_NAME("cortex-a8", AK_ARMV7HL, FK_NEON, true) +ARM_CPU_NAME("cortex-m4", AK_ARMV7EM, FK_NONE, true) +ARM_CPU_NAME("swift", AK_ARMV7S, FK_NEON_VFPV4, true) +// Invalid CPU +ARM_CPU_NAME("invalid", AK_INVALID, FK_INVALID, true) +#undef ARM_CPU_NAME diff --git a/include/llvm/Support/TargetParser.h b/include/llvm/Support/TargetParser.h index b8ca07ef091..433c19eff6f 100644 --- a/include/llvm/Support/TargetParser.h +++ b/include/llvm/Support/TargetParser.h @@ -32,28 +32,8 @@ namespace ARM { // FPU names. enum FPUKind { - FK_INVALID = 0, - FK_NONE, - FK_VFP, - FK_VFPV2, - FK_VFPV3, - FK_VFPV3_FP16, - FK_VFPV3_D16, - FK_VFPV3_D16_FP16, - FK_VFPV3XD, - FK_VFPV3XD_FP16, - FK_VFPV4, - FK_VFPV4_D16, - FK_FPV4_SP_D16, - FK_FPV5_D16, - FK_FPV5_SP_D16, - FK_FP_ARMV8, - FK_NEON, - FK_NEON_FP16, - FK_NEON_VFPV4, - FK_NEON_FP_ARMV8, - FK_CRYPTO_NEON_FP_ARMV8, - FK_SOFTVFP, +#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND, +#include "ARMTargetParser.def" FK_LAST }; @@ -83,42 +63,8 @@ enum FPURestriction { // Arch names. enum ArchKind { - AK_INVALID = 0, - AK_ARMV2, - AK_ARMV2A, - AK_ARMV3, - AK_ARMV3M, - AK_ARMV4, - AK_ARMV4T, - AK_ARMV5T, - AK_ARMV5TE, - AK_ARMV5TEJ, - AK_ARMV6, - AK_ARMV6K, - AK_ARMV6T2, - AK_ARMV6Z, - AK_ARMV6ZK, - AK_ARMV6M, - AK_ARMV6SM, - AK_ARMV7A, - AK_ARMV7R, - AK_ARMV7M, - AK_ARMV7EM, - AK_ARMV8A, - AK_ARMV8_1A, - // Non-standard Arch names. - AK_IWMMXT, - AK_IWMMXT2, - AK_XSCALE, - AK_ARMV5, - AK_ARMV5E, - AK_ARMV6J, - AK_ARMV6HL, - AK_ARMV7, - AK_ARMV7L, - AK_ARMV7HL, - AK_ARMV7S, - AK_ARMV7K, +#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR) ID, +#include "ARMTargetParser.def" AK_LAST }; diff --git a/lib/Support/TargetParser.cpp b/lib/Support/TargetParser.cpp index 6bdb7c772b7..53b713cb16b 100644 --- a/lib/Support/TargetParser.cpp +++ b/lib/Support/TargetParser.cpp @@ -19,6 +19,7 @@ #include using namespace llvm; +using namespace ARM; namespace { @@ -33,29 +34,9 @@ struct { ARM::NeonSupportLevel NeonSupport; ARM::FPURestriction Restriction; } FPUNames[] = { - { "invalid", ARM::FK_INVALID, ARM::FV_NONE, ARM::NS_None, ARM::FR_None}, - { "none", ARM::FK_NONE, ARM::FV_NONE, ARM::NS_None, ARM::FR_None}, - { "vfp", ARM::FK_VFP, ARM::FV_VFPV2, ARM::NS_None, ARM::FR_None}, - { "vfpv2", ARM::FK_VFPV2, ARM::FV_VFPV2, ARM::NS_None, ARM::FR_None}, - { "vfpv3", ARM::FK_VFPV3, ARM::FV_VFPV3, ARM::NS_None, ARM::FR_None}, - { "vfpv3-fp16", ARM::FK_VFPV3_FP16, ARM::FV_VFPV3_FP16, ARM::NS_None, ARM::FR_None}, - { "vfpv3-d16", ARM::FK_VFPV3_D16, ARM::FV_VFPV3, ARM::NS_None, ARM::FR_D16}, - { "vfpv3-d16-fp16", ARM::FK_VFPV3_D16_FP16, ARM::FV_VFPV3_FP16, ARM::NS_None, ARM::FR_D16}, - { "vfpv3xd", ARM::FK_VFPV3XD, ARM::FV_VFPV3, ARM::NS_None, ARM::FR_SP_D16}, - { "vfpv3xd-fp16", ARM::FK_VFPV3XD_FP16, ARM::FV_VFPV3_FP16, ARM::NS_None, ARM::FR_SP_D16}, - { "vfpv4", ARM::FK_VFPV4, ARM::FV_VFPV4, ARM::NS_None, ARM::FR_None}, - { "vfpv4-d16", ARM::FK_VFPV4_D16, ARM::FV_VFPV4, ARM::NS_None, ARM::FR_D16}, - { "fpv4-sp-d16", ARM::FK_FPV4_SP_D16, ARM::FV_VFPV4, ARM::NS_None, ARM::FR_SP_D16}, - { "fpv5-d16", ARM::FK_FPV5_D16, ARM::FV_VFPV5, ARM::NS_None, ARM::FR_D16}, - { "fpv5-sp-d16", ARM::FK_FPV5_SP_D16, ARM::FV_VFPV5, ARM::NS_None, ARM::FR_SP_D16}, - { "fp-armv8", ARM::FK_FP_ARMV8, ARM::FV_VFPV5, ARM::NS_None, ARM::FR_None}, - { "neon", ARM::FK_NEON, ARM::FV_VFPV3, ARM::NS_Neon, ARM::FR_None}, - { "neon-fp16", ARM::FK_NEON_FP16, ARM::FV_VFPV3_FP16, ARM::NS_Neon, ARM::FR_None}, - { "neon-vfpv4", ARM::FK_NEON_VFPV4, ARM::FV_VFPV4, ARM::NS_Neon, ARM::FR_None}, - { "neon-fp-armv8", ARM::FK_NEON_FP_ARMV8, ARM::FV_VFPV5, ARM::NS_Neon, ARM::FR_None}, - { "crypto-neon-fp-armv8", - ARM::FK_CRYPTO_NEON_FP_ARMV8, ARM::FV_VFPV5, ARM::NS_Crypto, ARM::FR_None}, - { "softvfp", ARM::FK_SOFTVFP, ARM::FV_NONE, ARM::NS_None, ARM::FR_None}, +#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \ + { NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION }, +#include "llvm/Support/ARMTargetParser.def" }; // List of canonical arch names (use getArchSynonym). @@ -73,42 +54,9 @@ struct { const char *SubArch; // Sub-Arch name. ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes. } ARCHNames[] = { - { "invalid", ARM::AK_INVALID, nullptr, nullptr, ARMBuildAttrs::CPUArch::Pre_v4 }, - { "armv2", ARM::AK_ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4 }, - { "armv2a", ARM::AK_ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4 }, - { "armv3", ARM::AK_ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4 }, - { "armv3m", ARM::AK_ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4 }, - { "armv4", ARM::AK_ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4 }, - { "armv4t", ARM::AK_ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T }, - { "armv5t", ARM::AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T }, - { "armv5te", ARM::AK_ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE }, - { "armv5tej", ARM::AK_ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ }, - { "armv6", ARM::AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6 }, - { "armv6k", ARM::AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K }, - { "armv6t2", ARM::AK_ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2 }, - { "armv6z", ARM::AK_ARMV6Z, "6Z", "v6z", ARMBuildAttrs::CPUArch::v6KZ }, - { "armv6zk", ARM::AK_ARMV6ZK, "6ZK", "v6zk", ARMBuildAttrs::CPUArch::v6KZ }, - { "armv6-m", ARM::AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M }, - { "armv6s-m", ARM::AK_ARMV6SM, "6S-M", "v6sm", ARMBuildAttrs::CPUArch::v6S_M }, - { "armv7-a", ARM::AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7 }, - { "armv7-r", ARM::AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7 }, - { "armv7-m", ARM::AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7 }, - { "armv7e-m", ARM::AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M }, - { "armv8-a", ARM::AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8 }, - { "armv8.1-a", ARM::AK_ARMV8_1A, "8.1-A", "v8.1a", ARMBuildAttrs::CPUArch::v8 }, - // Non-standard Arch names. - { "iwmmxt", ARM::AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE }, - { "iwmmxt2", ARM::AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE }, - { "xscale", ARM::AK_XSCALE, "xscale", "", ARMBuildAttrs::CPUArch::v5TE }, - { "armv5", ARM::AK_ARMV5, "5T", "v5", ARMBuildAttrs::CPUArch::v5T }, - { "armv5e", ARM::AK_ARMV5E, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE }, - { "armv6j", ARM::AK_ARMV6J, "6J", "v6", ARMBuildAttrs::CPUArch::v6 }, - { "armv6hl", ARM::AK_ARMV6HL, "6-M", "v6hl", ARMBuildAttrs::CPUArch::v6_M }, - { "armv7", ARM::AK_ARMV7, "7", "v7", ARMBuildAttrs::CPUArch::v7 }, - { "armv7l", ARM::AK_ARMV7L, "7-L", "v7l", ARMBuildAttrs::CPUArch::v7 }, - { "armv7hl", ARM::AK_ARMV7HL, "7-L", "v7hl", ARMBuildAttrs::CPUArch::v7 }, - { "armv7s", ARM::AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7 }, - { "armv7k", ARM::AK_ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7 } +#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR) \ + { NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR }, +#include "llvm/Support/ARMTargetParser.def" }; // List of Arch Extension names. // FIXME: TableGen this. @@ -116,21 +64,8 @@ struct { const char *Name; unsigned ID; } ARCHExtNames[] = { - { "invalid", ARM::AEK_INVALID }, - { "none", ARM::AEK_NONE }, - { "crc", ARM::AEK_CRC }, - { "crypto", ARM::AEK_CRYPTO }, - { "fp", ARM::AEK_FP }, - { "idiv", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIV) }, - { "mp", ARM::AEK_MP }, - { "simd", ARM::AEK_SIMD }, - { "sec", ARM::AEK_SEC }, - { "virt", ARM::AEK_VIRT }, - { "os", ARM::AEK_OS }, - { "iwmmxt", ARM::AEK_IWMMXT }, - { "iwmmxt2", ARM::AEK_IWMMXT2 }, - { "maverick", ARM::AEK_MAVERICK }, - { "xscale", ARM::AEK_XSCALE } +#define ARM_ARCH_EXT_NAME(NAME, ID) { NAME, ID }, +#include "llvm/Support/ARMTargetParser.def" }; // List of HWDiv names (use getHWDivSynonym) and which architectural // features they correspond to (use getHWDivFeatures). @@ -139,11 +74,8 @@ struct { const char *Name; unsigned ID; } HWDivNames[] = { - { "invalid", ARM::AEK_INVALID }, - { "none", ARM::AEK_NONE }, - { "thumb", ARM::AEK_HWDIV }, - { "arm", ARM::AEK_HWDIVARM }, - { "arm,thumb", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIV) } +#define ARM_HW_DIV_NAME(NAME, ID) { NAME, ID }, +#include "llvm/Support/ARMTargetParser.def" }; // List of CPU names and their arches. // The same CPU can have multiple arches and can be default on multiple arches. @@ -156,91 +88,9 @@ struct { ARM::FPUKind DefaultFPU; bool Default; // is $Name the default CPU for $ArchID ? } CPUNames[] = { - { "arm2", ARM::AK_ARMV2, ARM::FK_NONE, true }, - { "arm3", ARM::AK_ARMV2A, ARM::FK_NONE, true }, - { "arm6", ARM::AK_ARMV3, ARM::FK_NONE, true }, - { "arm7m", ARM::AK_ARMV3M, ARM::FK_NONE, true }, - { "arm8", ARM::AK_ARMV4, ARM::FK_NONE, false }, - { "arm810", ARM::AK_ARMV4, ARM::FK_NONE, false }, - { "strongarm", ARM::AK_ARMV4, ARM::FK_NONE, true }, - { "strongarm110", ARM::AK_ARMV4, ARM::FK_NONE, false }, - { "strongarm1100", ARM::AK_ARMV4, ARM::FK_NONE, false }, - { "strongarm1110", ARM::AK_ARMV4, ARM::FK_NONE, false }, - { "arm7tdmi", ARM::AK_ARMV4T, ARM::FK_NONE, true }, - { "arm7tdmi-s", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm710t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm720t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm9", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm9tdmi", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm920", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm920t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm922t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm9312", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm940t", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "ep9312", ARM::AK_ARMV4T, ARM::FK_NONE, false }, - { "arm10tdmi", ARM::AK_ARMV5T, ARM::FK_NONE, true }, - { "arm1020t", ARM::AK_ARMV5T, ARM::FK_NONE, false }, - { "arm9e", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm946e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm966e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm968e-s", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm10e", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm1020e", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm1022e", ARM::AK_ARMV5TE, ARM::FK_NONE, true }, - { "iwmmxt", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "xscale", ARM::AK_ARMV5TE, ARM::FK_NONE, false }, - { "arm926ej-s", ARM::AK_ARMV5TEJ, ARM::FK_NONE, true }, - { "arm1136jf-s", ARM::AK_ARMV6, ARM::FK_VFPV2, true }, - { "arm1176j-s", ARM::AK_ARMV6K, ARM::FK_NONE, false }, - { "arm1176jz-s", ARM::AK_ARMV6K, ARM::FK_NONE, false }, - { "mpcore", ARM::AK_ARMV6K, ARM::FK_VFPV2, false }, - { "mpcorenovfp", ARM::AK_ARMV6K, ARM::FK_NONE, false }, - { "arm1176jzf-s", ARM::AK_ARMV6K, ARM::FK_VFPV2, true }, - { "arm1176jzf-s", ARM::AK_ARMV6Z, ARM::FK_VFPV2, true }, - { "arm1176jzf-s", ARM::AK_ARMV6ZK, ARM::FK_VFPV2, true }, - { "arm1156t2-s", ARM::AK_ARMV6T2, ARM::FK_NONE, true }, - { "arm1156t2f-s", ARM::AK_ARMV6T2, ARM::FK_VFPV2, false }, - { "cortex-m0", ARM::AK_ARMV6M, ARM::FK_NONE, true }, - { "cortex-m0plus", ARM::AK_ARMV6M, ARM::FK_NONE, false }, - { "cortex-m1", ARM::AK_ARMV6M, ARM::FK_NONE, false }, - { "sc000", ARM::AK_ARMV6M, ARM::FK_NONE, false }, - { "cortex-a5", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, - { "cortex-a7", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, - { "cortex-a8", ARM::AK_ARMV7A, ARM::FK_NEON, true }, - { "cortex-a9", ARM::AK_ARMV7A, ARM::FK_NEON_FP16, false }, - { "cortex-a12", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, - { "cortex-a15", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, - { "cortex-a17", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, - { "krait", ARM::AK_ARMV7A, ARM::FK_NEON_VFPV4, false }, - { "cortex-r4", ARM::AK_ARMV7R, ARM::FK_NONE, true }, - { "cortex-r4f", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16, false }, - { "cortex-r5", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16, false }, - { "cortex-r7", ARM::AK_ARMV7R, ARM::FK_VFPV3_D16_FP16, false }, - { "sc300", ARM::AK_ARMV7M, ARM::FK_NONE, false }, - { "cortex-m3", ARM::AK_ARMV7M, ARM::FK_NONE, true }, - { "cortex-m4", ARM::AK_ARMV7EM, ARM::FK_FPV4_SP_D16, true }, - { "cortex-m7", ARM::AK_ARMV7EM, ARM::FK_FPV5_D16, false }, - { "cortex-a53", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, true }, - { "cortex-a57", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, false }, - { "cortex-a72", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, false }, - { "cyclone", ARM::AK_ARMV8A, ARM::FK_CRYPTO_NEON_FP_ARMV8, false }, - { "generic", ARM::AK_ARMV8_1A, ARM::FK_NEON_FP_ARMV8, true }, - // Non-standard Arch names. - { "iwmmxt", ARM::AK_IWMMXT, ARM::FK_NONE, true }, - { "xscale", ARM::AK_XSCALE, ARM::FK_NONE, true }, - { "arm10tdmi", ARM::AK_ARMV5, ARM::FK_NONE, true }, - { "arm1022e", ARM::AK_ARMV5E, ARM::FK_NONE, true }, - { "arm1136j-s", ARM::AK_ARMV6J, ARM::FK_NONE, true }, - { "arm1136jz-s", ARM::AK_ARMV6J, ARM::FK_NONE, false }, - { "cortex-m0", ARM::AK_ARMV6SM, ARM::FK_NONE, true }, - { "arm1176jzf-s", ARM::AK_ARMV6HL, ARM::FK_VFPV2, true }, - { "cortex-a8", ARM::AK_ARMV7, ARM::FK_NEON, true }, - { "cortex-a8", ARM::AK_ARMV7L, ARM::FK_NEON, true }, - { "cortex-a8", ARM::AK_ARMV7HL, ARM::FK_NEON, true }, - { "cortex-m4", ARM::AK_ARMV7EM, ARM::FK_NONE, true }, - { "swift", ARM::AK_ARMV7S, ARM::FK_NEON_VFPV4, true }, - // Invalid CPU - { "invalid", ARM::AK_INVALID, ARM::FK_INVALID, true } +#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT) \ + { NAME, ID, DEFAULT_FPU, IS_DEFAULT }, +#include "llvm/Support/ARMTargetParser.def" }; } // namespace -- 2.34.1