From 0db5862cb88523b8ea2daf7e93650ec04bf6c1d5 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Fri, 29 Jun 2007 00:01:20 +0000 Subject: [PATCH] Type of vector extract / insert index operand should be iPTR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37784 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 4c1d6ea4069..f9c19bc0f04 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -2959,7 +2959,7 @@ X86TargetLowering::LowerINSERT_VECTOR_ELT(SDOperand Op, SelectionDAG &DAG) { if (N1.getValueType() != MVT::i32) N1 = DAG.getNode(ISD::ANY_EXTEND, MVT::i32, N1); if (N2.getValueType() != MVT::i32) - N2 = DAG.getConstant(cast(N2)->getValue(), MVT::i32); + N2 = DAG.getConstant(cast(N2)->getValue(),getPointerTy()); return DAG.getNode(X86ISD::PINSRW, VT, N0, N1, N2); } else if (MVT::getSizeInBits(BaseVT) == 32) { unsigned Idx = cast(N2)->getValue(); -- 2.34.1