From 0a7ec6ced609c340fc4028aa8a65996623dd4181 Mon Sep 17 00:00:00 2001 From: Hans Wennborg Date: Wed, 3 Feb 2016 22:00:13 +0000 Subject: [PATCH 1/1] Merging r259177: ------------------------------------------------------------------------ r259177 | echristo | 2016-01-28 23:20:01 -0800 (Thu, 28 Jan 2016) | 5 lines Since LI/LIS sign extend the constant passed into the instruction we should check that the sign extended constant fits into 16-bits if we want a zero extended value, otherwise go ahead and put it together piecemeal. Fixes PR26356. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259713 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCFastISel.cpp | 5 +++-- test/CodeGen/PowerPC/fast-isel-ret.ll | 9 +++++++++ 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/lib/Target/PowerPC/PPCFastISel.cpp b/lib/Target/PowerPC/PPCFastISel.cpp index 188c8e84c64..777cc3b601c 100644 --- a/lib/Target/PowerPC/PPCFastISel.cpp +++ b/lib/Target/PowerPC/PPCFastISel.cpp @@ -2099,7 +2099,9 @@ unsigned PPCFastISel::PPCMaterializeInt(const ConstantInt *CI, MVT VT, BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ImmReg) .addImm(CI->getSExtValue()); return ImmReg; - } else if (!UseSExt && isUInt<16>(CI->getZExtValue())) { + } else if (!UseSExt && isUInt<16>(CI->getSExtValue())) { + // Since LI will sign extend the constant we need to make sure that for + // our zeroext constants that the sign extended constant fits into 16-bits. unsigned Opc = (VT == MVT::i64) ? PPC::LI8 : PPC::LI; unsigned ImmReg = createResultReg(RC); BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ImmReg) @@ -2109,7 +2111,6 @@ unsigned PPCFastISel::PPCMaterializeInt(const ConstantInt *CI, MVT VT, // Construct the constant piecewise. int64_t Imm = UseSExt ? CI->getSExtValue() : CI->getZExtValue(); - if (VT == MVT::i64) return PPCMaterialize64BitInt(Imm, RC); else if (VT == MVT::i32) diff --git a/test/CodeGen/PowerPC/fast-isel-ret.ll b/test/CodeGen/PowerPC/fast-isel-ret.ll index e05ef7d9ab8..0adb5a93510 100644 --- a/test/CodeGen/PowerPC/fast-isel-ret.ll +++ b/test/CodeGen/PowerPC/fast-isel-ret.ll @@ -186,3 +186,12 @@ entry: ; ELF64: blr ret i32 -1 } + +define zeroext i16 @ret20() nounwind { +entry: +; ELF64-LABEL: ret20 +; ELF64: lis{{.*}}0 +; ELF64: ori{{.*}}32768 +; ELF64: blr + ret i16 32768 +} -- 2.34.1