From 096d617796228293810cb0443c6617b33c5afdc5 Mon Sep 17 00:00:00 2001 From: Jack Carter Date: Tue, 15 Jan 2013 01:08:02 +0000 Subject: [PATCH] This patch fixes a Mips specific bug where we need to generate a N64 compound relocation R_MIPS_GPREL_32/R_MIPS_64/R_MIPS_NONE. The bug was exposed by the SingleSourcetest case DuffsDevice.c. Contributer: Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172496 91177308-0d34-0410-b5e6-96231b3b80d8 --- .../Mips/MCTargetDesc/MipsELFObjectWriter.cpp | 8 +++- test/MC/Mips/elf-gprel-32-64.ll | 37 +++++++++++++++++++ 2 files changed, 44 insertions(+), 1 deletion(-) create mode 100644 test/MC/Mips/elf-gprel-32-64.ll diff --git a/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp b/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp index f82e203c23c..7afb77ecb5f 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp @@ -108,7 +108,13 @@ unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target, Type = ELF::R_MIPS_64; break; case FK_GPRel_4: - Type = ELF::R_MIPS_GPREL32; + if (isN64()) { + Type = setRType((unsigned)ELF::R_MIPS_GPREL32, Type); + Type = setRType2((unsigned)ELF::R_MIPS_64, Type); + Type = setRType3((unsigned)ELF::R_MIPS_NONE, Type); + } + else + Type = ELF::R_MIPS_GPREL32; break; case Mips::fixup_Mips_GPREL16: Type = ELF::R_MIPS_GPREL16; diff --git a/test/MC/Mips/elf-gprel-32-64.ll b/test/MC/Mips/elf-gprel-32-64.ll new file mode 100644 index 00000000000..b94682214df --- /dev/null +++ b/test/MC/Mips/elf-gprel-32-64.ll @@ -0,0 +1,37 @@ +; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 %s -o - \ +; RUN: | elf-dump --dump-section-data \ +; RUN: | FileCheck %s + +define i32 @test(i32 %c) nounwind { +entry: + switch i32 %c, label %sw.default [ + i32 0, label %sw.bb + i32 1, label %sw.bb2 + i32 2, label %sw.bb5 + i32 3, label %sw.bb8 + ] + +sw.bb: + br label %return +sw.bb2: + br label %return +sw.bb5: + br label %return +sw.bb8: + br label %return +sw.default: + br label %return + +return: + %retval.0 = phi i32 [ -1, %sw.default ], [ 7, %sw.bb8 ], [ 2, %sw.bb5 ], [ 3, %sw.bb2 ], [ 1, %sw.bb ] + ret i32 %retval.0 +} + +; Check that the appropriate relocations were created. + +; R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE +; CHECK: (('sh_name', 0x{{[a-z0-9]+}}) # '.rela.rodata' +; CHECK: ('r_type3', 0x00) +; CHECK-NEXT: ('r_type2', 0x12) +; CHECK-NEXT: ('r_type', 0x0c) + -- 2.34.1