oota-llvm.git
9 years ago[opaque pointer type] Start migrating GEP creation to explicitly specify the pointee...
David Blaikie [Sat, 14 Mar 2015 01:53:18 +0000 (01:53 +0000)]
[opaque pointer type] Start migrating GEP creation to explicitly specify the pointee type

I'm just going to migrate these in a pretty ad-hoc & incremental way -
providing the backwards compatible API for now, then locally removing
it, fixing a few callers, adding it back in and commiting those callers.
Rinse, repeat.

The assertions should ensure that if I get this wrong we'll find out
about it and not just have one giant patch to revert, recommit, revert,
recommit, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232240 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd a bunch of CHECK missing colons in tests. NFC.
Ahmed Bougacha [Sat, 14 Mar 2015 01:43:57 +0000 (01:43 +0000)]
Add a bunch of CHECK missing colons in tests.  NFC.

Some wouldn't pass;  fixed most, the rest will be fixed separately.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232239 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoCommandLine: Replace cold std::sort with array_pod_sort.
Benjamin Kramer [Sat, 14 Mar 2015 00:20:13 +0000 (00:20 +0000)]
CommandLine: Replace cold std::sort with array_pod_sort.

Also replace an old use of qsort with it. Compiles down to the same thing but
gives us some type safety. Safes a couple of kb on CommandLine.o.

NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232236 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLowerBitSets: Do not export symbols for bit set referenced globals on Darwin.
Peter Collingbourne [Sat, 14 Mar 2015 00:00:49 +0000 (00:00 +0000)]
LowerBitSets: Do not export symbols for bit set referenced globals on Darwin.

The linker on that platform may re-order symbols or strip dead symbols, which
will break bit set checks. Avoid this by hiding the symbols from the linker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232235 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[dsymutil] Fix typo in comment.
Frederic Riss [Fri, 13 Mar 2015 23:55:29 +0000 (23:55 +0000)]
[dsymutil] Fix typo in comment.

Next time, when I fix a typo, I'll take the time to reread the whole
comment instead of waiting for the commit email to realize that there
is another one two words later...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232234 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[dsymutil] Fix typo in doxygen comment.
Frederic Riss [Fri, 13 Mar 2015 23:51:06 +0000 (23:51 +0000)]
[dsymutil] Fix typo in doxygen comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232233 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[dsymutil] Implement DW_AT_ranges linking.
Frederic Riss [Fri, 13 Mar 2015 23:30:31 +0000 (23:30 +0000)]
[dsymutil] Implement DW_AT_ranges linking.

Nothing fancy, just a straightforward offset to apply to the original
debug_ranges entries to get them in line with the linked addresses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232232 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[dsymutil] Move a function declaration closer to its peers.
Frederic Riss [Fri, 13 Mar 2015 23:30:27 +0000 (23:30 +0000)]
[dsymutil] Move a function declaration closer to its peers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232231 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDWARFDebugRangeList: make the list of entries available to clients.
Frederic Riss [Fri, 13 Mar 2015 23:30:07 +0000 (23:30 +0000)]
DWARFDebugRangeList: make the list of entries available to clients.

For users like llvm-dsymutil that want to have access to the encoded
debug_ranges entries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232230 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse add32ri8 and friends on fast isel.
Rafael Espindola [Fri, 13 Mar 2015 22:18:18 +0000 (22:18 +0000)]
Use add32ri8 and friends on fast isel.

This fixes pr22854.

The core issue on the bug is that there are multiple instructions that
print the same in assembly. In fact, there doesn't seem to be any
syntax for specifying that a constant that fits in 8 bits should use a 32 bit
immediate.

The attached patch changes fast isel to consider i16immSExt8,
i32immSExt8, and i64immSExt8. They were disabled because fastisel didn’t know
to call the predicate back in the day.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232223 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agobpf: turn on HasJIT flag in BPF backend
Alexei Starovoitov [Fri, 13 Mar 2015 22:03:25 +0000 (22:03 +0000)]
bpf: turn on HasJIT flag in BPF backend

basic tests that use BPF backend to produce code in memory are passing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232222 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoBe lazy about loading metadata in IRObjectFile.
Rafael Espindola [Fri, 13 Mar 2015 21:54:20 +0000 (21:54 +0000)]
Be lazy about loading metadata in IRObjectFile.

This speeds up llvm-ar building lib64/libclangSema.a with debug IR files
from 8.658015807 seconds to just 0.351036519 seconds :-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232221 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoBranchFolding: MergePotentialsElt has a total order, just call array_pod_sort.
Benjamin Kramer [Fri, 13 Mar 2015 21:17:02 +0000 (21:17 +0000)]
BranchFolding: MergePotentialsElt has a total order, just call array_pod_sort.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232217 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[opaque pointer type] Bitcode support for explicit type parameter on the gep operator
David Blaikie [Fri, 13 Mar 2015 21:03:36 +0000 (21:03 +0000)]
[opaque pointer type] Bitcode support for explicit type parameter on the gep operator

This happened to be fairly easy to support backwards compatibility based
on the number of operands (old format had an even number, new format has
one more operand so an odd number).

test/Bitcode/old-aliases.ll already appears to test old gep operators
(if I remove the backwards compatibility in the BitcodeReader, this and
another test fail) so I'm not adding extra test coverage here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232216 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTurn assertion into bitcode reading error
David Blaikie [Fri, 13 Mar 2015 21:03:34 +0000 (21:03 +0000)]
Turn assertion into bitcode reading error

I don't think we test invalid bitcode records in any detail, so no test
here - just a change for consistency with existing error checks in
surrounding code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232215 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSimplify expression
David Blaikie [Fri, 13 Mar 2015 21:03:30 +0000 (21:03 +0000)]
Simplify expression

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232214 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReapply "[Reassociate] Add initial support for vector instructions."
Robert Lougher [Fri, 13 Mar 2015 20:53:01 +0000 (20:53 +0000)]
Reapply "[Reassociate] Add initial support for vector instructions."

This reapplies the patch previously committed at revision 232190.  This was
reverted at revision 232196 as it caused test failures in tests that did not
expect operands to be commuted.  I have made the tests more resilient to
reassociation in revision 232206.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232209 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agobpf: fix build
Alexei Starovoitov [Fri, 13 Mar 2015 20:49:38 +0000 (20:49 +0000)]
bpf: fix build

fix missed bits which were left over after r231987

Signed-off-by: Alexei Starovoitov <ast@plumgrid.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232208 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoinstcombine: alloca: Canonicalize scalar allocation array size
Duncan P. N. Exon Smith [Fri, 13 Mar 2015 19:42:09 +0000 (19:42 +0000)]
instcombine: alloca: Canonicalize scalar allocation array size

As a follow-up to r232200, add an `-instcombine` to canonicalize scalar
allocations to `i32 1`.  Since r232200, `iX 1` (for X != 32) are only
created by RAUWs, so this shouldn't fire too often.  Nevertheless, it's
a cheap check and a nice cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232202 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoinstcombine: alloca: Limit array size type promotion
Duncan P. N. Exon Smith [Fri, 13 Mar 2015 19:34:55 +0000 (19:34 +0000)]
instcombine: alloca: Limit array size type promotion

Move type promotion of the size of the array allocation to the end of
`simplifyAllocaArraySize()`.  This avoids promoting the type of the
array size if it's a `ConstantInt`, since the next -instcombine
iteration will drop it to a scalar allocation anyway.  Similarly, this
avoids promoting the type if it's an `UndefValue`, in which case the
alloca gets RAUW'ed.

This is NFC when considered over the lifetime of -instcombine, since
it's just reducing the number of iterations needed to reach fixed point.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232201 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAsmWriter: Write alloca array size explicitly (and -instcombine fixup)
Duncan P. N. Exon Smith [Fri, 13 Mar 2015 19:30:44 +0000 (19:30 +0000)]
AsmWriter: Write alloca array size explicitly (and -instcombine fixup)

Write the `alloca` array size explicitly when it's non-canonical.
Previously, if the array size was `iX 1` (where X is not 32), the type
would mutate to `i32` when round-tripping through assembly.

The testcase I added fails in `verify-uselistorder` (as well as
`FileCheck`), since the use-lists for `i32 1` and `i64 1` change.
(Manman Ren came across this when running `verify-uselistorder` on some
non-trivial, optimized code as part of PR5680.)

The type mutation started with r104911, which allowed array sizes to be
something other than an `i32`.  Starting with r204945, we
"canonicalized" to `i64` on 64-bit platforms -- and then on every
round-trip through assembly, mutated back to `i32`.

I bundled a fixup for `-instcombine` to avoid r204945 on scalar
allocations.  (There wasn't a clean way to sequence this into two
commits, since the assembly change on its own caused testcase churn, and
the `-instcombine` change can't be tested without the assembly changes.)

An obvious alternative fix -- change `AllocaInst::AllocaInst()`,
`AsmWriter` and `LLParser` to treat `intptr_t` as the canonical type for
scalar allocations -- was rejected out of hand, since this required
teaching them each about the data layout.

A follow-up commit will add an `-instcombine` to canonicalize the scalar
allocation array size to `i32 1` rather than leaving `iX 1` alone.

rdar://problem/20075773

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232200 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoinstcombine: alloca: Remove nesting in simplifyAllocaArraySize(), NFC
Duncan P. N. Exon Smith [Fri, 13 Mar 2015 19:26:33 +0000 (19:26 +0000)]
instcombine: alloca: Remove nesting in simplifyAllocaArraySize(), NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232199 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd a parameter for getLazyBitcodeModule to lazily load Metadata.
Manman Ren [Fri, 13 Mar 2015 19:24:30 +0000 (19:24 +0000)]
Add a parameter for getLazyBitcodeModule to lazily load Metadata.

We only defer loading metadata inside ParseModule when ShouldLazyLoadMetadata
is true and we have not loaded any Metadata block yet.

This commit implements all-or-nothing loading of Metadata. If there is a
request to load any metadata block, we will load all deferred metadata blocks.

We make sure the deferred metadata blocks are loaded before we materialize any
function or a module.

The default value of the added parameter ShouldLazyLoadMetadata for
getLazyBitcodeModule is false, so the default behavior stays the same.

We only set the parameter to true when creating LTOModule in local contexts.
These can only really be used for parsing symbols, so it's unnecessary to ever
load the metadata blocks.

If we are going to enable lazy-loading of Metadata for other usages of
getLazyBitcodeModule, where deferred metadata blocks need to be loaded, we can
expose BitcodeReader::materializeMetadata to Module, similar to
Module::materialize.

rdar://19804575

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232198 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoinstcombine: alloca: Split out simplifyAllocaArraySize(), NFC
Duncan P. N. Exon Smith [Fri, 13 Mar 2015 19:22:03 +0000 (19:22 +0000)]
instcombine: alloca: Split out simplifyAllocaArraySize(), NFC

Follow-up commits will change some of the logic here.  Splitting into a
separate function simplifies the logic by allowing early returns instead
of deeper nesting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232197 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert: "[Reassociate] Add initial support for vector instructions."
Robert Lougher [Fri, 13 Mar 2015 19:20:46 +0000 (19:20 +0000)]
Revert: "[Reassociate] Add initial support for vector instructions."

This reverts revision 232190 due to buildbot failure reported on clang-hexagon-elf
for test arm64_vtst.c.  To be investigated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232196 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoImprove wording of newline handling.
Joerg Sonnenberger [Fri, 13 Mar 2015 19:05:24 +0000 (19:05 +0000)]
Improve wording of newline handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232195 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[dsymutil] Fix handling of cross-cu forward references.
Frederic Riss [Fri, 13 Mar 2015 18:35:57 +0000 (18:35 +0000)]
[dsymutil] Fix handling of cross-cu forward references.

We recorded the forward references in the CU that holds the referenced
DIE, but this is wrong as those will get resoled *after* the CU that
holds the reference. Record the references in their originating CU along
with a pointer to the remote CU to be able to compute the fixed up
offset at the right time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232193 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[dsymutil] Add relocation of compile_units low_pc/high_pc.
Frederic Riss [Fri, 13 Mar 2015 18:35:54 +0000 (18:35 +0000)]
[dsymutil] Add relocation of compile_units low_pc/high_pc.

They need to be handled specifically as they could vary pretty
widely depending on how the linker moves functions around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232192 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[dsymutil] Fix location cloning for newer dwarf versions.
Frederic Riss [Fri, 13 Mar 2015 18:35:39 +0000 (18:35 +0000)]
[dsymutil] Fix location cloning for newer dwarf versions.

The typo got unnoticed because we were testing only on Dwarf 2. Add a
Dwarf4 test that exercises the code path, and also tests some newer
FORMs that the other test doesn't cover.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232191 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Reassociate] Add initial support for vector instructions.
Robert Lougher [Fri, 13 Mar 2015 18:33:27 +0000 (18:33 +0000)]
[Reassociate] Add initial support for vector instructions.

This patch adds initial support for vector instructions to the reassociation
pass. It enables most parts of the pass to work with vectors but to keep the
size of the patch small, optimization of Xor trees, canonicalization of
negative constants and converting shifts to muls, etc., have been left out.
This will be handled in later patches.

The patch is based on an initial patch by Chad Rosier.

Differential Revision: http://reviews.llvm.org/D7566

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232190 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SCEV] Fix PR22856.
Sanjoy Das [Fri, 13 Mar 2015 18:31:19 +0000 (18:31 +0000)]
[SCEV] Fix PR22856.

Summary:
ScalarEvolutionExpander assumes that the header block of a loop is a
legal place to have a use for a phi node.  This is true only for phis
that are either in the header or dominate the header block, but it is
not true for phi nodes that are strictly internal to the loop body.

This change teaches ScalarEvolutionExpander to place uses of PHI nodes
in the basic block the PHI nodes belong to.  This is always legal, and
`hoistIVInc` ensures that the said position dominates `IsomorphicInc`.

Reviewers: atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8311

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232189 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
David Blaikie [Fri, 13 Mar 2015 18:20:45 +0000 (18:20 +0000)]
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator

Similar to gep (r230786) and load (r230794) changes.

Similar migration script can be used to update test cases, which
successfully migrated all of LLVM and Polly, but about 4 test cases
needed manually changes in Clang.

(this script will read the contents of stdin and massage it into stdout
- wrap it in the 'apply.sh' script shown in previous commits + xargs to
apply it over a large set of test cases)

import fileinput
import sys
import re

rep = re.compile(r"(getelementptr(?:\s+inbounds)?\s*\()((<\d*\s+x\s+)?([^@]*?)(|\s*addrspace\(\d+\))\s*\*(?(3)>)\s*)(?=$|%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|zeroinitializer|<|\[\[[a-zA-Z]|\{\{)", re.MULTILINE | re.DOTALL)

def conv(match):
  line = match.group(1)
  line += match.group(4)
  line += ", "
  line += match.group(2)
  return line

line = sys.stdin.read()
off = 0
for match in re.finditer(rep, line):
  sys.stdout.write(line[off:match.start()])
  sys.stdout.write(conv(match))
  off = match.end()
sys.stdout.write(line[off:])

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232184 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd the option, -non-verbose to llvm-objdump used with -macho to print things
Kevin Enderby [Fri, 13 Mar 2015 17:56:32 +0000 (17:56 +0000)]
Add the option, -non-verbose to llvm-objdump used with -macho to print things
using numeric values and not their symbolic constant names.

The routines that print Mach-O stuff already had a verbose parameter and this
change is just changing the passing true to passing !NonVerbose.  With just a
couple of fixes and a bunch of test case updates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232182 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agor600: Clear visited structure before running.
Jan Vesely [Fri, 13 Mar 2015 17:32:46 +0000 (17:32 +0000)]
r600: Clear visited structure before running.

Fixes random crashes in for-loop piglit.

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Matt Arsenault <Matthew.Arsenault@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232181 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agor600: Use deque and simplify loops in AMDGPUCFGStructurizer
Jan Vesely [Fri, 13 Mar 2015 17:32:43 +0000 (17:32 +0000)]
r600: Use deque and simplify loops in AMDGPUCFGStructurizer

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Matt Arsenault <Matthew.Arsenault@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232180 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86][AVX] Fix wrong lowering of v4x64 shuffles into concat_vector plus extract_subve...
Andrea Di Biagio [Fri, 13 Mar 2015 17:29:49 +0000 (17:29 +0000)]
[X86][AVX] Fix wrong lowering of v4x64 shuffles into concat_vector plus extract_subvector nodes.

This patch fixes a bug in the shuffle lowering logic implemented by function
'lowerV2X128VectorShuffle'.

The are few cases where function 'lowerV2X128VectorShuffle' wrongly expands a
shuffle of two v4X64 vectors into a CONCAT_VECTORS of two EXTRACT_SUBVECTOR
nodes. The problematic expansion only occurs when the shuffle mask M has an
'undef' element at position 2, and M is equivalent to mask <0,1,4,5>.
In that case, the algorithm propagates the wrong vector to one of the two
new EXTRACT_SUBVECTOR nodes.

Example:
;;
define <4 x double> @test(<4 x double> %A, <4 x double> %B) {
entry:
  %0 = shufflevector <4 x double> %A, <4 x double> %B, <4 x i32><i32 undef, i32 1, i32 undef, i32 5>
  ret <4 x double> %0
}
;;

Before this patch, llc (-mattr=+avx) generated:
  vinsertf128 $1, %xmm0, %ymm0, %ymm0

With this patch, llc correctly generates:
  vinsertf128 $1, %xmm1, %ymm0, %ymm0

Added test lower-vec-shuffle-bug.ll

Differential Revision: http://reviews.llvm.org/D8259

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232179 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agounique_ptrs are unique already, no need to unique them any further.
Benjamin Kramer [Fri, 13 Mar 2015 16:59:29 +0000 (16:59 +0000)]
unique_ptrs are unique already, no need to unique them any further.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232178 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Add test for min / max with immediate
Matt Arsenault [Fri, 13 Mar 2015 16:43:48 +0000 (16:43 +0000)]
R600/SI: Add test for min / max with immediate

Make sure this isn't getting confused by canonicalizations
of comparisons with a constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232177 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoConstantFold: Fix big shift constant folding
David Majnemer [Fri, 13 Mar 2015 16:39:46 +0000 (16:39 +0000)]
ConstantFold: Fix big shift constant folding

Constant folding for shift IR instructions ignores all bits above 32 of
second argument (shift amount).
Because of that, some undef results are not recognized and APInt can
raise an assert failure if second argument has more than 64 bits.

Patch by PaweĹ‚ Bylica!

Differential Revision: http://reviews.llvm.org/D7701

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232176 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRecommit r232027 with PR22883 fixed: Add infrastructure for support of multiple memor...
Daniel Sanders [Fri, 13 Mar 2015 12:45:09 +0000 (12:45 +0000)]
Recommit r232027 with PR22883 fixed: Add infrastructure for support of multiple memory constraints.

The operand flag word for ISD::INLINEASM nodes now contains a 15-bit
memory constraint ID when the operand kind is Kind_Mem. This constraint
ID is a numeric equivalent to the constraint code string and is converted
with a target specific hook in TargetLowering.

This patch maps all memory constraints to InlineAsm::Constraint_m so there
is no functional change at this point. It just proves that using these
previously unused bits in the encoding of the flag word doesn't break
anything.

The next patch will make each target preserve the current mapping of
everything to Constraint_m for itself while changing the target independent
implementation of the hook to return Constraint_Unknown appropriately. Each
target will then be adapted in separate patches to use appropriate
Constraint_* values.

PR22883 was caused the matching operands copying the whole of the operand flags
for the matched operand. This included the constraint id which needed to be
replaced with the operand number. This has been fixed with a conversion
function. Following on from this, matching operands also used the operand
number as the constraint id. This has been fixed by looking up the matched
operand and taking it from there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232165 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] [IAS] Refactor MipsTargetStreamer::emitMipsAbiFlags(). NFC.
Toma Tabacu [Fri, 13 Mar 2015 11:40:01 +0000 (11:40 +0000)]
[mips] [IAS] Refactor MipsTargetStreamer::emitMipsAbiFlags(). NFC.

Summary: Make emitMipsAbiFlags a direct member of MipsTargetELFStreamer, as that's the only place where it's used, and remove the empty implementations from MipsTargetStreamer and MipsTargetAsmStreamer.

Reviewers: dsanders, rafael

Reviewed By: rafael

Subscribers: rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D8199

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232161 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTeach TBAA analysis to report errors on cyclic TBAA metadata rather than hanging.
Owen Anderson [Fri, 13 Mar 2015 07:09:33 +0000 (07:09 +0000)]
Teach TBAA analysis to report errors on cyclic TBAA metadata rather than hanging.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232144 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix an infinite recursion in the verifier caused by calling isSized on a recursive...
Owen Anderson [Fri, 13 Mar 2015 06:41:26 +0000 (06:41 +0000)]
Fix an infinite recursion in the verifier caused by calling isSized on a recursive type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232143 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[MachineCopyPropagation] Fix a bug causing incorrect removal for the instruction...
Hao Liu [Fri, 13 Mar 2015 05:15:23 +0000 (05:15 +0000)]
[MachineCopyPropagation] Fix a bug causing incorrect removal for the instruction sequences as follows
   %Q5_Q6<def> = COPY %Q2_Q3
   %D5<def> =
   %D3<def> =
   %D3<def> = COPY %D6     // Incorrectly removed in MachineCopyPropagation
   Using of %D3 results in incorrect result ...

   Reviewed in http://reviews.llvm.org/D8242

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232142 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix build break in this code. Nothing uses this header, but the modules
Richard Smith [Fri, 13 Mar 2015 03:56:27 +0000 (03:56 +0000)]
Fix build break in this code. Nothing uses this header, but the modules
buildbot builds it anyway and was angry because of this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232139 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUpdating GettingStarted documentation to reference CMake as the preferred way to...
Chris Bieneman [Fri, 13 Mar 2015 01:58:14 +0000 (01:58 +0000)]
Updating GettingStarted documentation to reference CMake as the preferred way to build LLVM.

Reviewers: chandlerc, samsonov, echristo

Reviewed By: samsonov

Subscribers: emaste, joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D8046

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232135 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoWhen forming an addrec out of a phi don't just look at the last computation and steal...
Nick Lewycky [Fri, 13 Mar 2015 01:37:52 +0000 (01:37 +0000)]
When forming an addrec out of a phi don't just look at the last computation and steal its flags for our own, there may be other computations in the middle. Check whether the LHS of the computation is the phi itself and then we know it's safe to steal the flags. Fixes PR22795.

There's a missed optimization opportunity where we could look at the full chain of computation and take the intersection of the flags instead of only looking one instruction deep.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232134 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse the variable names from the TargetInstrInfo source when we
Eric Christopher [Fri, 13 Mar 2015 01:26:39 +0000 (01:26 +0000)]
Use the variable names from the TargetInstrInfo source when we
reference them in the generated files. A few characters aren't huge
here and CFSetupOpcode is much more readable than S0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232132 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd a return after the llvm namespace code for a little extra
Eric Christopher [Fri, 13 Mar 2015 01:10:08 +0000 (01:10 +0000)]
Add a return after the llvm namespace code for a little extra
readability in generated files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232131 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse the cached subtarget off of the machine function.
Eric Christopher [Fri, 13 Mar 2015 00:49:50 +0000 (00:49 +0000)]
Use the cached subtarget off of the machine function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232129 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse the cached subtarget off of the machine function.
Eric Christopher [Fri, 13 Mar 2015 00:38:19 +0000 (00:38 +0000)]
Use the cached subtarget off of the machine function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232128 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86, AVX2] Replace inserti128 and extracti128 intrinsics with generic shuffles
Sanjay Patel [Thu, 12 Mar 2015 23:16:18 +0000 (23:16 +0000)]
[X86, AVX2] Replace inserti128 and extracti128 intrinsics with generic shuffles

This should complete the job started in r231794 and continued in r232045:
We want to replace as much custom x86 shuffling via intrinsics
as possible because pushing the code down the generic shuffle
optimization path allows for better codegen and less complexity
in LLVM.

AVX2 introduced proper integer variants of the hacked integer insert/extract
C intrinsics that were created for this same functionality with AVX1.

This should complete the removal of insert/extract128 intrinsics.

The Clang precursor patch for this change was checked in at r232109.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232120 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMove a variable into the assert where it's used - fixes a -Asserts
Eric Christopher [Thu, 12 Mar 2015 23:13:03 +0000 (23:13 +0000)]
Move a variable into the assert where it's used - fixes a -Asserts
build warning/error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232119 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoIn preparation for moving ARM's TargetRegisterInfo to the TargetMachine
Eric Christopher [Thu, 12 Mar 2015 22:48:50 +0000 (22:48 +0000)]
In preparation for moving ARM's TargetRegisterInfo to the TargetMachine
merge Thumb1RegisterInfo and Thumb2RegisterInfo. This will enable
us to match the TargetMachine for our TargetRegisterInfo classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232117 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemoved useless palignr test - we don't actually provide a llvm.x86.ssse3.palign...
Simon Pilgrim [Thu, 12 Mar 2015 21:42:03 +0000 (21:42 +0000)]
Removed useless palignr test - we don't actually provide a llvm.x86.ssse3.palign.r.128 intrinsic

Differential Revision: http://reviews.llvm.org/D8302

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232108 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Don't print scc reg in sopc assembly string
Tom Stellard [Thu, 12 Mar 2015 21:34:28 +0000 (21:34 +0000)]
R600/SI: Don't print scc reg in sopc assembly string

This is how the proprietary driver prints sopc instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232106 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Remove _e32 and _e64 suffixes from mnemonics
Tom Stellard [Thu, 12 Mar 2015 21:34:22 +0000 (21:34 +0000)]
R600/SI: Remove _e32 and _e64 suffixes from mnemonics

Instead print them as part of the $dst operand.  The AsmMatcher
requires the 32-bit and 64-bit encodings have the same mnemonic in
order to parse them correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232105 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdding WinEHPrepare tests (currently XFAILs)
Andrew Kaylor [Thu, 12 Mar 2015 21:32:59 +0000 (21:32 +0000)]
Adding WinEHPrepare tests (currently XFAILs)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232104 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMigrate the AArch64 TargetRegisterInfo to its TargetMachine
Eric Christopher [Thu, 12 Mar 2015 21:04:46 +0000 (21:04 +0000)]
Migrate the AArch64 TargetRegisterInfo to its TargetMachine
implementation. This requires a bit of scaffolding and a few fixups
that'll go away once all of the ports have been migrated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232103 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove unused headers.
Eric Christopher [Thu, 12 Mar 2015 21:04:42 +0000 (21:04 +0000)]
Remove unused headers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232102 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUnxfail passing test on Hexagon
Krzysztof Parzyszek [Thu, 12 Mar 2015 20:38:10 +0000 (20:38 +0000)]
Unxfail passing test on Hexagon

test/CodeGen/Generic/2008-02-20-MatchingMem.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232098 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "r232027 - Add infrastructure for support of multiple memory constraints"
Hal Finkel [Thu, 12 Mar 2015 20:09:39 +0000 (20:09 +0000)]
Revert "r232027 - Add infrastructure for support of multiple memory constraints"

This (r232027) has caused PR22883; so it seems those bits might be used by
something else after all. Reverting until we can figure out what else to do.

Original commit message:

The operand flag word for ISD::INLINEASM nodes now contains a 15-bit
memory constraint ID when the operand kind is Kind_Mem. This constraint
ID is a numeric equivalent to the constraint code string and is converted
with a target specific hook in TargetLowering.

This patch maps all memory constraints to InlineAsm::Constraint_m so there
is no functional change at this point. It just proves that using these
previously unused bits in the encoding of the flag word doesn't break anything.

The next patch will make each target preserve the current mapping of
everything to Constraint_m for itself while changing the target independent
implementation of the hook to return Constraint_Unknown appropriately. Each
target will then be adapted in separate patches to use appropriate Constraint_*
values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232093 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[autoconf] Fix the build failure by quoting the strings.
Logan Chien [Thu, 12 Mar 2015 19:56:25 +0000 (19:56 +0000)]
[autoconf] Fix the build failure by quoting the strings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232090 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86] Fix a regression introduced by r223641.
Quentin Colombet [Thu, 12 Mar 2015 19:34:12 +0000 (19:34 +0000)]
[X86] Fix a regression introduced by r223641.
The permps and permd instructions have their operands swapped compared to the
intrinsic definition. Therefore, they do not fall into the INTR_TYPE_2OP
category.

I did not create a new category for those two, as they are the only one AFAICT
in that case.

<rdar://problem/20108262>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232085 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReapply "[dsymutil] Gather function ranges during DIE selection."
Frederic Riss [Thu, 12 Mar 2015 18:45:10 +0000 (18:45 +0000)]
Reapply "[dsymutil] Gather function ranges during DIE selection."

This reverts commit r231967 which reinstates r231957.

Now that IntervalMap uses explicitely aligned storage, it should be safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232080 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ADT] IntervalMap: use AlignedCharArrayUnion.
Frederic Riss [Thu, 12 Mar 2015 18:45:07 +0000 (18:45 +0000)]
[ADT] IntervalMap: use AlignedCharArrayUnion.

Currently IntervalMap would assert when used with keys bigger than host
pointers. This patch uses the AlignedCharArrayUnion functionality to
overcome that limitation.

Differential Revision: http://reviews.llvm.org/D8268

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232079 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd missing include guards.
Yaron Keren [Thu, 12 Mar 2015 18:39:54 +0000 (18:39 +0000)]
Add missing include guards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232078 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix comment formatting.
Eric Christopher [Thu, 12 Mar 2015 18:23:01 +0000 (18:23 +0000)]
Fix comment formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232076 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove the need to cache the subtarget in the X86 TargetRegisterInfo
Eric Christopher [Thu, 12 Mar 2015 17:54:19 +0000 (17:54 +0000)]
Remove the need to cache the subtarget in the X86 TargetRegisterInfo
classes. Use a Triple instead and simplify a lot of the querying
logic to use lookups on the Triple.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232071 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRefactoring CMake CrossCompile module.
Chris Bieneman [Thu, 12 Mar 2015 17:33:34 +0000 (17:33 +0000)]
Refactoring CMake CrossCompile module.

* put most of the cross-compiling support into a function llvm_create_cross_target_internal.
* when CrossCompile is included it still generates a NATIVE target.
* llvm_create_cross_target function takes a target_name which should match a toolchain.
* llvm_create_cross_target can now be used to target more than one cross-compilation target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232067 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[docs] Update the doxygen configuration file.
Logan Chien [Thu, 12 Mar 2015 17:26:27 +0000 (17:26 +0000)]
[docs] Update the doxygen configuration file.

Update the doxygen configuration file and Makefile build rules
to provide better output (simply use the default stylesheet and template
from the Doxygen distribution.)

This CL has upgrade doxygen.cfg.in to Doxygen 1.8.6.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232064 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[autoconf] Regenerate autoconf configure script.
Logan Chien [Thu, 12 Mar 2015 17:25:25 +0000 (17:25 +0000)]
[autoconf] Regenerate autoconf configure script.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232063 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[autoconf] Refine doxygen document options.
Logan Chien [Thu, 12 Mar 2015 17:25:01 +0000 (17:25 +0000)]
[autoconf] Refine doxygen document options.

This CL adds --enable-doxygen-search to enable doxygen search engine
and --enable-doxygen-qt-help to enable the Qt help file generation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232062 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove unused complex patterns for addressing modes on Hexagon.
Krzysztof Parzyszek [Thu, 12 Mar 2015 16:44:50 +0000 (16:44 +0000)]
Remove unused complex patterns for addressing modes on Hexagon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232057 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agomake an array of constants explicitly const
Sanjay Patel [Thu, 12 Mar 2015 16:29:58 +0000 (16:29 +0000)]
make an array of constants explicitly const

Suggested by Craig Topper in D8184.

This goes with r232047.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232056 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDoing some cleanup to the iOS toolchain.
Chris Bieneman [Thu, 12 Mar 2015 16:19:16 +0000 (16:19 +0000)]
Doing some cleanup to the iOS toolchain.

* There is no reason to require SDKROOT as an environment variable because we can derive it from xcrun
* Setting CMAKE_RANLIB makes our static archives usable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232053 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoIRBuilder: add a CreateShuffleVector function that takes an ArrayRef of int
Sanjay Patel [Thu, 12 Mar 2015 15:27:07 +0000 (15:27 +0000)]
IRBuilder: add a CreateShuffleVector function that takes an ArrayRef of int

This is a convenience function to ease mask creation of ShuffleVectors
in AutoUpgrade and other places.

Differential Revision: http://reviews.llvm.org/D8184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232047 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86] Fix wrong target specific combine on SETCC nodes.
Andrea Di Biagio [Thu, 12 Mar 2015 15:16:58 +0000 (15:16 +0000)]
[X86] Fix wrong target specific combine on SETCC nodes.

Part of the folding logic implemented by function 'PerformISDSETCCCombine'
only worked under the assumption that the condition code in input could have
been either SETNE or SETEQ.
Unfortunately that assumption was incorrect, and in some cases the algorithm
ended up incorrectly folding SETCC nodes.

The incorrect folding only affected SETCC dag nodes where:
 - one of the operands was a build_vector of all zeroes;
 - the other operand was a SIGN_EXTEND from a vector of MVT:i1 elements;
 - the condition code was neither SETNE nor SETEQ.

Example:
  (setcc (v4i32 (sign_extend v4i1:%A)), (v4i32 VectorOfAllZeroes), setge)

Before this patch, the entire dag node sequence from the example was
incorrectly folded to node %A.

With this patch, the dag node sequence is folded to a
  (xor %A, (v4i1 VectorOfAllOnes)).

Added test setcc-combine.ll.

Thanks to Greg Bedwell for spotting this issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232046 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86, AVX] replace vextractf128 intrinsics with generic shuffles
Sanjay Patel [Thu, 12 Mar 2015 15:15:19 +0000 (15:15 +0000)]
[X86, AVX] replace vextractf128 intrinsics with generic shuffles

Now that we've replaced the vinsertf128 intrinsics,
do the same for their extract twins.

This is very much like D8086 (checked in at r231794):
We want to replace as much custom x86 shuffling via intrinsics
as possible because pushing the code down the generic shuffle
optimization path allows for better codegen and less complexity
in LLVM.

This is also the LLVM sibling to the cfe D8275 patch.

Differential Revision: http://reviews.llvm.org/D8276

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232045 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSilencing an "enumeral and non-enumeral type in conditional expression" warning;...
Aaron Ballman [Thu, 12 Mar 2015 13:24:06 +0000 (13:24 +0000)]
Silencing an "enumeral and non-enumeral type in conditional expression" warning; NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232035 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86][AVX2] Added missing palignr stack folding test
Simon Pilgrim [Thu, 12 Mar 2015 13:12:33 +0000 (13:12 +0000)]
[X86][AVX2] Added missing palignr stack folding test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232033 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd infrastructure for support of multiple memory constraints.
Daniel Sanders [Thu, 12 Mar 2015 11:00:48 +0000 (11:00 +0000)]
Add infrastructure for support of multiple memory constraints.

Summary:
The operand flag word for ISD::INLINEASM nodes now contains a 15-bit
memory constraint ID when the operand kind is Kind_Mem. This constraint
ID is a numeric equivalent to the constraint code string and is converted
with a target specific hook in TargetLowering.

This patch maps all memory constraints to InlineAsm::Constraint_m so there
is no functional change at this point. It just proves that using these
previously unused bits in the encoding of the flag word doesn't break anything.

The next patch will make each target preserve the current mapping of
everything to Constraint_m for itself while changing the target independent
implementation of the hook to return Constraint_Unknown appropriately. Each
target will then be adapted in separate patches to use appropriate Constraint_*
values.

Reviewers: hfinkel

Reviewed By: hfinkel

Subscribers: hfinkel, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D8171

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232027 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Object/ELF] Add support for setVisibility()
Davide Italiano [Thu, 12 Mar 2015 07:48:25 +0000 (07:48 +0000)]
[Object/ELF] Add support for setVisibility()

This is a prerequisite to implement symbol visibility for ELF
in lld.

Differential Revision: http://reviews.llvm.org/D8279

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232020 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: Added encoding tests for VPROR, VPROL instructions,
Elena Demikhovsky [Thu, 12 Mar 2015 07:28:41 +0000 (07:28 +0000)]
AVX-512: Added encoding tests for VPROR, VPROL instructions,
fixed opcode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232018 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove some unnecessary forward declarations and put a couple more
Eric Christopher [Thu, 12 Mar 2015 06:07:16 +0000 (06:07 +0000)]
Remove some unnecessary forward declarations and put a couple more
where they're supposed to reside.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232014 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove the need to cache the subtarget in the Sparc TargetRegisterInfo
Eric Christopher [Thu, 12 Mar 2015 05:55:26 +0000 (05:55 +0000)]
Remove the need to cache the subtarget in the Sparc TargetRegisterInfo
classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232013 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove the need to cache the subtarget in the Mips TargetRegisterInfo
Eric Christopher [Thu, 12 Mar 2015 05:43:57 +0000 (05:43 +0000)]
Remove the need to cache the subtarget in the Mips TargetRegisterInfo
classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232012 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReapply 'Run LICM pass after loop unrolling pass.'
Kevin Qin [Thu, 12 Mar 2015 05:36:01 +0000 (05:36 +0000)]
Reapply 'Run LICM pass after loop unrolling pass.'

It's firstly committed at r231630, and reverted at r231635.

Function pass InstructionSimplifier is inserted as barrier to
make sure loop unroll pass won't affect on LICM pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232011 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove the need to cache the subtarget in the ARM TargetRegisterInfo
Eric Christopher [Thu, 12 Mar 2015 05:12:31 +0000 (05:12 +0000)]
Remove the need to cache the subtarget in the ARM TargetRegisterInfo
classes. Replace the frame pointer initialization with a static function
that'll look it up via the subtarget on the MachineFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232010 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agodocs: Fix a typo in my previous commit
Justin Bogner [Thu, 12 Mar 2015 04:43:01 +0000 (04:43 +0000)]
docs: Fix a typo in my previous commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232009 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agodocs: Document the llvm-cov show and report commands
Justin Bogner [Thu, 12 Mar 2015 04:18:21 +0000 (04:18 +0000)]
docs: Document the llvm-cov show and report commands

Add a basic synopsis of how to work with instrprof based coverage
using the llvm-cov tools.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232007 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove the need to cache the subtarget in the AArch64 TargetRegisterInfo
Eric Christopher [Thu, 12 Mar 2015 02:04:46 +0000 (02:04 +0000)]
Remove the need to cache the subtarget in the AArch64 TargetRegisterInfo
classes. Replace it with a cache to the Triple and use that
where applicable at the moment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232005 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[NVPTXAsmPrinter] do not print .align on function headers
Jingyue Wu [Thu, 12 Mar 2015 01:50:30 +0000 (01:50 +0000)]
[NVPTXAsmPrinter] do not print .align on function headers

Summary:
PTX does not allow .align directives on function headers.

Fixes PR21551.

Test Plan: test/Codegen/NVPTX/function-align.ll

Reviewers: eliben, jholewinski

Reviewed By: eliben, jholewinski

Subscribers: llvm-commits, eliben, jpienaar, jholewinski

Differential Revision: http://reviews.llvm.org/D8274

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232004 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMake llvm.eh.actions an intrinsic and add docs for it
Reid Kleckner [Thu, 12 Mar 2015 01:45:37 +0000 (01:45 +0000)]
Make llvm.eh.actions an intrinsic and add docs for it

These docs *don't* match the way WinEHPrepare uses them yet, and
verifier support isn't implemented either. The implementation will come
after the documentation text is reviewed and agreed upon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232003 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove the need to cache the subtarget in the PowerPC TargetRegisterInfo
Eric Christopher [Thu, 12 Mar 2015 01:42:51 +0000 (01:42 +0000)]
Remove the need to cache the subtarget in the PowerPC TargetRegisterInfo
classes. Replace it with a cache to the TargetMachine and use that
where applicable at the moment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232002 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agodocs: Try to fix a couple of internal links in the llvm-profdata manual
Justin Bogner [Thu, 12 Mar 2015 01:38:50 +0000 (01:38 +0000)]
docs: Try to fix a couple of internal links in the llvm-profdata manual

These links seem broken on llvm.org/docs. Change them to use the
sphinx-recommended style to see if that helps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232001 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove some CHECK-NOT lines in favor of CHECK-NEXT
Reid Kleckner [Thu, 12 Mar 2015 01:38:48 +0000 (01:38 +0000)]
Remove some CHECK-NOT lines in favor of CHECK-NEXT

NFC, this is just shorter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232000 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUpdate for a new year.
Eric Christopher [Thu, 12 Mar 2015 01:25:29 +0000 (01:25 +0000)]
Update for a new year.

Patch by Tanya Lattner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231998 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix build break introduced in r231992
Krzysztof Parzyszek [Thu, 12 Mar 2015 00:49:13 +0000 (00:49 +0000)]
Fix build break introduced in r231992

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231996 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoStop calling DwarfEHPrepare from WinEHPrepare
Reid Kleckner [Thu, 12 Mar 2015 00:36:20 +0000 (00:36 +0000)]
Stop calling DwarfEHPrepare from WinEHPrepare

Instead, run both EH preparation passes, and have them both ignore
functions with unrecognized EH personalities. Pass delegation involved
some hacky code for creating an AnalysisResolver that we don't need now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231995 91177308-0d34-0410-b5e6-96231b3b80d8