7 years ago[opaque pointer types] Fix a few easy places in GlobalMerge that were accessing value...
David Blaikie [Fri, 21 Aug 2015 22:00:44 +0000 (22:00 +0000)]
[opaque pointer types] Fix a few easy places in GlobalMerge that were accessing value types through pointee types

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245746 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize the pointer IR expression values in the machine
Alex Lorenz [Fri, 21 Aug 2015 21:54:12 +0000 (21:54 +0000)]
MIR Serialization: Serialize the pointer IR expression values in the machine
memory operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245745 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Fix MachO CPU Subtype selection
Vedant Kumar [Fri, 21 Aug 2015 21:52:48 +0000 (21:52 +0000)]
[ARM] Fix MachO CPU Subtype selection

Differential Revision: http://reviews.llvm.org/D12040

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245744 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIRParser: Split the 'parseIRConstant' method into two methods. NFC.
Alex Lorenz [Fri, 21 Aug 2015 21:48:22 +0000 (21:48 +0000)]
MIRParser: Split the 'parseIRConstant' method into two methods. NFC.

One variant of this method can be reused when parsing the quoted IR pointer
expressions in the machine memory operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245743 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[opaque pointer types] Push the passing of value types up from Function/GlobalVariabl...
David Blaikie [Fri, 21 Aug 2015 21:35:28 +0000 (21:35 +0000)]
[opaque pointer types] Push the passing of value types up from Function/GlobalVariable to GlobalObject

(coming next, pushing this up into GlobalValue, so it can store the
value type directly)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245742 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] PPCVSXFMAMutate should not segfault on undef input registers
Hal Finkel [Fri, 21 Aug 2015 21:34:24 +0000 (21:34 +0000)]
[PowerPC] PPCVSXFMAMutate should not segfault on undef input registers

When PPCVSXFMAMutate would look at the input addend register, it would get its
input value number. This would fail, however, if the register was undef,
causing a segfault. Don't segfault (just skip such FMA instructions).

Fixes the test case from PR24542 (although that may have been over-reduced).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245741 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAsmParser: Save and restore the parsing state for types using SlotMapping.
Alex Lorenz [Fri, 21 Aug 2015 21:32:39 +0000 (21:32 +0000)]
AsmParser: Save and restore the parsing state for types using SlotMapping.

This commit extends the 'SlotMapping' structure and includes mappings for named
and numbered types in it. The LLParser is extended accordingly to fill out
those mappings at the end of module parsing.

This information is useful when we want to parse standalone constant values
at a later stage using the 'parseConstantValue' method. The constant values
can be constant expressions, which can contain references to types. In order
to parse such constant values, we have to restore the internal named and
numbered mappings for the types in LLParser, otherwise the parser will report
a parsing error. Therefore, this commit also introduces a new method called
'restoreParsingState' to LLParser, which uses the slot mappings to restore
some of its internal parsing state.

This commit is required to serialize constant value pointers in the machine
memory operands for the MIR format.

Reviewers: Duncan P. N. Exon Smith

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245740 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LVI] Use a SmallVector instead of SmallPtrSet. NFC
Bruno Cardoso Lopes [Fri, 21 Aug 2015 21:18:26 +0000 (21:18 +0000)]
[LVI] Use a SmallVector instead of SmallPtrSet. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245739 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIRLangRef: Describe the syntax for the immediate operands, register values,
Alex Lorenz [Fri, 21 Aug 2015 21:17:01 +0000 (21:17 +0000)]
MIRLangRef: Describe the syntax for the immediate operands, register values,
register operands and register flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245738 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Print MCSymbol operands.
Alex Lorenz [Fri, 21 Aug 2015 21:12:44 +0000 (21:12 +0000)]
MIR Serialization: Print MCSymbol operands.

This commit allows the MIR printer to print the MCSymbol machine operands.
Unfortunately they can't be parsed at this time. I will create a bug that will
track the fact that the MCSymbol operands can't be parsed yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245737 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLine endings fix.
Simon Pilgrim [Fri, 21 Aug 2015 21:09:51 +0000 (21:09 +0000)]
Line endings fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245736 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] enable machine combiner reassociations for 256-bit vector min/max
Sanjay Patel [Fri, 21 Aug 2015 21:04:21 +0000 (21:04 +0000)]
[x86] enable machine combiner reassociations for 256-bit vector min/max

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245735 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoremove 'FeatureSlowUAMem' from AMD CPUs based on 10H micro-arch or later
Sanjay Patel [Fri, 21 Aug 2015 20:39:17 +0000 (20:39 +0000)]
remove 'FeatureSlowUAMem' from AMD CPUs based on 10H micro-arch or later

See discussion in D12154 ( http://reviews.llvm.org/D12154 ), AMD Software
Optimization Guides for 10H/12H/15H/16H, and Agner Fog's experimental data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245733 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-readobj] Add support for MachO DataInCodeDataCommand.
Davide Italiano [Fri, 21 Aug 2015 20:28:30 +0000 (20:28 +0000)]
[llvm-readobj] Add support for MachO DataInCodeDataCommand.

Example output:

File: <stdin>
Format: Mach-O arm
Arch: arm
AddressSize: 32bit
DataInCode {
  Data offset: 300
  Data size: 32
  Data Regions [
    DICE {
      Index: 0
      Offset: 0
      Length: 4
      Kind: 1
    DICE {
      Index: 1
      Offset: 4
      Length: 4
      Kind: 4
    DICE {
      Index: 2
      Offset: 8
      Length: 2
      Kind: 3
    DICE {
      Index: 3
      Offset: 10
      Length: 1
      Kind: 2

Differential Revision:  http://reviews.llvm.org/D12084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245732 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd comment as follow up to r245712
David Blaikie [Fri, 21 Aug 2015 20:18:39 +0000 (20:18 +0000)]
Add comment as follow up to r245712

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245730 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] invert logic for attribute 'FeatureFastUAMem'
Sanjay Patel [Fri, 21 Aug 2015 20:17:26 +0000 (20:17 +0000)]
[x86] invert logic for attribute 'FeatureFastUAMem'

This is a 'no functional change intended' patch. It removes one FIXME, but adds several more.

Motivation: the FeatureFastUAMem attribute may be too general. It is used to determine if any
sized misaligned memory access under 32-bytes is 'fast'. From the added FIXME comments, however,
you can see that we're not consistent about this. Changing the name of the attribute makes it
clearer to see the logic holes.

Changing this to a 'slow' attribute also means we don't have to add an explicit 'fast' attribute
to new chips; fast unaligned accesses have been standard for several generations of CPUs now.

Differential Revision: http://reviews.llvm.org/D12154

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245729 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[opaque pointer type]: Pass explicit pointee type when building a constant GEP.
David Blaikie [Fri, 21 Aug 2015 20:16:51 +0000 (20:16 +0000)]
[opaque pointer type]: Pass explicit pointee type when building a constant GEP.

Gets a bit tricky in the ValueMapper, of course - not sure if we should
just expose a list of explicit types for each Value so that the
ValueMapper can be neutral to these special cases (it's OK for things
like load, where the explicit type is the result type - but when that's
not the case, it means plumbing through another "special" type... )

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245728 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm-lto: Re-order code.
Peter Collingbourne [Fri, 21 Aug 2015 19:09:42 +0000 (19:09 +0000)]
llvm-lto: Re-order code.

This saves us from needing to asave a pointer, and will be needed for an
upcoming ownership change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245722 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFilter libraries that are not installed out of CMake exports (currently
Dan Liew [Fri, 21 Aug 2015 18:10:57 +0000 (18:10 +0000)]
Filter libraries that are not installed out of CMake exports (currently
gtest and gtest_main) when generating ``Makefile.llvmbuild``.

Libraries that are not installed should not be exported because they
won't be available from an install tree.  Rather than filtering out the
gtest libraries in cmake/modules/Makefile, simply teach llvm-build to
filter out libraries that will not be installed from its generated list
of exported libraries.

Note that LLVMBUILD_LIB_DEPS_* are used during our own CMake build
process so we cannot filter LLVMBUILD_LIB_DEPS_gtest* out in llvm-build.
We must leave this gtest filter logic in cmake/modules/Makefile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245718 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm-build: Adopt generation of LLVM_LIBS_TO_EXPORT. Patch by
Dan Liew [Fri, 21 Aug 2015 18:10:55 +0000 (18:10 +0000)]
llvm-build: Adopt generation of LLVM_LIBS_TO_EXPORT. Patch by
Brad King.

Move `LLVM_LIBS_TO_EXPORT` over to Makefile.llvmbuild and generate it
from `llvm-build` using the same logic used to export the dependencies
of these libraries.  This avoids depending on `llvm-config`.

This refactoring was originally motivated by issue #24154 due to commit
r243297 (Fix `llvm-config` to emit the linker flag for the combined
shared object, 2015-07-27) changing the output of `llvm-config --libs`
to not have the individual libraries when we configure with
`--enable-shared`.  That change was reverted by r244108 but this
refactoring makes sense on its own anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245717 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agollvm-build: Factor out duplicate cmake export listing. Patch by
Dan Liew [Fri, 21 Aug 2015 18:10:51 +0000 (18:10 +0000)]
llvm-build: Factor out duplicate cmake export listing. Patch by
Brad King.

The write_cmake_fragment and write_cmake_exports_fragment methods share
some logic for selecting libraries that CMake needs to know about.
Factor it out into a helper to avoid duplication.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245716 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] enable machine combiner reassociations for 128-bit vector min/max
Sanjay Patel [Fri, 21 Aug 2015 18:06:49 +0000 (18:06 +0000)]
[x86] enable machine combiner reassociations for 128-bit vector min/max

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245715 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove an unnecessary use of pointee types introduced in r194220
David Blaikie [Fri, 21 Aug 2015 17:37:41 +0000 (17:37 +0000)]
Remove an unnecessary use of pointee types introduced in r194220

David Majnemer (the original author) believes this to be an impossible
condition to reach anyway, and no test cases cover this so we'll go with

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245712 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDisable Visual C++ 2013 Debug mode assert on null pointer in some STL algorithms,
Yaron Keren [Fri, 21 Aug 2015 17:31:03 +0000 (17:31 +0000)]
Disable Visual C++ 2013 Debug mode assert on null pointer in some STL algorithms,
such as std::equal on the third argument. This reverts previous workarounds.

Predefining _DEBUG_POINTER_IMPL disables Visual C++ 2013 headers from defining
it to a function performing the null pointer check. In practice, it's not that
bad since any function actually using the nullptr will seg fault. The other
iterator sanity checks remain enabled in the headers.

Reviewed by Aaron Ballmanþ and Duncan P. N. Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245711 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIRLangRef: Describe the syntax for machine instruction names and flags.
Alex Lorenz [Fri, 21 Aug 2015 17:26:38 +0000 (17:26 +0000)]
MIRLangRef: Describe the syntax for machine instruction names and flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245710 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agosave some testing time; get rid of the non-SSE chips in this test
Sanjay Patel [Fri, 21 Aug 2015 17:16:51 +0000 (17:16 +0000)]
save some testing time; get rid of the non-SSE chips in this test

It doesn't matter what slow/fast unaligned attribute the old chips
have - they can't use anything more than 4-byte stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245709 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APFloat] Remove else after return and replace loop with std::equal. NFC.
Benjamin Kramer [Fri, 21 Aug 2015 16:44:52 +0000 (16:44 +0000)]
[APFloat] Remove else after return and replace loop with std::equal. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245707 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix typo - symetric -> symmetric.
Eric Christopher [Fri, 21 Aug 2015 16:23:39 +0000 (16:23 +0000)]
Fix typo - symetric -> symmetric.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245705 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoadd a test case to check the fast-unaligned-mem attribute per CPU
Sanjay Patel [Fri, 21 Aug 2015 16:08:26 +0000 (16:08 +0000)]
add a test case to check the fast-unaligned-mem attribute per CPU

This will confirm that the patch in D12154 is actually NFC.
It will also confirm that the proposed changes for the AMD chips
are behaving as expected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245704 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Fold together mul and shl when both are by a constant
John Brawn [Fri, 21 Aug 2015 10:48:17 +0000 (10:48 +0000)]
[DAGCombiner] Fold together mul and shl when both are by a constant

This is intended to improve code generation for GEPs, as the index value is
shifted by the element size and in GEPs of multi-dimensional arrays the index
of higher dimensions is multiplied by the lower dimension size.

Differential Revision: http://reviews.llvm.org/D12197

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245689 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r245635, "[InstCombine] Transform A & (L - 1) u< L --> L != 0"
NAKAMURA Takumi [Fri, 21 Aug 2015 07:46:07 +0000 (07:46 +0000)]
Revert r245635, "[InstCombine] Transform A & (L - 1) u< L --> L != 0"

It caused miscompilation in clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245678 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTest Commit: Reformats 2 lines in LangRef.rst
Mohammad Shahid [Fri, 21 Aug 2015 05:31:07 +0000 (05:31 +0000)]
Test Commit: Reformats 2 lines in LangRef.rst

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245673 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLinker: Remove empty destructor.
Peter Collingbourne [Fri, 21 Aug 2015 04:51:24 +0000 (04:51 +0000)]
Linker: Remove empty destructor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245672 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLTO: Simplify ownership of LTOCodeGenerator::TargetMach.
Peter Collingbourne [Fri, 21 Aug 2015 04:45:57 +0000 (04:45 +0000)]
LTO: Simplify ownership of LTOCodeGenerator::TargetMach.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245671 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLTO: Simplify ownership of LTOCodeGenerator::CodegenOptions.
Peter Collingbourne [Fri, 21 Aug 2015 04:45:55 +0000 (04:45 +0000)]
LTO: Simplify ownership of LTOCodeGenerator::CodegenOptions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245670 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Sparc] Support user-specified stack object overalignment.
James Y Knight [Fri, 21 Aug 2015 04:17:56 +0000 (04:17 +0000)]
[Sparc] Support user-specified stack object overalignment.

Note: I do not implement a base pointer, so it's still impossible to
have dynamic realignment AND dynamic alloca in the same function.

This also moves the code for determining the frame index reference
into getFrameIndexReference, where it belongs, instead of inline in

[Begin long-winded screed]

Now, stack realignment for Sparc is actually a silly thing to support,
because the Sparc ABI has no need for it -- unlike the situation on
x86, the stack is ALWAYS aligned to the required alignment for the CPU
instructions: 8 bytes on sparcv8, and 16 bytes on sparcv9.

However, LLVM unfortunately implements user-specified overalignment
using stack realignment support, so for now, I'm going to go along
with that tradition. GCC instead treats objects which have alignment
specification greater than the maximum CPU-required alignment for the
target as a separate block of stack memory, with their own virtual
base pointer (which gets aligned). Doing it that way avoids needing to
implement per-target support for stack realignment, except for the
targets which *actually* have an ABI-specified stack alignment which
is too small for the CPU's requirements.

Further unfortunately in LLVM, the default canRealignStack for all
targets effectively returns true, despite that implementing that is
something a target needs to do specifically. So, the previous behavior
on Sparc was to silently ignore the user's specified stack
alignment. Ugh.

Yet MORE unfortunate, if a target actually does return false from
canRealignStack, that also causes the user-specified alignment to be
*silently ignored*, rather than emitting an error.

(I started looking into fixing that last, but it broke a bunch of
tests, because LLVM actually *depends* on having it silently ignored:
some architectures (e.g. non-linux i386) have smaller stack alignment
than spilled-register alignment. But, the fact that a register needs
spilling is not known until within the register allocator. And by that
point, the decision to not reserve the frame pointer has been frozen
in place. And without a frame pointer, stack realignment is not
possible. So, canRealignStack() returns false, and
needsStackRealignment() then returns false, assuming everyone can just
go on their merry way assuming the alignment requirements were
probably just suggestions after-all. Sigh...)

Differential Revision: http://reviews.llvm.org/D12208

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245668 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTransformUtils: Introduce module splitter.
Peter Collingbourne [Fri, 21 Aug 2015 02:48:20 +0000 (02:48 +0000)]
TransformUtils: Introduce module splitter.

The module splitter splits a module into linkable partitions. It will
be used to implement parallel LTO code generation.

This initial version of the splitter does not attempt to deal with the
somewhat subtle symbol visibility issues around module splitting. These
will be dealt with in a future change.

Differential Revision: http://reviews.llvm.org/D12132

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245662 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSparcAsmParser.cpp: Appease msc x86.
NAKAMURA Takumi [Fri, 21 Aug 2015 01:12:19 +0000 (01:12 +0000)]
SparcAsmParser.cpp: Appease msc x86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245661 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAArch64: Fix testcase of r245640
Matthias Braun [Fri, 21 Aug 2015 00:23:19 +0000 (00:23 +0000)]
AArch64: Fix testcase of r245640

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245647 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SLP] Add one more test case for propagating 'nontemporal' attributes.
Michael Zolotukhin [Fri, 21 Aug 2015 00:08:39 +0000 (00:08 +0000)]
[SLP] Add one more test case for propagating 'nontemporal' attributes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245644 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodelete more dead code from this testcase.
Adrian Prantl [Fri, 21 Aug 2015 00:02:04 +0000 (00:02 +0000)]
delete more dead code from this testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245643 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFurther reduce the IR in this testcase based on a further reduction
Adrian Prantl [Thu, 20 Aug 2015 23:59:39 +0000 (23:59 +0000)]
Further reduce the IR in this testcase based on a further reduction
of the original source by David Blaikie (thanks!).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245642 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAArch64: Fix cmp;ccmp ordering
Matthias Braun [Thu, 20 Aug 2015 23:33:34 +0000 (23:33 +0000)]
AArch64: Fix cmp;ccmp ordering

When producing conditional compare sequences for or operations we need
to negate the operands and the finally tested flags. The thing is if we negate
the finally tested flags this equals a logical negation of all previously
emitted expressions. There was a case missing where we have to order OR
expressions so they get emitted first.

This fixes http://llvm.org/PR24459

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245641 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAArch64: Do not create CCMP on multiple users.
Matthias Braun [Thu, 20 Aug 2015 23:33:31 +0000 (23:33 +0000)]
AArch64: Do not create CCMP on multiple users.

Create CMP;CCMP sequences from and/or trees does not gain us anything if
the and/or tree is materialized to a GP register anyway. While most of
the code already checked for hasOneUse() there was one important case

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245640 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstSimplify] add nuw %x, C2 must be at least C2
David Majnemer [Thu, 20 Aug 2015 23:01:41 +0000 (23:01 +0000)]
[InstSimplify] add nuw %x, C2 must be at least C2

Use the fact that add nuw always creates a larger bit pattern when
trying to simplify comparisons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245638 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Mark more operators as Expand.
Dan Gohman [Thu, 20 Aug 2015 22:57:13 +0000 (22:57 +0000)]
[WebAssembly] Mark more operators as Expand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245636 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Transform A & (L - 1) u< L --> L != 0
Sanjoy Das [Thu, 20 Aug 2015 22:31:55 +0000 (22:31 +0000)]
[InstCombine] Transform A & (L - 1) u< L --> L != 0

This transform is never a pessimization at the IR level (since it
replaces an `icmp` with another), and has potentiall payoffs:

 1. It may make the `icmp` fold away or become loop invariant.
 2. It may make the `A & (L - 1)` computation dead.

This shows up in Java, in range checks generated by array accesses of
the form `a[i & (a.length - 1)]`.

Reviewers: reames, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12210

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245635 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SLP] Propagate 'nontemporal' attribute into vectorized instructions.
Michael Zolotukhin [Thu, 20 Aug 2015 22:28:15 +0000 (22:28 +0000)]
[SLP] Propagate 'nontemporal' attribute into vectorized instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245633 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LoopVectorize] Propagate 'nontemporal' attribute into vectorized instructions.
Michael Zolotukhin [Thu, 20 Aug 2015 22:27:38 +0000 (22:27 +0000)]
[LoopVectorize] Propagate 'nontemporal' attribute into vectorized instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245632 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRename Instruction::dropUnknownMetadata() to dropUnknownNonDebugMetadata()
Adrian Prantl [Thu, 20 Aug 2015 22:00:30 +0000 (22:00 +0000)]
Rename Instruction::dropUnknownMetadata() to dropUnknownNonDebugMetadata()
and make it always preserve debug locations, since all callers wanted this
behavior anyway.

This is addressing a post-commit review feedback for r245589.

NFC (inside the LLVM tree).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245622 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Look for scalar through one bitcast when lowering to VBROADCAST.
Ahmed Bougacha [Thu, 20 Aug 2015 21:02:39 +0000 (21:02 +0000)]
[X86] Look for scalar through one bitcast when lowering to VBROADCAST.

Fixes PR23464: one way to use the broadcast intrinsics is:


We don't currently fold this, but now that we use native IR for
the intrinsics (r245605), we can look through one bitcast to find
the broadcast scalar.

Differential Revision: http://reviews.llvm.org/D10557

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245613 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Add some broadcast-from-memory tests.
Ahmed Bougacha [Thu, 20 Aug 2015 20:59:41 +0000 (20:59 +0000)]
[X86] Add some broadcast-from-memory tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245612 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[NVPTX] truncating 64-bit to 32-bit is free
Jingyue Wu [Thu, 20 Aug 2015 20:59:02 +0000 (20:59 +0000)]
[NVPTX] truncating 64-bit to 32-bit is free

Add an LSR test that exercises isTruncateFree. Without this change, LSR creates
another indvar representing the truncated value.

Reviewers: jholewinski, eliben

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D12058

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245611 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Replace avx2 broadcast intrinsics with native IR.
Ahmed Bougacha [Thu, 20 Aug 2015 20:36:19 +0000 (20:36 +0000)]
[X86] Replace avx2 broadcast intrinsics with native IR.

Since r245605, the clang headers don't use these anymore.
r245165 updated some of the tests already; update the others, add
an autoupgrade, remove the intrinsics, and cleanup the definitions.

Differential Revision: http://reviews.llvm.org/D10555

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245606 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[asan] Add ASAN support for AArch64 42-bit VMA
Adhemerval Zanella [Thu, 20 Aug 2015 18:30:40 +0000 (18:30 +0000)]
[asan] Add ASAN support for AArch64 42-bit VMA

This patch adds support for asan on aarch64-linux with 42-bit VMA
(current default config for 64K pagesize kernels).  The support is
enabled by defining the SANITIZER_AARCH64_VMA to 42 at build time
for both clang/llvm and compiler-rt.  The default VMA is 39 bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245594 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ValueTracking] computeOverflowForSignedAdd and isKnownNonNegative
Jingyue Wu [Thu, 20 Aug 2015 18:27:04 +0000 (18:27 +0000)]
[ValueTracking] computeOverflowForSignedAdd and isKnownNonNegative

Refactor, NFC

Extracts computeOverflowForSignedAdd and isKnownNonNegative from NaryReassociate to ValueTracking in case
others need it.

Reviewers: reames

Subscribers: majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D11313

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245591 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LVI] Avoid iterator invalidation in LazyValueInfoCache::threadEdge
Bruno Cardoso Lopes [Thu, 20 Aug 2015 18:24:54 +0000 (18:24 +0000)]
[LVI] Avoid iterator invalidation in LazyValueInfoCache::threadEdge

Do that by copying out the elements to another SmallPtrSet.
Follow up from r245309.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245590 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a bug that caused SimplifyCFG to drop DebugLocs.
Adrian Prantl [Thu, 20 Aug 2015 18:24:02 +0000 (18:24 +0000)]
Fix a bug that caused SimplifyCFG to drop DebugLocs.

Instruction::dropUnknownMetadata(KnownSet) is supposed to preserve all
metadata in KnownSet, but the condition for DebugLocs was inverted.

Most users of dropUnknownMetadata() actually worked around this by not
adding LLVMContext::MD_dbg to their list of KnowIDs.
This is now made explicit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245589 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix a debug location handling bug in GVN.
Adrian Prantl [Thu, 20 Aug 2015 18:23:56 +0000 (18:23 +0000)]
Fix a debug location handling bug in GVN.
Caught by the famous "DebugLoc describes the currect SubProgram" assertion.

When GVN is removing a nonlocal load it updates the debug location of the
SSA value it replaced the load with with the one of the load. In the
testcase this actually overwrites a valid debug location with an empty one.

In reality GVN has to make an arbitrary choice between two equally valid
debug locations. This patch changes to behavior to only update the
location if the value doesn't already have a debug location.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245588 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LVer] Fix FIXME: hide addPHINodes, NFC
Adam Nemet [Thu, 20 Aug 2015 17:22:29 +0000 (17:22 +0000)]
[LVer] Fix FIXME: hide addPHINodes, NFC

Since Ashutosh made findDefsUsedOutsideOfLoop public, we can clean this

Now clients that don't compute DefsUsedOutsideOfLoop can just call
versionLoop() and computing DefsUsedOutsideOfLoop will happen
implicitly.  With that there is no reason to expose addPHINodes anymore.

Ashutosh, you can now drop the calls to findDefsUsedOutsideOfLoop and
addPHINodes in LVerLICM and things should just work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245579 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Don't try and custom lower a vNi64 SETCC.
James Molloy [Thu, 20 Aug 2015 16:33:44 +0000 (16:33 +0000)]
[ARM] Don't try and custom lower a vNi64 SETCC.

It won't go well. We've already marked 64-bit SETCCs as non-Custom, but it's just possible that a SETCC has a legal result type but an illegal operand type. If this happens, bail out before we create unselectable nodes.

Fixes PR24292. I tried to create a testcase but in 99% of cases we can't trigger this - not surprising that this bug has been latent since 2009.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245577 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix symbol value computation when part of the expression is weak.
Rafael Espindola [Thu, 20 Aug 2015 16:18:30 +0000 (16:18 +0000)]
Fix symbol value computation when part of the expression is weak.

This matches the behaviour of the gnu assembler and is part of
fixing pr24486.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245576 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Sparc]: correct the 'set' synthetic instruction
Douglas Katzman [Thu, 20 Aug 2015 16:16:16 +0000 (16:16 +0000)]
[Sparc]: correct the 'set' synthetic instruction

Differential Revision: http://reviews.llvm.org/D12194

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245575 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoOptimize bitwise even/odd test (-x&1 -> x&1) to not use negation.
Balaram Makam [Thu, 20 Aug 2015 15:35:00 +0000 (15:35 +0000)]
Optimize bitwise even/odd test (-x&1 -> x&1) to not use negation.

Summary: We know that -x & 1 is equivalent to x & 1, avoid using negation for testing if a negative integer is even or odd.

Reviewers: majnemer

Subscribers: junbuml, mssimpso, gberry, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D12156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245569 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips][microMIPS] Add microMIPS32r6 and microMIPS64r6 tests for existing 16-bit ADDIU...
Zoran Jovanovic [Thu, 20 Aug 2015 11:51:49 +0000 (11:51 +0000)]
[mips][microMIPS] Add microMIPS32r6 and microMIPS64r6 tests for existing 16-bit ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions
Differential Revision: http://reviews.llvm.org/D10955

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245554 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Fix FBLD and FBSTP
Marina Yatsina [Thu, 20 Aug 2015 11:51:24 +0000 (11:51 +0000)]
[X86] Fix FBLD and FBSTP

FBLD and FBSTP should receive TBYTE because it is defined as
FBLD m80

Differential Revision: http://reviews.llvm.org/D11748

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245553 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Fix bug in COMISD and COMISS definition in td files
Marina Yatsina [Thu, 20 Aug 2015 11:21:36 +0000 (11:21 +0000)]
[X86] Fix bug in COMISD and COMISS definition in td files

COMISD should receive QWORD because it is defined as
 (V)COMISD xmm1, xmm2/m64

COMISS should receive DWORD because it is defined as
 (V)COMISS xmm1, xmm2/m32

Differential Revision: http://reviews.llvm.org/D11712

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245551 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake helper functions static. NFC.
Benjamin Kramer [Thu, 20 Aug 2015 09:57:22 +0000 (09:57 +0000)]
Make helper functions static. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245549 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Fix the (shl (and (setcc_c), c1), c2) -> (and setcc_c, (c1 << c2)) fold
David Majnemer [Thu, 20 Aug 2015 09:00:56 +0000 (09:00 +0000)]
[X86] Fix the (shl (and (setcc_c), c1), c2) -> (and setcc_c, (c1 << c2)) fold

We didn't check for the necessary preconditions before folding a
mask/shift into a single mask.

This fixes PR24516.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245544 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[DSE] Enable removal of lifetime intrinsics in terminating blocks"
Bjorn Steinbrink [Thu, 20 Aug 2015 08:58:47 +0000 (08:58 +0000)]
Revert "[DSE] Enable removal of lifetime intrinsics in terminating blocks"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245543 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DSE] Enable removal of lifetime intrinsics in terminating blocks
Bjorn Steinbrink [Thu, 20 Aug 2015 08:25:28 +0000 (08:25 +0000)]
[DSE] Enable removal of lifetime intrinsics in terminating blocks

Usually DSE is not supposed to remove lifetime intrinsics, but it's
actually ok to remove them for dead objects in terminating blocks,
because they convey no extra information there. Until we hit a lifetime
start that cannot be removed, that is. Because from that point on the
lifetime intrinsics become interesting again, e.g. for stack coloring.

Reviewers: reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11710

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245542 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARC] Pull the ObjC ARC components that really serve the role of
Chandler Carruth [Thu, 20 Aug 2015 08:06:03 +0000 (08:06 +0000)]
[ARC] Pull the ObjC ARC components that really serve the role of
analyses into LLVM's Analysis library rather than having them in
a Transforms library.

This is motivated by the need to have the core AliasAnalysis
infrastructure be aware of the ObjCARCAliasAnalysis. However, it also
seems like a nice and clean separation. Everything was very easy to move
and this doesn't create much clutter in the analysis library IMO.

Differential Revision: http://reviews.llvm.org/D12133

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245541 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Fix value type on XVCMPEQDP for v2f64 comparisons
Hal Finkel [Thu, 20 Aug 2015 03:02:02 +0000 (03:02 +0000)]
[PowerPC] Fix value type on XVCMPEQDP for v2f64 comparisons

XVCMPEQDP is used for VSX v2f64 equality comparisons, but the value type needs
to be v2i64 (as that's the corresponding SETCC type).

Fixes PR24225.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245535 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Fix the int2fp(fp2int(x)) DAGCombine to ignore ppc_fp128
Hal Finkel [Thu, 20 Aug 2015 01:18:20 +0000 (01:18 +0000)]
[PowerPC] Fix the int2fp(fp2int(x)) DAGCombine to ignore ppc_fp128

This DAGCombine was creating custom SDAG nodes with an illegal ppc_fp128
operand type because it was triggering on f64/f32 int2fp(fp2int(ppc_fp128 x)),
but shouldn't (it should only apply to f32/f64 types). The result was a crash.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245530 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Use the global value syntax for global value memory operands.
Alex Lorenz [Thu, 20 Aug 2015 00:20:03 +0000 (00:20 +0000)]
MIR Serialization: Use the global value syntax for global value memory operands.

This commit modifies the serialization syntax so that the global IR values in
machine memory operands use the global value '@<name>' syntax instead of the
current '%ir.<name>' syntax.

The unnamed global IR values are handled by this commit as well, as the
existing global value parsing method can parse the unnamed globals already.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245527 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Change syntax for the call entry pseudo source values.
Alex Lorenz [Thu, 20 Aug 2015 00:12:57 +0000 (00:12 +0000)]
MIR Serialization: Change syntax for the call entry pseudo source values.

The global IR values in machine memory operands should use the global value
'@<name>' syntax instead of the current '%ir.<name>' syntax.

However, the global value call entry pseudo source values use the global value
syntax already. Therefore, the syntax for the call entry pseudo source values
has to be changed so that the global values and call entry global value PSVs
can be parsed without ambiguities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245526 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix test failure introduced by r245521.
Alex Lorenz [Wed, 19 Aug 2015 23:56:37 +0000 (23:56 +0000)]
Fix test failure introduced by r245521.

Machine memory operands can contain pointer values that are constants, and
the 'getLocalSlot' method requires non-constant values.

The constant pointer values will have to be serialized in a different patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245523 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize unnamed local IR values in memory operands.
Alex Lorenz [Wed, 19 Aug 2015 23:31:05 +0000 (23:31 +0000)]
MIR Serialization: Serialize unnamed local IR values in memory operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245521 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: parseIRValue should take in a constant pointer. NFC.
Alex Lorenz [Wed, 19 Aug 2015 23:27:07 +0000 (23:27 +0000)]
MIR Parser: parseIRValue should take in a constant pointer. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245520 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Printer: Extract the code that prints IR slots to a separate function. NFC.
Alex Lorenz [Wed, 19 Aug 2015 23:24:37 +0000 (23:24 +0000)]
MIR Printer: Extract the code that prints IR slots to a separate function. NFC.

This code can be reused when printing references to unnamed local IR values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245519 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAllow Optionals to be compared to None
David Blaikie [Wed, 19 Aug 2015 23:07:27 +0000 (23:07 +0000)]
Allow Optionals to be compared to None

This is something like nullopt in std::experimental::optional. Optional
could already be constructed from None, so this seems like an obvious
extension from there.

I have a use in a future patch for Clang, though it may not go that
way/end up used - so this seemed worth committing now regardless.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245518 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[CMake] Kaleidoscope-Ch2: Don't pass -Wno-unused-private-field unconditionally.
NAKAMURA Takumi [Wed, 19 Aug 2015 22:55:16 +0000 (22:55 +0000)]
[CMake] Kaleidoscope-Ch2: Don't pass -Wno-unused-private-field unconditionally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245516 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] enable machine combiner reassociations for scalar double-precision min/max
Sanjay Patel [Wed, 19 Aug 2015 21:27:27 +0000 (21:27 +0000)]
[x86] enable machine combiner reassociations for scalar double-precision min/max

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245506 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] enable machine combiner reassociations for scalar single-precision maximums
Sanjay Patel [Wed, 19 Aug 2015 21:18:46 +0000 (21:18 +0000)]
[x86] enable machine combiner reassociations for scalar single-precision maximums

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245504 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Added SMAX/SMIN/UMAX/UMIN constant folding
Simon Pilgrim [Wed, 19 Aug 2015 21:11:58 +0000 (21:11 +0000)]
[DAGCombiner] Added SMAX/SMIN/UMAX/UMIN constant folding

We still need to add constant folding of vector comparisons to fold the tests for targets that don't support the respective min/max nodes

I needed to update 2011-12-06-AVXVectorExtractCombine to load a vector instead of using a constant vector to prevent it folding

Differential Revision: http://reviews.llvm.org/D12118

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245503 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64][FastISel] Don't fold shifts with UB.
Juergen Ributzka [Wed, 19 Aug 2015 20:52:55 +0000 (20:52 +0000)]
[AArch64][FastISel] Don't fold shifts with UB.

We are already falling back to SelectionDAG when encountering an shift with UB.
This adds the same checks for shifts with UB that get folded into arithmetic or
logical operations.

This fixes rdar://problem/22345295.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245499 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86] Emit more efficient >= comparisons against 0
David Majnemer [Wed, 19 Aug 2015 20:51:40 +0000 (20:51 +0000)]
[X86] Emit more efficient >= comparisons against 0

We don't do a great job with >= 0 comparisons against zero when the
result is used as an i8.

Given something like:
  void f(long long LL, bool *B) {
    *B = LL >= 0;

We used to generate:
  shrq    $63, %rdi
  xorb    $1, %dil
  movb    %dil, (%rsi)

Now we generate:
  testq   %rdi, %rdi
  setns   (%rsi)

Differential Revision: http://reviews.llvm.org/D12136

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245498 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[WebAssembly] Use the default alignment for SIMD types.
Dan Gohman [Wed, 19 Aug 2015 20:30:20 +0000 (20:30 +0000)]
[WebAssembly] Use the default alignment for SIMD types.

Previously WebAssembly's datalayout string had -v128:8:128. This had been an
attempt to declare a certain level of support for unaligned SIMD accesses.
However, clang makes its own determinations for SIMD alignment that are
independent of the datalayout string, so this wasn't actually meaningful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245494 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Fold CONCAT_VECTORS of EXTRACT_SUBVECTOR (or undef) to VECTOR_SHUFFLE.
Simon Pilgrim [Wed, 19 Aug 2015 20:09:50 +0000 (20:09 +0000)]

Check to see if this is a CONCAT_VECTORS of a bunch of EXTRACT_SUBVECTOR operations. If so, and if the EXTRACT_SUBVECTOR vector inputs come from at most two distinct vectors the same size as the result, attempt to turn this into a legal shuffle.

Differential Revision: http://reviews.llvm.org/D12125

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245490 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReplace some calls to isa<LandingPadInst> with isEHPad()
David Majnemer [Wed, 19 Aug 2015 19:54:02 +0000 (19:54 +0000)]
Replace some calls to isa<LandingPadInst> with isEHPad()

No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245487 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMinor tidying of regex in a test
Paul Robinson [Wed, 19 Aug 2015 19:36:35 +0000 (19:36 +0000)]
Minor tidying of regex in a test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245486 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Sparc]: asm-only support for the ldstub instruction.
Douglas Katzman [Wed, 19 Aug 2015 19:30:57 +0000 (19:30 +0000)]
[Sparc]: asm-only support for the ldstub instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245485 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Parser: Rename 'MachineOperandWithLocation' to 'ParsedMachineOperand'. NFC.
Alex Lorenz [Wed, 19 Aug 2015 19:19:16 +0000 (19:19 +0000)]
MIR Parser: Rename 'MachineOperandWithLocation' to 'ParsedMachineOperand'. NFC.

Besides storing the operand's source range, this structure now stores other
attributes as well, so the name should reflect this fact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245483 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize instruction's register ties.
Alex Lorenz [Wed, 19 Aug 2015 19:05:34 +0000 (19:05 +0000)]
MIR Serialization: Serialize instruction's register ties.

This commit serializes the machine instruction's register operand ties.
The ties are printed out only when the instructon has register ties that are
different from the ties that are specified in the instruction's description.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245482 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTemporary fix for the self-host failures introduced by rL244921.
Nemanja Ivanovic [Wed, 19 Aug 2015 19:04:47 +0000 (19:04 +0000)]
Temporary fix for the self-host failures introduced by rL244921.

This revision has introduced an issue that only affects bootstrapped compiler
when it is printing the ASM. I am working on resolving the issue, but in the
meantime, I'm disabling the legalization of scalar_to_vector operation for v2i64
and the associated testing until I can get this fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245481 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMIR Serialization: Serialize defined registers that require 'def' register flag.
Alex Lorenz [Wed, 19 Aug 2015 18:55:47 +0000 (18:55 +0000)]
MIR Serialization: Serialize defined registers that require 'def' register flag.

The defined registers are already serialized - they are represented by placing
them before the '=' in a machine instruction. However, certain instructions like
INLINEASM can have defined register operands after the '=', so this commit
introduces the 'def' register flag for such operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245480 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PeepholeOptimizer] Look through PHIs to find additional register sources
Bruno Cardoso Lopes [Wed, 19 Aug 2015 18:53:36 +0000 (18:53 +0000)]
[PeepholeOptimizer] Look through PHIs to find additional register sources

Reintroduce r245442. Remove an overly conservative assertion introduced
in r245442. We could replace the assertion to use `shareSameRegisterFile`
instead, but in that point in `insertPHI` we already lost the original
Def subreg to check against. So drop the assertion completely.

Original commit message:

- Teaches the ValueTracker in the PeepholeOptimizer to look through PHI
- Add findNextSourceAndRewritePHI method to lookup into multiple sources
returnted by the ValueTracker and rewrite PHIs with new sources.

With these changes we can find more register sources and rewrite more
copies to allow coaslescing of bitcast instructions. Hence, we eliminate
unnecessary VR64 <-> GR64 copies in x86, but it could be extended to
other archs by marking "isBitcast" on target specific instructions. The
x86 example follows:

  psllq %mm1, %mm0
  movd  %mm0, %r9
  jmp C

  por %mm1, %mm0
  movd  %mm0, %r9
  jmp C

  movd  %r9, %mm0
  pshufw  $238, %mm0, %mm0


  psllq %mm1, %mm0
  jmp C

  por %mm1, %mm0
  jmp C

  pshufw  $238, %mm0, %mm0

Differential Revision: http://reviews.llvm.org/D11197

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245479 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SPARC] Enable writing to floating-point-state register.
Douglas Katzman [Wed, 19 Aug 2015 18:34:48 +0000 (18:34 +0000)]
[SPARC] Enable writing to floating-point-state register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245475 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Kaleidoscope] More inter-chapter diff reduction.
Lang Hames [Wed, 19 Aug 2015 18:32:58 +0000 (18:32 +0000)]
[Kaleidoscope] More inter-chapter diff reduction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245474 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[docs] Fix minor typo in CodingStandards.rst
Vedant Kumar [Wed, 19 Aug 2015 18:19:12 +0000 (18:19 +0000)]
[docs] Fix minor typo in CodingStandards.rst

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245473 91177308-0d34-0410-b5e6-96231b3b80d8