oota-llvm.git
7 years ago[CodeGen] Fix FREM on 32-bit MSVC on x86
Vedant Kumar [Wed, 2 Sep 2015 01:31:58 +0000 (01:31 +0000)]
[CodeGen] Fix FREM on 32-bit MSVC on x86

Patch by Dylan McKay!

Differential Revision: http://reviews.llvm.org/D12099

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246615 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MC] Generate a timestamp for COFF object files
David Majnemer [Tue, 1 Sep 2015 23:46:11 +0000 (23:46 +0000)]
[MC] Generate a timestamp for COFF object files

The MS incremental linker seems to inspect the timestamp written into
the object file to determine whether or not it's contents need to be
considered.  Failing to set the timestamp to a date newer than the
executable will result in the object file not participating in
subsequent links.  To ameliorate this, write the current time into the
object file's TimeDateStamp field.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246607 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MC] Remove MCAssembler's copy of OS
David Majnemer [Tue, 1 Sep 2015 23:19:38 +0000 (23:19 +0000)]
[MC] Remove MCAssembler's copy of OS

We can just ask the ObjectWriter for it's stream instead of caching
around our own reference to it.  No functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246604 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Don't abort on variable-idx extractelt in ReconstructShuffle.
Ahmed Bougacha [Tue, 1 Sep 2015 21:56:00 +0000 (21:56 +0000)]
[ARM] Don't abort on variable-idx extractelt in ReconstructShuffle.

The code introduced in r244314 assumed that EXTRACT_VECTOR_ELT only
takes constant indices, but it does accept variables.
Bail out for those: we can't use them, as the shuffles we want to
reconstruct do require constant masks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246594 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MC] Add support for generating COFF CRCs
David Majnemer [Tue, 1 Sep 2015 21:23:58 +0000 (21:23 +0000)]
[MC] Add support for generating COFF CRCs

COFF sections are accompanied with an auxiliary symbol which includes a
checksum.  This checksum used to be filled with just zero but this seems
to upset LINK.exe when it is processing a /INCREMENTAL link job.
Instead, fill the CheckSum field with the JamCRC of the section
contents.  This matches MSVC's behavior.

This fixes PR19666.

N.B.  A rather simple implementation of JamCRC is given.  It implements
a byte-wise calculation using the method given by Sarwate.  There are
implementations with higher throughput like slice-by-eight and making
use of PCLMULQDQ.  We can switch to one of those techniques if it turns
out to be a significant use of time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246590 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoMake trunk release notes point to 3.7, not 3.6
Nico Weber [Tue, 1 Sep 2015 21:10:56 +0000 (21:10 +0000)]
Make trunk release notes point to 3.7, not 3.6

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246588 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agorename "slow-unaligned-mem-under-32" to slow-unaligned-mem-16" (NFCI)
Sanjay Patel [Tue, 1 Sep 2015 20:51:51 +0000 (20:51 +0000)]
rename "slow-unaligned-mem-under-32" to slow-unaligned-mem-16" (NFCI)

This is a follow-on suggested by:
http://reviews.llvm.org/D12154 ( http://reviews.llvm.org/rL245729 )
http://reviews.llvm.org/D10662 ( http://reviews.llvm.org/rL245075 )

This makes the attribute name match most of the existing lowering logic
and regression test expectations.

But the current use of this attribute is inconsistent; see the FIXME
comment for "allowsMisalignedMemoryAccesses()". That change will
result in functional changes and should be coming soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246585 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agogold-plugin: Implement parallel LTO code generation using llvm::splitCodeGen.
Peter Collingbourne [Tue, 1 Sep 2015 20:40:22 +0000 (20:40 +0000)]
gold-plugin: Implement parallel LTO code generation using llvm::splitCodeGen.

Parallelism can be enabled using a new plugin option, jobs=N, where N is
the number of code generation threads.

Differential Revision: http://reviews.llvm.org/D12308

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246584 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove OutputBuffer.
Benjamin Kramer [Tue, 1 Sep 2015 18:25:34 +0000 (18:25 +0000)]
Remove OutputBuffer.

This was last used by the pre-MC object emitter and has been dead for
quite a while. We have better ways to emit endian-dependent stuff now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246571 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDeadArgElim: don't eliminate arguments from naked functions
Hans Wennborg [Tue, 1 Sep 2015 18:06:46 +0000 (18:06 +0000)]
DeadArgElim: don't eliminate arguments from naked functions

Differential Revision: http://reviews.llvm.org/D12534

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246564 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNew bitcode linker flags:
Artem Belevich [Tue, 1 Sep 2015 17:55:55 +0000 (17:55 +0000)]
New bitcode linker flags:

-only-needed -- link in only symbols needed by destination module
-internalize -- internalize linked symbols

Differential Revision: http://reviews.llvm.org/D12459

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246561 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-readobj] MachO -- correctly dump section field 'Reserved3'
Davide Italiano [Tue, 1 Sep 2015 16:29:02 +0000 (16:29 +0000)]
[llvm-readobj] MachO -- correctly dump section field 'Reserved3'

Before we incorrectly ignored it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246556 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Lower READCYCLECOUNTER using MRS PMCCTNR_EL0.
Ahmed Bougacha [Tue, 1 Sep 2015 16:23:45 +0000 (16:23 +0000)]
[AArch64] Lower READCYCLECOUNTER using MRS PMCCTNR_EL0.

This matches the ARM behavior. In both cases, the register is part
of the optional Performance Monitors extension, so, add the feature,
and enable it for the A-class processors we support.

Differential Revision: http://reviews.llvm.org/D12425

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246555 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MC] Allow MCObjectWriter's output stream to be swapped out
David Majnemer [Tue, 1 Sep 2015 16:19:03 +0000 (16:19 +0000)]
[MC] Allow MCObjectWriter's output stream to be swapped out

There are occasions where it is useful to consider the entirety of the
contents of a section.  For example, compressed debug info needs the
entire section available before it can compress it and write it out.
The compressed debug info scenario was previously implemented by
mirroring the implementation of writeSectionData in the ELFObjectWriter.

Instead, allow the output stream to be swapped on demand.  This lets
callers redirect the output stream to a more convenient location before
it hits the object file.

No functionality change is intended.

Differential Revision: http://reviews.llvm.org/D12509

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246554 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: Implemented intrinsics for valign.
Igor Breger [Tue, 1 Sep 2015 15:27:18 +0000 (15:27 +0000)]
AVX512: Implemented intrinsics for valign.

Differential Revision: http://reviews.llvm.org/D12526

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246551 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agouse CHECK-LABEL for more precision
Sanjay Patel [Tue, 1 Sep 2015 14:35:05 +0000 (14:35 +0000)]
use CHECK-LABEL for more precision

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246547 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Turn on by default interleaved access vectorization
Silviu Baranga [Tue, 1 Sep 2015 11:26:46 +0000 (11:26 +0000)]
[AArch64] Turn on by default interleaved access vectorization

Summary:
This change turns on by default interleaved access vectorization
for AArch64.

We also clean up some tests which were spedifically enabling this
behaviour.

Reviewers: rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D12149

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246542 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Turn on by default interleaved access vectorization
Silviu Baranga [Tue, 1 Sep 2015 11:19:15 +0000 (11:19 +0000)]
[ARM] Turn on by default interleaved access vectorization

Summary:
This change turns on by default interleaved access vectorization on ARM,
as it has shown to be beneficial on ARM.

Reviewers: rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D12146

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246541 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM][AArch64] Turn on by default interleaved access lowering
Silviu Baranga [Tue, 1 Sep 2015 11:12:35 +0000 (11:12 +0000)]
[ARM][AArch64] Turn on by default interleaved access lowering

Summary:
Interleaved access lowering removes a memory operation and a
sequence of vector shuffles and replaces it with a series of
memory operations. This should be always beneficial.

This pass in only enabled on ARM/AArch64.

Reviewers: rengolin

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D12145

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246540 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix typo.
Yaron Keren [Tue, 1 Sep 2015 10:13:49 +0000 (10:13 +0000)]
Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246538 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoObject: Fix COFF import file's symbols.
Rui Ueyama [Tue, 1 Sep 2015 06:01:53 +0000 (06:01 +0000)]
Object: Fix COFF import file's symbols.

If a symbol is marked as "data", the symbol should be exported
with __imp_ prefix. Previously, the symbol was exported as-is.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246532 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agocmake: Error instead of warning and dropping invalid LLVM_USE_SANITIZER
Justin Bogner [Tue, 1 Sep 2015 05:45:07 +0000 (05:45 +0000)]
cmake: Error instead of warning and dropping invalid LLVM_USE_SANITIZER

Currently, if you call cmake with a typo in an LLVM_USE_SANITIZER
value, there's a cmake warning and the build goes on with no
sanitizers at all. This isn't a good behaviour, since cmake warnings
are fairly easy to miss and the resulting behaviour is that it looks
like the build is sanitizer clean.

Upgrade these warnings to errors so misconfigurations are more
obvious.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246531 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoEnable linking tools, shared libraries against libLLVM
Andrew Wilkins [Tue, 1 Sep 2015 03:14:31 +0000 (03:14 +0000)]
Enable linking tools, shared libraries against libLLVM

Summary:
Three closely related changes, to have a mode in which we link all
executables and shared libraries against libLLVM.

1. Add a new LLVM_LINK_LLVM_DYLIB cmake option, which, when ON, will link
   executables and shared libraries against libLLVM. For this to work, it
   is necessary to also set LLVM_BUILD_LLVM_DYLIB and LLVM_DYLIB_EXPORT_ALL.

   It is not strictly necessary to set LLVM_DISABLE_LLVM_DYLIB_ATEXIT, but
   we also default to OFF in this mode, or tools tend to misbehave (e.g.
   stdout may not flush on exit when output is buffered.)

   llvm-config and Tablegen do not use libLLVM, as they are dependencies of
   libLLVM.

2. Modify llvm-go to take a new flag, "linkmode=component-libs|dylib".
   Depending on which one is passed (default is component-libs), we link
   with the individual libraries or libLLVM respectively. We pass in dylib
   when LLVM_LINK_LLVM_DYLIB is ON.

3. Fix LLVM_DYLIB_EXPORT_ALL on Linux, and expand the symbols exported to
   actually export all. Don't strip leading underscore from symbols on Linux,
   and make sure we get all exported symbols and weak-with-default symbols
   ("W" in nm output). Without these changes, passes won't load because
   the "Annotate..." symbols defined in lib/Support/Valigrind.cpp are not
   found.

Testing:
 - Ran default build ("ninja") with LLVM, clang, compiler-rt, llgo, lldb.
 - Ran "check", "check-clang", "check-tsan", "check-libgo" targets. I've
   never had much success with LLDB tests, and llgoi is currently broken
   so check-llgo fails for an unrelated reason.
 - Ran "lldb" to ensure it loads.

Reviewers: chandlerc, beanz, pcc, rnk

Subscribers: rnk, chapuni, sylvestre.ledru, llvm-commits

Differential Revision: http://reviews.llvm.org/D12488

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246527 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix adding redundant implicit operands
Matt Arsenault [Tue, 1 Sep 2015 02:02:21 +0000 (02:02 +0000)]
AMDGPU: Fix adding redundant implicit operands

These are already added during the MachineInstr construction,
so this was adding the implicit registers twice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246525 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDistribute the weight on the edge from switch to default statement to edges generated...
Cong Hou [Tue, 1 Sep 2015 01:42:16 +0000 (01:42 +0000)]
Distribute the weight on the edge from switch to default statement to edges generated in lowering switch.

Currently, when edge weights are assigned to edges that are created when lowering switch statement, the weight on the edge to default statement (let's call it "default weight" here) is not considered. We need to distribute this weight properly. However, without value profiling, we have no idea how to distribute it. In this patch, I applied the heuristic that this weight is evenly distributed to successors.

For example, given a switch statement with cases 1,2,3,5,10,11,20, and every edge from switch to each successor has weight 10. If there is a binary search tree built to test if n < 10, then its two out-edges will have weight 4x10+10/2 = 45 and 3x10 + 10/2 = 35 respectively (currently they are 40 and 30 without considering the default weight). Each distribution (which is 5 here) will be stored in each SwitchWorkListItem for further distribution.

There are some exceptions:

For a jump table header which doesn't have any edge to default statement, we don't distribute the default weight to it.
For a bit test header which covers a contiguous range and hence has no edges to default statement, we don't distribute the default weight to it.
When the branch checks a single value or a contiguous range with no edge to default statement, we don't distribute the default weight to it.
In other cases, the default weight is evenly distributed to successors.

Differential Revision: http://reviews.llvm.org/D12418

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246522 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoremove unnecessary/conflicting target info
Sanjay Patel [Tue, 1 Sep 2015 00:27:36 +0000 (00:27 +0000)]
remove unnecessary/conflicting target info

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246514 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofixed test to specify triple rather than arch and CPU
Sanjay Patel [Tue, 1 Sep 2015 00:25:23 +0000 (00:25 +0000)]
fixed test to specify triple rather than arch and CPU

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246513 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLTO: Cleanup parameter names and header docs, NFC
Duncan P. N. Exon Smith [Mon, 31 Aug 2015 23:44:06 +0000 (23:44 +0000)]
LTO: Cleanup parameter names and header docs, NFC

Follow LLVM style for the parameter names (`CamelCase` not `camelCase`),
and surface the header docs in doxygen.  No functionality change
intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246509 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombine] Fixup SETCC legality checking
Hal Finkel [Mon, 31 Aug 2015 23:15:04 +0000 (23:15 +0000)]
[DAGCombine] Fixup SETCC legality checking

SETCC is one of those special node types for which operation actions (legality,
etc.) is keyed off of an operand type, not the node's value type. This makes
sense because the value type of a legal SETCC node is determined by its
operands' value type (via the TLI function getSetCCResultType). When the
SDAGBuilder creates SETCC nodes, it either creates them with an MVT::i1 value
type, or directly with the value type provided by TLI.getSetCCResultType.

The first problem being fixed here is that DAGCombine had several places
querying TLI.isOperationLegal on SETCC, but providing the return of
getSetCCResultType, instead of the operand type directly. This does not mean
what the author thought, and "luckily", most in-tree targets have SETCC with
Custom lowering, instead of marking them Legal, so these checks return false
anyway.

The second problem being fixed here is that two of the DAGCombines could create
SETCC nodes with arbitrary (integer) value types; specifically, those that
would simplify:

  (setcc a, b, op1) and|or (setcc a, b, op2) -> setcc a, b, op3
     (which is possible for some combinations of (op1, op2))

If the operands of the and|or node are actual setcc nodes, then this is not an
issue (because the and|or must share the same type), but, the relevant code in
DAGCombiner::visitANDLike and DAGCombiner::visitORLike actually calls
DAGCombiner::isSetCCEquivalent on each operand, and that function will
recognise setcc-like select_cc nodes with other return types. And, thus, when
creating new SETCC nodes, we need to be careful to respect the value-type
constraint. This is even true before type legalization, because it is quite
possible for the SELECT_CC node to have a legal type that does not happen to
match the corresponding TLI.getSetCCResultType type.

To be explicit, there is nothing that later fixes the value types of SETCC
nodes (if the type is legal, but does not happen to match
TLI.getSetCCResultType). Creating SETCCs with an MVT::i1 value type seems to
work only because, either MVT::i1 is not legal, or it is what
TLI.getSetCCResultType returns if it is legal. Fixing that is a larger change,
however. For the time being, restrict the relevant transformations to produce
only SETCC nodes with a value type matching TLI.getSetCCResultType (or MVT::i1
prior to type legalization).

Fixes PR24636.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246507 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agodon't set a legal vector type if we know we can't use that type (NFCI)
Sanjay Patel [Mon, 31 Aug 2015 22:59:03 +0000 (22:59 +0000)]
don't set a legal vector type if we know we can't use that type (NFCI)

Added benefit: the 'if' logic now matches the text of the comment that describes it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246506 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[BasicAA] Fix the handling of sext and zext in the analysis of GEPs.
Quentin Colombet [Mon, 31 Aug 2015 22:32:47 +0000 (22:32 +0000)]
[BasicAA] Fix the handling of sext and zext in the analysis of GEPs.
Hopefully this will end the GEPs saga!

This commit reverts r245394, i.e., it reapplies r221876 while incorporating the
fixes from D11847.
r221876 was not reapplied alone because it was not safe and D11847 was not
applied alone because it needs r221876 to produce correct results.

This should fix PR24596.

Original commit message for r221876:
Let's try this again...

This reverts r219432, plus a bug fix.

Description of the bug in r219432 (by Nick):

The bug was using AllPositive to break out of the loop; if the loop break
condition i != e is changed to i != e && AllPositive then the
test_modulo_analysis_with_global test I've added will fail as the Modulo will
be calculated incorrectly (as the last loop iteration is skipped, so Modulo
isn't updated with its Scale).

Nick also adds this comment:

ComputeSignBit is safe to use in loops as it takes into account phi nodes, and
the  == EK_ZeroEx check is safe in loops as, no matter how the variable changes
between iterations, zero-extensions will always guarantee a zero sign bit. The
isValueEqualInPotentialCycles check is therefore definitely not needed as all
the variable analysis holds no matter how the variables change between loop
iterations.

And this patch also adds another enhancement to GetLinearExpression - basically
to convert ConstantInts to Offsets (see test_const_eval and
test_const_eval_scaled for the situations this improves).

Original commit message:

This reverts r218944, which reverted r218714, plus a bug fix.

Description of the bug in r218714 (by Nick):

The original patch forgot to check if the Scale in VariableGEPIndex flipped the
sign of the variable. The BasicAA pass iterates over the instructions in the
order they appear in the function, and so BasicAliasAnalysis::aliasGEP is
called with the variable it first comes across as parameter GEP1. Adding a
%reorder label puts the definition of %a after %b so aliasGEP is called with %b
as the first parameter and %a as the second. aliasGEP later calculates that %a
== %b + 1 - %idxprom where %idxprom >= 0 (if %a was passed as the first
parameter it would calculate %b == %a - 1 + %idxprom where %idxprom >= 0) -
ignoring that %idxprom is scaled by -1 here lead the patch to incorrectly
conclude that %a > %b.

Revised patch by Nick White, thanks! Thanks to Lang to isolating the bug.
Slightly modified by me to add an early exit from the loop and avoid
unnecessary, but expensive, function calls.

Original commit message:

Two related things:

1. Fixes a bug when calculating the offset in GetLinearExpression. The code
   previously used zext to extend the offset, so negative offsets were converted
   to large positive ones.

2. Enhance aliasGEP to deduce that, if the difference between two GEP
   allocations is positive and all the variables that govern the offset are also
   positive (i.e. the offset is strictly after the higher base pointer), then
   locations that fit in the gap between the two base pointers are NoAlias.

Patch by Nick White!

Message from D11847:
Un-revert of r241981 and fix for PR23626. The 'Or' case of GetLinearExpression
delegates to 'Add' if possible, and if not it returns an Opaque value.
Unfortunately the Scale and Offsets weren't being set (and so defaulted to 0) -
and a scale of zero effectively removes the variable from the GEP instruction.
This meant that BasicAA would return MustAliases when it should have been
returning PartialAliases (and PR23626 was an example of the GVN pass using an
incorrect MustAlias to merge loads from what should have been different
pointers).

Differential Revision: http://reviews.llvm.org/D11847
Patch by Nick White <n.j.white@gmail.com>!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246502 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoWebAssembly: generate load/store
JF Bastien [Mon, 31 Aug 2015 22:24:11 +0000 (22:24 +0000)]
WebAssembly: generate load/store

Summary: This handles all load/store operations that WebAssembly defines, and handles those necessary for C++ such as i1. I left a FIXME for outstanding features which aren't required for now.

Reviewers: sunfish

Subscribers: jfb, llvm-commits, dschuff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246500 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoInfrastructure changes for Clang r246497.
Richard Smith [Mon, 31 Aug 2015 22:17:24 +0000 (22:17 +0000)]
Infrastructure changes for Clang r246497.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246498 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agogeneralize helper function of MergeConsecutiveStores to handle vector types (NFCI)
Sanjay Patel [Mon, 31 Aug 2015 21:50:16 +0000 (21:50 +0000)]
generalize helper function of MergeConsecutiveStores to handle vector types (NFCI)

This was part of D7208 (r227242), but that commit was reverted because it exposed
a bug in AArch64 lowering. I should have that fixed and the rest of the commit
reinstated soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246493 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "[lit] Speculatively fix PR24554 by manually closing the process handle"
Reid Kleckner [Mon, 31 Aug 2015 21:42:02 +0000 (21:42 +0000)]
Revert "[lit] Speculatively fix PR24554 by manually closing the process handle"

This reverts commit r245946. It didn't help the problem:
http://lab.llvm.org:8011/builders/sanitizer-windows/builds/9179/steps/run%20tests/logs/stdio
LINK : fatal error LNK1104: cannot open file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246491 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix bug in method LLLexer::FP80HexToIntPair
Karl Schimpf [Mon, 31 Aug 2015 21:36:14 +0000 (21:36 +0000)]
Fix bug in method LLLexer::FP80HexToIntPair

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246489 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix Windows build by including raw_ostream.h
Hans Wennborg [Mon, 31 Aug 2015 21:19:18 +0000 (21:19 +0000)]
Fix Windows build by including raw_ostream.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246486 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix CHECK directives that weren't checking.
Hans Wennborg [Mon, 31 Aug 2015 21:10:35 +0000 (21:10 +0000)]
Fix CHECK directives that weren't checking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246485 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRollback of commit "Repress sanitization on User dtor."
Naomi Musgrave [Mon, 31 Aug 2015 21:06:08 +0000 (21:06 +0000)]
Rollback of commit "Repress sanitization on User dtor."
This would have suppressed bug 24578, about use-after-
destroy on User and MDNode. Rolled back suppression for
the sake of code cleanliness, in preferance for bug
tracking to keep track of this issue.

This reverts commit 6ff2baabc4625d5b0a8dccf76aa0f72d930ea6c0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246484 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombine] Use getSetCCResultType utility function
Hal Finkel [Mon, 31 Aug 2015 20:42:38 +0000 (20:42 +0000)]
[DAGCombine] Use getSetCCResultType utility function

DAGCombine has a utility wrapper around TLI's getSetCCResultType; use it in the
one place in DAGCombine still directly calling the TLI function. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246482 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] enable machine combiner reassociations for scalar 'or' insts
Sanjay Patel [Mon, 31 Aug 2015 20:27:03 +0000 (20:27 +0000)]
[x86] enable machine combiner reassociations for scalar 'or' insts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246481 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[EH] Handle non-Function personalities like unknown personalities
Reid Kleckner [Mon, 31 Aug 2015 20:02:16 +0000 (20:02 +0000)]
[EH] Handle non-Function personalities like unknown personalities

Also delete and simplify a lot of MachineModuleInfo code that used to be
needed to handle personalities on landingpads.  Now that the personality
is on the LLVM Function, we no longer need to track it this way on MMI.
Certainly it should not live on LandingPadInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246478 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[FunctionAttr] Infer nonnull attributes on returns
Philip Reames [Mon, 31 Aug 2015 19:44:38 +0000 (19:44 +0000)]
[FunctionAttr] Infer nonnull attributes on returns

Teach FunctionAttr to infer the nonnull attribute on return values of functions which never return a potentially null value. This is done both via a conservative local analysis for the function itself and a optimistic per-SCC analysis. If no function in the SCC returns anything which could be null (other than values from other functions in the SCC), we can conclude no function returned a null pointer. Even if some function within the SCC returns a null pointer, we may be able to locally conclude that some don't.

Differential Revision: http://reviews.llvm.org/D9688

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246476 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-readobj] Dump MachO Dysymtab command.
Davide Italiano [Mon, 31 Aug 2015 19:32:31 +0000 (19:32 +0000)]
[llvm-readobj] Dump MachO Dysymtab command.

Example output:

File: <stdin>
Format: Mach-O 64-bit x86-64
Arch: x86_64
AddressSize: 64bit
Dysymtab {

ilocalsym: 0
nlocalsym: 6
iextdefsym: 6
nextdefsym: 2
iundefsym: 8
nundefsym: 0
tocoff: 0
ntoc: 0
modtaboff: 0
nmodtab: 0
extrefsymoff: 0
nextrefsyms: 0
indirectsymoff: 0
nindirectsyms: 0
extreloff: 0
nextrel: 0
locreloff: 0
nlocrel: 0

}

Differential Revision: http://reviews.llvm.org/D12496

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246474 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64][CollectLOH] Remove an invalid assertion and add a test case exposing it.
Quentin Colombet [Mon, 31 Aug 2015 19:02:00 +0000 (19:02 +0000)]
[AArch64][CollectLOH] Remove an invalid assertion and add a test case exposing it.

rdar://problem/22491525

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246472 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[libFuzzer] update the docs to mention llvm-as-fuzzer
Kostya Serebryany [Mon, 31 Aug 2015 18:57:24 +0000 (18:57 +0000)]
[libFuzzer] update the docs to mention llvm-as-fuzzer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246471 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoUndo reversion on commit: Revert "Revert "Repress sanitization on User dtor.
Naomi Musgrave [Mon, 31 Aug 2015 18:49:31 +0000 (18:49 +0000)]
Undo reversion on commit: Revert "Revert "Repress sanitization on User dtor.
Modify msan macros for applying attribute""

This reverts commit 020e70a79878c96457e6882bcdfaf6628baf32b7.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246470 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombine] Remove some old dead code for forming SETCC nodes
Hal Finkel [Mon, 31 Aug 2015 18:38:55 +0000 (18:38 +0000)]
[DAGCombine] Remove some old dead code for forming SETCC nodes

This code was dead when it was committed in r23665 (Oct 7, 2005), and before it
reaches its 10th anniversary, it really should go. We can always bring it back
if we'd like, but it forms more SETCC nodes, and the way we do legality
checking on SETCC nodes is wrong in a number of places, and removing this means
fewer places to fix. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246466 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LazyValueInfo] Look through Phi nodes when trying to prove a predicate
Philip Reames [Mon, 31 Aug 2015 18:31:48 +0000 (18:31 +0000)]
[LazyValueInfo] Look through Phi nodes when trying to prove a predicate

If asked to prove a predicate about a value produced by a PHI node, LazyValueInfo was unable to do so even if the predicate was known to be true for each input to the PHI. This prevented JumpThreading from eliminating a provably redundant branch.

The problematic test case looks something like this:
ListNode *p = ...;
while (p != null) {
  if (!p) return;
  x = g->x; // unrelated
  p = p->next
}

The null check at the top of the loop is redundant since the value of 'p' is null checked on entry to the loop and before executing the backedge. This resulted in us a) executing an extra null check per iteration and b) not being able to LICM unrelated loads after the check since we couldn't prove they would execute or that their dereferenceability wasn't effected by the null check on the first iteration.

Differential Revision: http://reviews.llvm.org/D12383

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246465 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRework of the new interface for shrink wrapping
Kit Barton [Mon, 31 Aug 2015 18:26:45 +0000 (18:26 +0000)]
Rework of the new interface for shrink wrapping

Based on comments from Hal
(http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20150810/292978.html),
I've changed the interface to add a callback mechanism to the
TargetFrameLowering class to query whether the specific target
supports shrink wrapping.  By default, shrink wrapping is disabled by
default. Each target can override the default behaviour using the
TargetFrameLowering::targetSupportsShrinkWrapping() method. Shrink
wrapping can still be explicitly enabled or disabled from the command
line, using the existing -enable-shrink-wrap=<true|false> option.

Phabricator: http://reviews.llvm.org/D12293

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246463 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAArch64: Fix loads to lower NEON vector lanes using GPR registers
Matthias Braun [Mon, 31 Aug 2015 18:25:15 +0000 (18:25 +0000)]
AArch64: Fix loads to lower NEON vector lanes using GPR registers

The ISelLowering code turned insertion turned the element for the
lowest lane of a BUILD_VECTOR into an INSERT_SUBREG, this prohibited
the patterns for SCALAR_TO_VECTOR(Load) to match later. Restrict this
to cases without a load argument.

Reported in rdar://22223823

Differential Revision: http://reviews.llvm.org/D12467

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246462 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoX86: Fix FastISel SSESelect register class
Matthias Braun [Mon, 31 Aug 2015 18:25:11 +0000 (18:25 +0000)]
X86: Fix FastISel SSESelect register class

X86FastISel has been using the wrong register class for VBLENDVPS which
produces a VR128 and needs an extra copy to the target register. The
problem was already hit by the existing test cases when using
> llvm-lit -Dllc="llc -verify-machineinstr"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246461 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[BitcodeReader] Ensure we can read constant vector selects with an i1 condition
Filipe Cabecinhas [Mon, 31 Aug 2015 18:00:30 +0000 (18:00 +0000)]
[BitcodeReader] Ensure we can read constant vector selects with an i1 condition

Summary:
Constant vectors weren't allowed to have an i1 condition in the
BitcodeReader. Make sure we have the same restrictions that are
documented, not more.

Reviewers: nlewycky, rafael, kschimpf

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12440

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246459 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoBuild a lib/Fuzzer version for llvm-as.
Karl Schimpf [Mon, 31 Aug 2015 17:55:32 +0000 (17:55 +0000)]
Build a lib/Fuzzer version for llvm-as.

Summary:
This CL is associated with a fuzzing effort to find bugs in LLVM. The
first step is to fuzz llvm-as to find potential issues in generating
IR. Both afl-fuzz and LLVM's lib/Fuzzer are being used.

This CL introduces the executable that implements the in-process
fuzzer using LLVM's lib/Fuzzer. The motivation for using lib/Fuzzer is
based on time comparisons between afl-fuzz and lib/Fuzzer. Early
results show that per-process, the lib/Fuzzer implemenation of llvm-as
(i.e. this CL) generates over 30 times the number of mutations found
by afl-fuzz, per hour runtime. The speedup is due to the removal of
overhead of forking a process, and loading the executable into memory.

I placed this under the tools directory, since it is an executable. It
is also only conditionally built if (using cmake) the flag
LLVM_USEE_SANITIZE_COVERAGE is used, so that it isn't built by
default.

Reviewers: kcc, filcab

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12438

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246458 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MC/AsmParser] Avoid setting MCSymbol.IsUsed in some cases
Vedant Kumar [Mon, 31 Aug 2015 17:44:53 +0000 (17:44 +0000)]
[MC/AsmParser] Avoid setting MCSymbol.IsUsed in some cases

Avoid marking some MCSymbols as used in MC/AsmParser.cpp when no uses
exist. This fixes a bug in parseAssignmentExpression() which
inadvertently sets IsUsed, thereby triggering:

    "invalid re-assignment of non-absolute variable"

on otherwise valid code. No other functionality change intended.

The original version of this patch touched many calls to MCSymbol
accessors. On rafael's advice, I have stripped this patch down a bit.

As a follow-up, I intend to find the call sites which intentionally set
IsUsed and force them to do so explicitly.

Differential Revision: http://reviews.llvm.org/D12347

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246457 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[llvm-readobj] Add pair of missing braces.
Davide Italiano [Mon, 31 Aug 2015 17:12:23 +0000 (17:12 +0000)]
[llvm-readobj] Add pair of missing braces.

This fixes a regression introduced in r246151.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246453 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoChange comment to verify commit accesss.
Karl Schimpf [Mon, 31 Aug 2015 16:43:55 +0000 (16:43 +0000)]
Change comment to verify commit accesss.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246451 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Repress sanitization on User dtor. Modify msan macros for applying attribute"
Naomi Musgrave [Mon, 31 Aug 2015 16:26:44 +0000 (16:26 +0000)]
Revert "Repress sanitization on User dtor. Modify msan macros for applying attribute"

This reverts commit 5e3bfbb38eb3fb6f568b107f6b239e0aa4c5f334.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246450 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRepress sanitization on User dtor. Modify msan macros for applying attribute
Naomi Musgrave [Mon, 31 Aug 2015 15:57:40 +0000 (15:57 +0000)]
Repress sanitization on User dtor. Modify msan macros for applying attribute
to repress sanitization. Move attribute for repressing sanitization to
operator delete for User, MDNode.

Summary: In response to bug 24578, reported against failing LLVM test.

Reviewers: chandlerc, rsmith, eugenis

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12335

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246449 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[SectionMemoryManager] Use range-based for loops. No functional change intended.
Benjamin Kramer [Mon, 31 Aug 2015 13:39:14 +0000 (13:39 +0000)]
[SectionMemoryManager] Use range-based for loops. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246440 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: ktest implemantation
Igor Breger [Mon, 31 Aug 2015 13:30:19 +0000 (13:30 +0000)]
AVX512: ktest implemantation
Added tests for encoding.

Differential Revision: http://reviews.llvm.org/D11979

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246439 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: Implemented encoding and intrinsics for vdbpsadbw
Igor Breger [Mon, 31 Aug 2015 13:09:30 +0000 (13:09 +0000)]
AVX512: Implemented encoding and intrinsics for vdbpsadbw
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D12491

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246436 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: kadd implementation
Igor Breger [Mon, 31 Aug 2015 11:50:23 +0000 (11:50 +0000)]
AVX512: kadd implementation
Added tests for encoding.

Differential Revision: http://reviews.llvm.org/D11973

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246432 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: Add encoding tests for vscatter instructions
Igor Breger [Mon, 31 Aug 2015 11:33:50 +0000 (11:33 +0000)]
AVX512: Add encoding tests for vscatter instructions

Differential Revision: http://reviews.llvm.org/D11941

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246431 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAVX512: Implemented encoding and intrinsics for vpalignr
Igor Breger [Mon, 31 Aug 2015 11:14:02 +0000 (11:14 +0000)]
AVX512: Implemented encoding and intrinsics for vpalignr
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D12270

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246428 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AggressiveAntiDepBreaker] Check for EarlyClobber on defining instruction
Hal Finkel [Mon, 31 Aug 2015 07:51:36 +0000 (07:51 +0000)]
[AggressiveAntiDepBreaker] Check for EarlyClobber on defining instruction

AggressiveAntiDepBreaker was doing some EarlyClobber checking, but was not
checking that the register being potentially renamed was defined by an
early-clobber def where there was also a use, in that instruction, of the
register being considered as the target of the rename. Fixes PR24014.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246423 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoForce the locale when executing ld gold
Sylvestre Ledru [Mon, 31 Aug 2015 07:10:05 +0000 (07:10 +0000)]
Force the locale when executing ld gold

Summary:
If run with other locales (like French),
the decode operation might fail

Reviewers: rafael

Differential Revision: http://reviews.llvm.org/D12432

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246421 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[JumpThreading] make jump threading respect convergent annotation.
Jingyue Wu [Mon, 31 Aug 2015 06:10:27 +0000 (06:10 +0000)]
[JumpThreading] make jump threading respect convergent annotation.

Summary:
JumpThreading shouldn't duplicate a convergent call, because that would move a convergent call into a control-inequivalent location. For example,
  if (cond) {
    ...
  } else {
    ...
  }
  convergent_call();
  if (cond) {
    ...
  } else {
    ...
  }
should not be optimized to
  if (cond) {
    ...
    convergent_call();
    ...
  } else {
    ...
    convergent_call();
    ...
  }

Test Plan: test/Transforms/JumpThreading/basic.ll

Patch by Xuetian Weng.

Reviewers: resistor, arsenm, jingyue

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12484

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246415 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dsymutil] Do not mistakenly reuse the current object file when the next one isn...
Frederic Riss [Mon, 31 Aug 2015 05:16:35 +0000 (05:16 +0000)]
[dsymutil] Do not mistakenly reuse the current object file when the next one isn't found.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246412 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dsymutil] Fix testcase.
Frederic Riss [Mon, 31 Aug 2015 05:16:30 +0000 (05:16 +0000)]
[dsymutil] Fix testcase.

This testcase required 2 copies of the same file, and the second
copy was missing. It was currently working because of a bug I'm
about to fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246411 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dsymutil] Do not crash on empty debug_range range.
Frederic Riss [Mon, 31 Aug 2015 05:09:32 +0000 (05:09 +0000)]
[dsymutil] Do not crash on empty debug_range range.

The fix is trivial (The actual patch is 2 lines, but as it changes
indentation it looks like more).
clang does not produce this kind of (slightly bogus) debug info
anymore, thus I had to rely on a hand-crafted assembly test to trigger
that case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246410 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dsymutil] Fix caching of current range. NFC.
Frederic Riss [Mon, 31 Aug 2015 05:09:26 +0000 (05:09 +0000)]
[dsymutil] Fix caching of current range. NFC.

The current range cache will will just be hit more often, no
visible external change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246409 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dsymutil] Fix handling of inlined_subprogram low_pcs
Frederic Riss [Mon, 31 Aug 2015 01:43:14 +0000 (01:43 +0000)]
[dsymutil] Fix handling of inlined_subprogram low_pcs

The value of an inlined subprogram low_pc attribute should not
get relocated, but it can happen that it matches the enclosing
function's start address and thus gets the generic treatment.
Special case it to avoid applying the PC offset twice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246406 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dsymutil] Do not construct a StringRef from a std::string temporary
Frederic Riss [Mon, 31 Aug 2015 00:49:34 +0000 (00:49 +0000)]
[dsymutil] Do not construct a StringRef from a std::string temporary

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246404 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[dsymutil] Implement -symtab/-s option.
Frederic Riss [Mon, 31 Aug 2015 00:29:09 +0000 (00:29 +0000)]
[dsymutil] Implement -symtab/-s option.

This option dumps the STAB entries that define the debug map(s)
stored in the input binaries, and then exits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246403 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSupport: Support LLVM_ENABLE_THREADS=0 in llvm/Support/thread.h.
Peter Collingbourne [Mon, 31 Aug 2015 00:09:01 +0000 (00:09 +0000)]
Support: Support LLVM_ENABLE_THREADS=0 in llvm/Support/thread.h.

Specifically, the header now provides llvm::thread, which is either a
typedef of std::thread or a replacement that calls the function synchronously
depending on the value of LLVM_ENABLE_THREADS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246402 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Fixup SELECT_CC (and SETCC) patterns with i1 comparison operands
Hal Finkel [Sun, 30 Aug 2015 22:12:50 +0000 (22:12 +0000)]
[PowerPC] Fixup SELECT_CC (and SETCC) patterns with i1 comparison operands

There were really two problems here. The first was that we had the truth tables
for signed i1 comparisons backward. I imagine these are not very common, but if
you have:
  setcc i1 x, y, LT
this has the '0 1' and the '1 0' results flipped compared to:
  setcc i1 x, y, ULT
because, in the signed case, '1 0' is really '-1 0', and the answer is not the
same as in the unsigned case.

The second problem was that we did not have patterns (at all) for the unsigned
comparisons select_cc nodes for i1 comparison operands. This was the specific
cause of PR24552. These had to be added (and a missing Altivec promotion added
as well) to make sure these function for all types. I've added a bunch more
test cases for these patterns, and there are a few FIXMEs in the test case
regarding code-quality.

Fixes PR24552.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246400 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNFC: Code style in VectorUtils.cpp
Elena Demikhovsky [Sun, 30 Aug 2015 13:48:02 +0000 (13:48 +0000)]
NFC: Code style in VectorUtils.cpp

Differential Revision: http://reviews.llvm.org/D12478

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246381 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Revert "New interface function is added to VectorUtils Value *getSplatValue...
Renato Golin [Sun, 30 Aug 2015 10:49:04 +0000 (10:49 +0000)]
Revert "Revert "New interface function is added to VectorUtils Value *getSplatValue(Value *Val);""

This reverts commit r246379. It seems that the commit was not the culprit,
and the bot will be investigated for instability.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246380 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "New interface function is added to VectorUtils Value *getSplatValue(Value...
Renato Golin [Sun, 30 Aug 2015 10:05:30 +0000 (10:05 +0000)]
Revert "New interface function is added to VectorUtils Value *getSplatValue(Value *Val);"

This reverts commit r246371, as it cause a rather obscure bug in AArch64
test-suite paq8p (time outs, seg-faults). I'll investigate it before
reapplying.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246379 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoStop calling the flat out insane ARM target parsing code unless the
Chandler Carruth [Sun, 30 Aug 2015 09:54:34 +0000 (09:54 +0000)]
Stop calling the flat out insane ARM target parsing code unless the
architecture string is something quite weird. Similarly delay calling
the BPF parsing code, although that is more reasonable.

To understand why I was motivated to make this change, it cuts the time
for running the ADT TripleTest unittests by a factor of two in
non-optimized builds (the developer default) and reduces my 'check-llvm'
time by a full 15 seconds. The implementation of parseARMArch is *that*
slow. I tried to fix it in the prior series of commits, but frankly,
I have no idea how to finish fixing it. The entire premise of the
function (to allow 'v7a-unknown-linux' or some such to parse as an
'arm-unknown-linux' triple) seems completely insane to me, but I'll let
the ARM folks sort that out. At least it is now out of the critical path
of every developer working on LLVM. It also will likely make some other
folks' code significantly faster as I've heard reports of 2% of time
spent in triple parsing even in optimized builds!

I'm not done making this code faster, but I am done trying to improve
the ARM target parsing code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246378 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove a linear walk to find the default FPU for a given CPU by directly
Chandler Carruth [Sun, 30 Aug 2015 09:01:38 +0000 (09:01 +0000)]
Remove a linear walk to find the default FPU for a given CPU by directly
expanding the .def file within a StringSwitch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246377 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MIR Serialization] static -> static const in getSerializable*MachineOperandTargetFlags
Hal Finkel [Sun, 30 Aug 2015 08:07:29 +0000 (08:07 +0000)]
[MIR Serialization] static -> static const in getSerializable*MachineOperandTargetFlags

Make the arrays 'static const' instead of just 'static'. Post-commit review
comment from Roman Divacky on IRC. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246376 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoTeach the target parsing framework to directly compute the length of all
Chandler Carruth [Sun, 30 Aug 2015 07:51:04 +0000 (07:51 +0000)]
Teach the target parsing framework to directly compute the length of all
of its strings when expanding the string literals from the macros, and
push all of the APIs to be StringRef instead of C-string APIs.

This (remarkably) removes a very non-trivial number of strlen calls. It
even deletes code and complexity from one of the primary users -- Clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246374 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC/MIR Serialization] Target flags serialization support
Hal Finkel [Sun, 30 Aug 2015 07:50:35 +0000 (07:50 +0000)]
[PowerPC/MIR Serialization] Target flags serialization support

Add support for MIR serialization of PowerPC-specific operand target flags
(based on the generic infrastructure added in r244185 and r245383).

I won't even pretend that this is good test coverage, but this includes the
regression test associated with r246372. Adding an MIR test for that fix is far
superior to adding an IR-level test because particular instruction-scheduling
decisions are necessary in order to expose the bug, and using an MIR test we
can start the pipeline post-scheduling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246373 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC] Don't assume ADDISdtprelHA's source is r3
Hal Finkel [Sun, 30 Aug 2015 07:44:05 +0000 (07:44 +0000)]
[PowerPC] Don't assume ADDISdtprelHA's source is r3

Even through ADDISdtprelHA generally has r3 as its source register, it is
possible for the instruction scheduler to move things around such that some
other register is the source. We need to print the actual source register, not
always r3. Fixes PR24394.

The test case will come in a follow-up commit because it depends on MIR
target-flags parsing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246372 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNew interface function is added to VectorUtils
Elena Demikhovsky [Sun, 30 Aug 2015 07:28:18 +0000 (07:28 +0000)]
New interface function is added to VectorUtils
Value *getSplatValue(Value *Val);

It complements the CreateVectorSplat(), which creates 2 instructions - insertelement and shuffle with all-zero mask.

The new function recognizes the pattern - insertelement+shuffle and returns the splat value (or nullptr).
It also returns a splat value form ConstantDataVector, for completeness.

Differential Revision: http://reviews.llvm.org/D11124

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246371 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRefactor the ARM target parsing to use a def file with macros to expand
Chandler Carruth [Sun, 30 Aug 2015 05:27:31 +0000 (05:27 +0000)]
Refactor the ARM target parsing to use a def file with macros to expand
the necessary tables.

This will allow me to restructure the code and structures using this to
be significantly more efficient. It also removes the duplication of the
list of several enumerators. It also enshrines that the order of
enumerators match the order of the entries in the tables, something the
implementation code actually uses.

No functionality changed (yet).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246370 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Triple] Use clang-format to normalize the formatting of the ARM target
Chandler Carruth [Sun, 30 Aug 2015 02:17:15 +0000 (02:17 +0000)]
[Triple] Use clang-format to normalize the formatting of the ARM target
parsing logic prior to making substantial changes to it.

This parsing logic is incredibly wasteful, so I'm planning to rewrite
it. Just unittesting the triple parsing logic spends well over 80% of
its time in the ARM parsing logic, and others have measured significant
time spent here in real production compiles.

Stay tuned...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246369 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Triple] Stop abusing a class to have only static methods and just use
Chandler Carruth [Sun, 30 Aug 2015 02:09:48 +0000 (02:09 +0000)]
[Triple] Stop abusing a class to have only static methods and just use
the namespace that we are already using for the enums that are produced
by the parsing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246367 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoSelectionDAG: add missing ComputeSignBits case for SELECT_CC
Fiona Glaser [Sat, 29 Aug 2015 23:04:38 +0000 (23:04 +0000)]
SelectionDAG: add missing ComputeSignBits case for SELECT_CC

Identical to SELECT, just with different operand numbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246366 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix shared library build.
Peter Collingbourne [Sat, 29 Aug 2015 22:34:34 +0000 (22:34 +0000)]
Fix shared library build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246365 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Fix up buildbots after r246360
James Molloy [Sat, 29 Aug 2015 11:50:08 +0000 (11:50 +0000)]
[ARM] Fix up buildbots after r246360

I have no idea how I missed this in my internal testing. Just no idea. Sorry for the bot-armageddon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246361 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Hoist fabs/fneg above a conversion to float.
James Molloy [Sat, 29 Aug 2015 10:49:11 +0000 (10:49 +0000)]
[ARM] Hoist fabs/fneg above a conversion to float.

This is especially visible in softfp mode, for example in the implementation of libm fabs/fneg functions. If we have:

%1 = vmovdrr r0, r1
%2 = fabs %1

then move the fabs before the vmovdrr:

%1 = and r1, #0x7FFFFFFF
%2 = vmovdrr r0, r1

This is never a lose, and could be a serious win because the vmovdrr may be followed by a vmovrrd, which would enable us to remove the conversion into FPRs completely.

We already do this for f32, but not for f64. Tests are added for both.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246360 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Add sdst operand to VOP2b instructions
Matt Arsenault [Sat, 29 Aug 2015 07:16:50 +0000 (07:16 +0000)]
AMDGPU: Add sdst operand to VOP2b instructions

The VOP3 encoding of these allows any SGPR pair for the i1
output, but this was forced before to always use vcc.
This doesn't yet try to use this, but does add the operand
to the definitions so the main change is adding vcc to the
output of the VOP2 encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246358 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Set mem operands for spill instructions
Matt Arsenault [Sat, 29 Aug 2015 06:48:57 +0000 (06:48 +0000)]
AMDGPU: Set mem operands for spill instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246357 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU: Fix dropping mem operands when moving to VALU
Matt Arsenault [Sat, 29 Aug 2015 06:48:46 +0000 (06:48 +0000)]
AMDGPU: Fix dropping mem operands when moving to VALU

Without a memory operand, mayLoad or mayStore instructions
are treated as hasUnorderedMemRef, which results in much worse
scheduling.

We really should have a verifier check that any
non-side effecting mayLoad or mayStore has a memory operand.
There are a few instructions (interp and images) which I'm
not sure what / where to add these.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246356 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU/SI: Fix some invaild assumptions when folding 64-bit immediates
Tom Stellard [Sat, 29 Aug 2015 01:58:21 +0000 (01:58 +0000)]
AMDGPU/SI: Fix some invaild assumptions when folding 64-bit immediates

Summary:
We were assuming tha if the use operand had a sub-register that
the immediate was 64-bits, but this was breaking the case of
folding a 64-bit immediate into another 64-bit instruction.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D12255

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246354 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAMDGPU/SI: Factor operand folding code into its own function
Tom Stellard [Fri, 28 Aug 2015 23:45:19 +0000 (23:45 +0000)]
AMDGPU/SI: Factor operand folding code into its own function

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D12254

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246353 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r246350, "The host and default target triples do not need to match for "native""
NAKAMURA Takumi [Fri, 28 Aug 2015 23:33:17 +0000 (23:33 +0000)]
Revert r246350, "The host and default target triples do not need to match for "native""

Wrong assumption. Consider --host=x86_64-linux --target=(i686|x86_64)-win32. See also r193459.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246352 91177308-0d34-0410-b5e6-96231b3b80d8