oota-llvm.git
11 years ago[SystemZ] Define remainig *MUL_LOHI patterns
Richard Sandiford [Wed, 21 Aug 2013 09:34:56 +0000 (09:34 +0000)]
[SystemZ] Define remainig *MUL_LOHI patterns

The initial port used MLG(R) for i64 UMUL_LOHI but left the other three
combinations as not-legal-or-custom.  Although 32x32->{32,32}
multiplications exist, they're not as quick as doing a normal 64-bit
multiplication, so it didn't seem like i32 SMUL_LOHI and UMUL_LOHI
would be useful.  There's also no direct instruction for i64 SMUL_LOHI,
so it needs to be implemented in terms of UMUL_LOHI.

However, not defining these patterns means that we don't convert
division by a constant into multiplication, so this patch fills
in the other cases.  The new i64 SMUL_LOHI sequence is simpler
than the one that we used previously for 64x64->128 multiplication,
so int-mul-08.ll now tests the full sequence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188898 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMCFunction.h: Prune \returns to fix a warning in r188881. [-Wdocumentation]
NAKAMURA Takumi [Wed, 21 Aug 2013 09:34:22 +0000 (09:34 +0000)]
MCFunction.h: Prune \returns to fix a warning in r188881. [-Wdocumentation]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188897 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Matheus Almeida pointed out a silly mistake in r188893. Fixed it.
Daniel Sanders [Wed, 21 Aug 2013 09:09:52 +0000 (09:09 +0000)]
[mips][msa] Matheus Almeida pointed out a silly mistake in r188893. Fixed it.

I accidentally changed the encoding of the MSA registers to zero instead of 0
to 31. This change restores the encoding the registers had prior to r188893.

This didn't show up in the existing tests because direct-object emission isn't
implemented yet for MSA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188896 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Use FI[EDX]BRA for codegen
Richard Sandiford [Wed, 21 Aug 2013 09:04:20 +0000 (09:04 +0000)]
[SystemZ] Use FI[EDX]BRA for codegen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188895 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Add FI[EDX]BRA
Richard Sandiford [Wed, 21 Aug 2013 08:58:08 +0000 (08:58 +0000)]
[SystemZ] Add FI[EDX]BRA

These are extensions of the existing FI[EDX]BR instructions, but use a spare
bit to suppress inexact conditions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188894 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Define registers using foreach
Daniel Sanders [Wed, 21 Aug 2013 08:48:25 +0000 (08:48 +0000)]
[mips][msa] Define registers using foreach

No functional change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188893 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Add YAML MCModule representation to enable MC CFG testing.
Ahmed Bougacha [Wed, 21 Aug 2013 07:29:02 +0000 (07:29 +0000)]
MC CFG: Add YAML MCModule representation to enable MC CFG testing.

Like yaml ObjectFiles, this will be very useful for testing the MC CFG
implementation (mostly MCObjectDisassembler), by matching the output
with YAML, and for potential users of the MC CFG, by using it as an input.

There isn't much to the actual format, it is just a serialization of the
MCModule class. Of note:
  - Basic block references (pred/succ, ..) are represented by the BB's
    start address.
  - Just as in the MC CFG, instructions are MCInsts with a size.
  - Operands have a prefix representing the type (only register and
    immediate supported here).
  - Instruction opcodes are represented by their names; enum values aren't
    stable, enum names mostly are: usually, a change to a name would need
    lots of changes in the backend anyway.
    Same with registers.

All in all, an example is better than 1000 words, here goes:

A simple binary:

  Disassembly of section __TEXT,__text:
  _main:
  100000f9c:      48 8b 46 08             movq    8(%rsi), %rax
  100000fa0:      0f be 00                movsbl  (%rax), %eax
  100000fa3:      3b 04 25 48 00 00 00    cmpl    72, %eax
  100000faa:      0f 8c 07 00 00 00       jl      7 <.Lend>
  100000fb0:      2b 04 25 48 00 00 00    subl    72, %eax
  .Lend:
  100000fb7:      c3                      ret

And the (pretty verbose) generated YAML:

  ---
  Atoms:
    - StartAddress:    0x0000000100000F9C
      Size:            20
      Type:            Text
      Content:
        - Inst:            MOV64rm
          Size:            4
          Ops:             [ RRAX, RRSI, I1, R, I8, R ]
        - Inst:            MOVSX32rm8
          Size:            3
          Ops:             [ REAX, RRAX, I1, R, I0, R ]
        - Inst:            CMP32rm
          Size:            7
          Ops:             [ REAX, R, I1, R, I72, R ]
        - Inst:            JL_4
          Size:            6
          Ops:             [ I7 ]
    - StartAddress:    0x0000000100000FB0
      Size:            7
      Type:            Text
      Content:
        - Inst:            SUB32rm
          Size:            7
          Ops:             [ REAX, REAX, R, I1, R, I72, R ]
    - StartAddress:    0x0000000100000FB7
      Size:            1
      Type:            Text
      Content:
        - Inst:            RET
          Size:            1
          Ops:             [  ]
  Functions:
    - Name:            __text
      BasicBlocks:
        - Address:         0x0000000100000F9C
          Preds:           [  ]
          Succs:           [ 0x0000000100000FB7, 0x0000000100000FB0 ]
     <snip>
  ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188890 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Support disassembly at arbitrary addresses in MCObjectDisassembler.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:55 +0000 (07:28 +0000)]
MC CFG: Support disassembly at arbitrary addresses in MCObjectDisassembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188889 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Use data structures more appropriate than std::set.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:51 +0000 (07:28 +0000)]
MC CFG: Use data structures more appropriate than std::set.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188888 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Add an MCObjectSymbolizer in the MCObjectDisassembler.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:48 +0000 (07:28 +0000)]
MC CFG: Add an MCObjectSymbolizer in the MCObjectDisassembler.

Used to detect calls to function symbol stubs (future commit).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188887 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Add MCObjectDisassembler Mach-O implementation.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:44 +0000 (07:28 +0000)]
MC CFG: Add MCObjectDisassembler Mach-O implementation.

Supports:
- entrypoint, using LC_MAIN.
- static ctors/dtors, using __mod_{init,exit}_func
- translation between effective and object load address, using
  dyld's VM address slide.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188886 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd Mach-O entry_point_command declaration.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:40 +0000 (07:28 +0000)]
Add Mach-O entry_point_command declaration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188885 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Add "dynamic disassembly" support to MCObjectDisassembler.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:37 +0000 (07:28 +0000)]
MC CFG: Add "dynamic disassembly" support to MCObjectDisassembler.

It can now disassemble code in situations where the effective load
address is different than the load address declared in the object file.
This happens for PIC, hence "dynamic".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188884 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: When disassembly is impossible, fallback to data bytes.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:32 +0000 (07:28 +0000)]
MC CFG: When disassembly is impossible, fallback to data bytes.

This is the behavior of sequential disassemblers (llvm-objdump, ...),
when there is no instruction size hint (fixed-length, ...)

While there, also do some minor cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188883 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Add MCObjectDisassembler support for entrypoint + static ctors.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:29 +0000 (07:28 +0000)]
MC CFG: Add MCObjectDisassembler support for entrypoint + static ctors.

For now, this isn't implemented for any format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188882 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Split MCBasicBlocks to mirror atom splitting.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:24 +0000 (07:28 +0000)]
MC CFG: Split MCBasicBlocks to mirror atom splitting.

When an MCTextAtom is split, all MCBasicBlocks backed by it are
automatically split, with a fallthrough between both blocks, and
the successors moved to the second block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188881 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Add a few needed methods, mainly MCModule::findFirstAtomAfter.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:17 +0000 (07:28 +0000)]
MC CFG: Add a few needed methods, mainly MCModule::findFirstAtomAfter.

While there, do some minor cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188880 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC: ObjectSymbolizer can now recognize external function stubs.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:13 +0000 (07:28 +0000)]
MC: ObjectSymbolizer can now recognize external function stubs.

Only implemented in the Mach-O ObjectSymbolizer.
The testcase sadly introduces a new binary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188879 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC: Refactor ObjectSymbolizer to make relocation/section info generation lazy.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:07 +0000 (07:28 +0000)]
MC: Refactor ObjectSymbolizer to make relocation/section info generation lazy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188878 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Add entrypoint address to MCModule.
Ahmed Bougacha [Wed, 21 Aug 2013 07:28:02 +0000 (07:28 +0000)]
MC CFG: Add entrypoint address to MCModule.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188877 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Add more MCFunction container methods (find, empty).
Ahmed Bougacha [Wed, 21 Aug 2013 07:27:59 +0000 (07:27 +0000)]
MC CFG: Add more MCFunction container methods (find, empty).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188876 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Keep pointer to parent MCModule in created MCFunctions.
Ahmed Bougacha [Wed, 21 Aug 2013 07:27:55 +0000 (07:27 +0000)]
MC CFG: Keep pointer to parent MCModule in created MCFunctions.

Also, drive-by cleaning around createFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188875 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Don't insert preds/succs again.
Ahmed Bougacha [Wed, 21 Aug 2013 07:27:50 +0000 (07:27 +0000)]
MC CFG: Don't insert preds/succs again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188874 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Remap enough for the inserted instruction.
Ahmed Bougacha [Wed, 21 Aug 2013 07:27:47 +0000 (07:27 +0000)]
MC CFG: Remap enough for the inserted instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188873 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: uint64_t -> size_t for vector size.
Ahmed Bougacha [Wed, 21 Aug 2013 07:27:44 +0000 (07:27 +0000)]
MC CFG: uint64_t -> size_t for vector size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188872 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMC CFG: Add a getter for MCDataAtom's data array.
Ahmed Bougacha [Wed, 21 Aug 2013 07:27:40 +0000 (07:27 +0000)]
MC CFG: Add a getter for MCDataAtom's data array.

While there, switch to new-style documentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188871 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDebugInfo: Do not use the DWARF Version for the .debug_pubnames or .debug_pubtypes...
David Majnemer [Wed, 21 Aug 2013 06:13:34 +0000 (06:13 +0000)]
DebugInfo: Do not use the DWARF Version for the .debug_pubnames or .debug_pubtypes version field

Summary:
LLVM would generate DWARF with version 3 in the .debug_pubname and
.debug_pubtypes version fields.  This would lead SGI dwarfdump to fail
parsing the DWARF with (in the instance of .debug_pubnames) would exit
with:
dwarfdump ERROR:  dwarf_get_globals: DW_DLE_PUBNAMES_VERSION_ERROR (123)

This fixes PR16950.

Reviewers: echristo, dblaikie

Reviewed By: echristo

CC: cfe-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D1454

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188869 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSynchronize VEX JIT encoding code with the MCJIT version. Fix a bug in the MCJIT...
Craig Topper [Wed, 21 Aug 2013 05:57:45 +0000 (05:57 +0000)]
Synchronize VEX JIT encoding code with the MCJIT version. Fix a bug in the MCJIT code where CurOp was being incremented even if the operand it was pointing at wasn't used. Maybe only matters if there are any EVEX_K instructions that aren't VEX_4V.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188868 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoIn LLVM FMA3 operands are dst, src1, src2, src3, however dst is not encoded as it...
Nadav Rotem [Wed, 21 Aug 2013 05:03:10 +0000 (05:03 +0000)]
In LLVM FMA3 operands are dst, src1, src2, src3, however dst is not encoded as it is always src1. This was causing the encoding of the operands to be off by one.

Patch by Chris Bieneman.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188866 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd the FMA3 feature in order to test FMA encoding using the old jit.
Nadav Rotem [Wed, 21 Aug 2013 05:02:12 +0000 (05:02 +0000)]
Add the FMA3 feature in order to test FMA encoding using the old jit.

Patch by Chris Bieneman!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188865 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRename mattr names for AVX-512 to from avx-512 -> avx512f, avx-512-pfi -> av512pf...
Craig Topper [Wed, 21 Aug 2013 03:57:57 +0000 (03:57 +0000)]
Rename mattr names for AVX-512 to from avx-512 -> avx512f, avx-512-pfi -> av512pf, avx-512-cdi -> avx512cd, avx-512-eri->avx512er. This matches better with official docs and what gcc patches appearto be using. I didn't touch the has* functions or the feature flag names to avoid change the td and lowering file while commits are still happening.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188859 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoX86TargetMachine.cpp: Clarify to emit GOT in i686-{cygming|win32}-elf for mcjit.
NAKAMURA Takumi [Wed, 21 Aug 2013 02:37:25 +0000 (02:37 +0000)]
X86TargetMachine.cpp: Clarify to emit GOT in i686-{cygming|win32}-elf for mcjit.

I suppose all "lli -use-mcjit i686-*" should require GOT, (and to fail.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188856 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agolli/RecordingMemoryManager.cpp: Make it complain if _GLOBAL_OFFSET_TABLE_ were not...
NAKAMURA Takumi [Wed, 21 Aug 2013 02:37:14 +0000 (02:37 +0000)]
lli/RecordingMemoryManager.cpp: Make it complain if _GLOBAL_OFFSET_TABLE_ were not provided.

FIXME: Would it be responsible to provide GOT?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188855 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMove #includes from .h to .cpp file.
Jakub Staszak [Wed, 21 Aug 2013 01:20:11 +0000 (01:20 +0000)]
Move #includes from .h to .cpp file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188852 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[micromips] Print instruction alias "not" if the last operand of a nor is zero.
Akira Hatanaka [Wed, 21 Aug 2013 01:18:46 +0000 (01:18 +0000)]
[micromips] Print instruction alias "not" if the last operand of a nor is zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188851 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMove registering the execution of a basic block to the beginning rather than the...
Bill Wendling [Tue, 20 Aug 2013 23:52:00 +0000 (23:52 +0000)]
Move registering the execution of a basic block to the beginning rather than the end.

There are situations which can affect the correctness (or at least expectation)
of the gcov output. For instance, if a call to __gcov_flush() occurs within a
block before the execution count is registered and then the program aborts in
some way, then that block will not be marked as executed. This is not normally
what the user expects.

If we move the code that's registering when a block is executed to the
beginning, we can catch these types of situations.

PR16893

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188849 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips] Add support for mfhc1 and mthc1.
Akira Hatanaka [Tue, 20 Aug 2013 23:47:25 +0000 (23:47 +0000)]
[mips] Add support for mfhc1 and mthc1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188848 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips] Add support for calling convention CC_MipsO32_FP64, which is used when the
Akira Hatanaka [Tue, 20 Aug 2013 23:38:40 +0000 (23:38 +0000)]
[mips] Add support for calling convention CC_MipsO32_FP64, which is used when the
size of floating point registers is 64-bit.

Test case will be added when support for mfhc1 and mthc1 is added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188847 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips] Remove predicates that were incorrectly or unnecessarily added.
Akira Hatanaka [Tue, 20 Aug 2013 23:21:55 +0000 (23:21 +0000)]
[mips] Remove predicates that were incorrectly or unnecessarily added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188845 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd some constantness.
Jakub Staszak [Tue, 20 Aug 2013 23:04:15 +0000 (23:04 +0000)]
Add some constantness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188844 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse -disable-output and to suppress output and don't use a temporary file unless...
Bill Wendling [Tue, 20 Aug 2013 23:00:25 +0000 (23:00 +0000)]
Use -disable-output and to suppress output and don't use a temporary file unless we need one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188843 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips] Define register class FGRH32 for the high half of the 64-bit floating
Akira Hatanaka [Tue, 20 Aug 2013 22:58:56 +0000 (22:58 +0000)]
[mips] Define register class FGRH32 for the high half of the 64-bit floating
point registers. We will need this register class later when we add
definitions for instructions mfhc1 and mthc1. Also, remove sub-register indices
sub_fpeven and sub_fpodd and use sub_lo and sub_hi instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188842 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix include guards.
Jakub Staszak [Tue, 20 Aug 2013 22:52:02 +0000 (22:52 +0000)]
Fix include guards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188841 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSLPVectorizer: Fix invalid iterator errors
Arnold Schwaighofer [Tue, 20 Aug 2013 21:21:45 +0000 (21:21 +0000)]
SLPVectorizer: Fix invalid iterator errors

Update iterator when the SLP vectorizer changes the instructions in the basic
block by restarting the traversal of the basic block.

Patch by Yi Jiang!

Fixes PR 16899.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188832 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTeach ConstantFolding about pointer address spaces
Matt Arsenault [Tue, 20 Aug 2013 21:20:04 +0000 (21:20 +0000)]
Teach ConstantFolding about pointer address spaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188831 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips] Resolve register classes dynamically using ptr_rc to reduce the number of
Akira Hatanaka [Tue, 20 Aug 2013 21:08:22 +0000 (21:08 +0000)]
[mips] Resolve register classes dynamically using ptr_rc to reduce the number of
load/store instructions defined. Previously, we were defining load/store
instructions for each pointer size (32 and 64-bit), but now we need just one
definition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188830 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd an option which permits the user to specify using a bitmask, that various
Reed Kotler [Tue, 20 Aug 2013 20:53:09 +0000 (20:53 +0000)]
Add an option which permits the user to specify using a bitmask, that various
functions be compiled as mips32, without having to add attributes. This
is useful in certain situations where you don't want to have to edit the
function attributes in the source. For now it's only an option used for
the compiler developers when debugging the mips16 port.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188826 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips] Guard micromips instructions with predicate InMicroMips. Also, fix
Akira Hatanaka [Tue, 20 Aug 2013 20:46:51 +0000 (20:46 +0000)]
[mips] Guard micromips instructions with predicate InMicroMips. Also, fix
assembler predicate HasStdEnd so that it is false when the target is micromips.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188824 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: Fix fast-isel copy/paste-o.
Jim Grosbach [Tue, 20 Aug 2013 19:12:42 +0000 (19:12 +0000)]
ARM: Fix fast-isel copy/paste-o.

Update testcase to be more careful about checking register
values. While regexes are general goodness for these sorts of
testcases, in this example, the registers are constrained by
the calling convention, so we can and should check their
explicit values.

rdar://14779513

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188819 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoStill more MCJIT PIC test XFAILs
Andrew Kaylor [Tue, 20 Aug 2013 18:13:48 +0000 (18:13 +0000)]
Still more MCJIT PIC test XFAILs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188815 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoClarifying two MCJIT PIC tests as XFAIL on i686-pc-linux
Andrew Kaylor [Tue, 20 Aug 2013 17:01:35 +0000 (17:01 +0000)]
Clarifying two MCJIT PIC tests as XFAIL on i686-pc-linux

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188814 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemoving duplicate XFAIL markers
Andrew Kaylor [Tue, 20 Aug 2013 16:42:22 +0000 (16:42 +0000)]
Removing duplicate XFAIL markers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188812 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMarking two more MCJIT PIC tests as XFAIL on i686
Andrew Kaylor [Tue, 20 Aug 2013 15:47:04 +0000 (15:47 +0000)]
Marking two more MCJIT PIC tests as XFAIL on i686

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188808 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMarking MCJIT PIC tests as XFAIL on arm
Andrew Kaylor [Tue, 20 Aug 2013 15:36:04 +0000 (15:36 +0000)]
Marking MCJIT PIC tests as XFAIL on arm

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188807 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix style issues in AsmParser.cpp
Vladimir Medic [Tue, 20 Aug 2013 13:33:18 +0000 (13:33 +0000)]
Fix style issues in AsmParser.cpp

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188798 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAVX-512: Added more patterns for VMOVSS, VMOVSD, VMOVD, VMOVQ
Elena Demikhovsky [Tue, 20 Aug 2013 11:00:29 +0000 (11:00 +0000)]
AVX-512: Added more patterns for VMOVSS, VMOVSD, VMOVD, VMOVQ

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188786 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Removed fcge, fcgt, fsge, fsgt
Daniel Sanders [Tue, 20 Aug 2013 09:41:47 +0000 (09:41 +0000)]
[mips][msa] Removed fcge, fcgt, fsge, fsgt

These instructions were present in a draft spec but were removed before
publication.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188782 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Update README
Richard Sandiford [Tue, 20 Aug 2013 09:40:35 +0000 (09:40 +0000)]
[SystemZ] Update README

We now use MVST, CLST and SRST for the obvious cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188781 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Use SRST to optimize memchr
Richard Sandiford [Tue, 20 Aug 2013 09:38:48 +0000 (09:38 +0000)]
[SystemZ] Use SRST to optimize memchr

SystemZTargetLowering::emitStringWrapper() previously loaded the character
into R0 before the loop and made R0 live on entry.  I'd forgotten that
allocatable registers weren't allowed to be live across blocks at this stage,
and it confused LiveVariables enough to cause a miscompilation of f3 in
memchr-02.ll.

This patch instead loads R0 in the loop and leaves LICM to hoist it
after RA.  This is actually what I'd tried originally, but I went for
the manual optimisation after noticing that R0 often wasn't being hoisted.
This bug forced me to go back and look at why, now fixed as r188774.

We should also try to optimize null checks so that they test the CC result
of the SRST directly.  The select between null and the SRST GPR result could
then usually be deleted as dead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188779 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agomemcmp is not a valid way to compare structs with padding in them.
Benjamin Kramer [Tue, 20 Aug 2013 09:27:31 +0000 (09:27 +0000)]
memcmp is not a valid way to compare structs with padding in them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188778 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Added insve
Daniel Sanders [Tue, 20 Aug 2013 09:22:54 +0000 (09:22 +0000)]
[mips][msa] Added insve

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188777 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix test typo and add usual "br %r14" test
Richard Sandiford [Tue, 20 Aug 2013 09:14:46 +0000 (09:14 +0000)]
Fix test typo and add usual "br %r14" test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188775 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix overly pessimistic shortcut in post-RA MachineLICM
Richard Sandiford [Tue, 20 Aug 2013 09:11:13 +0000 (09:11 +0000)]
Fix overly pessimistic shortcut in post-RA MachineLICM

Post-RA LICM keeps three sets of registers: PhysRegDefs, PhysRegClobbers
and TermRegs.  When it sees a definition of R it adds all aliases of R
to the corresponding set, so that when it needs to test for membership
it only needs to test a single register, rather than worrying about
aliases there too.  E.g. the final candidate loop just has:

    unsigned Def = Candidates[i].Def;
    if (!PhysRegClobbers.test(Def) && ...) {

to test whether register Def is multiply defined.

However, there was also a shortcut in ProcessMI to make sure we didn't
add candidates if we already knew that they would fail the final test.
This shortcut was more pessimistic than the final one because it
checked whether _any alias_ of the defined register was multiply defined.
This is too conservative for targets that define register pairs.
E.g. on z, R0 and R1 are sometimes used as a pair, so there is a
128-bit register that aliases both R0 and R1.  If a loop used
R0 and R1 independently, and the definition of R0 came first,
we would be able to hoist the R0 assignment (because that used
the final test quoted above) but not the R1 assignment (because
that meant we had two definitions of the paired R0/R1 register
and would fail the shortcut in ProcessMI).

This patch just uses the same check for the ProcessMI shortcut as
we use in the final candidate loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188774 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: implement some simple f64 materializations.
Tim Northover [Tue, 20 Aug 2013 08:57:11 +0000 (08:57 +0000)]
ARM: implement some simple f64 materializations.

Previously we used a const-pool load for virtually all 64-bit floating values.
Actually, we can get quite a few common values (including 0.0, 1.0) via "vmov"
instructions of one stripe or another.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188773 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[stackprotector] Small cleanup.
Michael Gottesman [Tue, 20 Aug 2013 08:56:28 +0000 (08:56 +0000)]
[stackprotector] Small cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188772 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[stackprotector] Small Bit of computation hoisting.
Michael Gottesman [Tue, 20 Aug 2013 08:56:26 +0000 (08:56 +0000)]
[stackprotector] Small Bit of computation hoisting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188771 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[stackprotector] Added significantly longer comment to FindPotentialTailCall to make...
Michael Gottesman [Tue, 20 Aug 2013 08:56:23 +0000 (08:56 +0000)]
[stackprotector] Added significantly longer comment to FindPotentialTailCall to make clear its relationship to llvm::isInTailCallPosition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188770 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemoved trailing whitespace.
Michael Gottesman [Tue, 20 Aug 2013 08:46:16 +0000 (08:46 +0000)]
Removed trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188769 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[stackprotector] Removed stale TODO.
Michael Gottesman [Tue, 20 Aug 2013 08:46:13 +0000 (08:46 +0000)]
[stackprotector] Removed stale TODO.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188768 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips][msa] Added and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v
Daniel Sanders [Tue, 20 Aug 2013 08:38:21 +0000 (08:38 +0000)]
[mips][msa] Added and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188767 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[stackprotector] Added support for emitting the llvm intrinsic stack protector check.
Michael Gottesman [Tue, 20 Aug 2013 08:36:53 +0000 (08:36 +0000)]
[stackprotector] Added support for emitting the llvm intrinsic stack protector check.

rdar://13935163

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188766 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[stackprotector] Refactor out the end of isInTailCallPosition into the function retur...
Michael Gottesman [Tue, 20 Aug 2013 08:36:50 +0000 (08:36 +0000)]
[stackprotector] Refactor out the end of isInTailCallPosition into the function returnTypeIsEligibleForTailCall.

This allows me to use returnTypeIsEligibleForTailCall in the stack protector pass.

rdar://13935163

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188765 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove unused variables that crept in.
Michael Gottesman [Tue, 20 Aug 2013 07:17:27 +0000 (07:17 +0000)]
Remove unused variables that crept in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188761 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTeach selectiondag how to handle the stackprotectorcheck intrinsic.
Michael Gottesman [Tue, 20 Aug 2013 07:00:16 +0000 (07:00 +0000)]
Teach selectiondag how to handle the stackprotectorcheck intrinsic.

Previously, generation of stack protectors was done exclusively in the
pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
splitting basic blocks at the IR level to create the success/failure basic
blocks in the tail of the basic block in question. As a result of this,
calls that would have qualified for the sibling call optimization were no
longer eligible for optimization since said calls were no longer right in
the "tail position" (i.e. the immediate predecessor of a ReturnInst
instruction).

Then it was noticed that since the sibling call optimization causes the
callee to reuse the caller's stack, if we could delay the generation of
the stack protector check until later in CodeGen after the sibling call
decision was made, we get both the tail call optimization and the stack
protector check!

A few goals in solving this problem were:

  1. Preserve the architecture independence of stack protector generation.

  2. Preserve the normal IR level stack protector check for platforms like
     OpenBSD for which we support platform specific stack protector
     generation.

The main problem that guided the present solution is that one can not
solve this problem in an architecture independent manner at the IR level
only. This is because:

  1. The decision on whether or not to perform a sibling call on certain
     platforms (for instance i386) requires lower level information
     related to available registers that can not be known at the IR level.

  2. Even if the previous point were not true, the decision on whether to
     perform a tail call is done in LowerCallTo in SelectionDAG which
     occurs after the Stack Protector Pass. As a result, one would need to
     put the relevant callinst into the stack protector check success
     basic block (where the return inst is placed) and then move it back
     later at SelectionDAG/MI time before the stack protector check if the
     tail call optimization failed. The MI level option was nixed
     immediately since it would require platform specific pattern
     matching. The SelectionDAG level option was nixed because
     SelectionDAG only processes one IR level basic block at a time
     implying one could not create a DAG Combine to move the callinst.

To get around this problem a few things were realized:

  1. While one can not handle multiple IR level basic blocks at the
     SelectionDAG Level, one can generate multiple machine basic blocks
     for one IR level basic block. This is how we handle bit tests and
     switches.

  2. At the MI level, tail calls are represented via a special return
     MIInst called "tcreturn". Thus if we know the basic block in which we
     wish to insert the stack protector check, we get the correct behavior
     by always inserting the stack protector check right before the return
     statement. This is a "magical transformation" since no matter where
     the stack protector check intrinsic is, we always insert the stack
     protector check code at the end of the BB.

Given the aforementioned constraints, the following solution was devised:

  1. On platforms that do not support SelectionDAG stack protector check
     generation, allow for the normal IR level stack protector check
     generation to continue.

  2. On platforms that do support SelectionDAG stack protector check
     generation:

    a. Use the IR level stack protector pass to decide if a stack
       protector is required/which BB we insert the stack protector check
       in by reusing the logic already therein. If we wish to generate a
       stack protector check in a basic block, we place a special IR
       intrinsic called llvm.stackprotectorcheck right before the BB's
       returninst or if there is a callinst that could potentially be
       sibling call optimized, before the call inst.

    b. Then when a BB with said intrinsic is processed, we codegen the BB
       normally via SelectBasicBlock. In said process, when we visit the
       stack protector check, we do not actually emit anything into the
       BB. Instead, we just initialize the stack protector descriptor
       class (which involves stashing information/creating the success
       mbbb and the failure mbb if we have not created one for this
       function yet) and export the guard variable that we are going to
       compare.

    c. After we finish selecting the basic block, in FinishBasicBlock if
       the StackProtectorDescriptor attached to the SelectionDAGBuilder is
       initialized, we first find a splice point in the parent basic block
       before the terminator and then splice the terminator of said basic
       block into the success basic block. Then we code-gen a new tail for
       the parent basic block consisting of the two loads, the comparison,
       and finally two branches to the success/failure basic blocks. We
       conclude by code-gening the failure basic block if we have not
       code-gened it already (all stack protector checks we generate in
       the same function, use the same failure basic block).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188755 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix formatting. No functional change.
Craig Topper [Tue, 20 Aug 2013 05:23:59 +0000 (05:23 +0000)]
Fix formatting. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188746 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd AVX-512 and related features to the CPUID detection code.
Craig Topper [Tue, 20 Aug 2013 05:22:42 +0000 (05:22 +0000)]
Add AVX-512 and related features to the CPUID detection code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188745 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMove AVX and non-AVX replication inside a couple multiclasses to avoid repeating...
Craig Topper [Tue, 20 Aug 2013 04:24:14 +0000 (04:24 +0000)]
Move AVX and non-AVX replication inside a couple multiclasses to avoid repeating each instruction for both individually.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188743 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd an error check for a typo I accidentally made in a td file that caused an assert...
Craig Topper [Tue, 20 Aug 2013 04:22:09 +0000 (04:22 +0000)]
Add an error check for a typo I accidentally made in a td file that caused an assert to fire.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188742 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[PowerPC] More refactoring prior to real PPC emitPrologue/Epilogue changes.
Bill Schmidt [Tue, 20 Aug 2013 03:12:23 +0000 (03:12 +0000)]
[PowerPC] More refactoring prior to real PPC emitPrologue/Epilogue changes.

(Patch committed on behalf of Mark Minich, whose log entry follows.)

This is a continuation of the refactorings performed in svn rev 188573
(see that rev's comments for more detail).

This is my stage 2 refactoring: I combined the emitPrologue() &
emitEpilogue() PPC32 & PPC64 code into a single flow, simplifying a
lot of the code since in essence the PPC32 & PPC64 code generation
logic is the same, only the instruction forms are different (in most
cases). This simplification is necessary because my functional changes
(yet to come) add significant complexity, and without the
simplification of my stage 2 refactoring, the overall complexity of
both emitPrologue() & emitEpilogue() would have become almost
intractable for most mortal programmers (like me).

This submission was intended to be a pure refactoring (no functional
changes whatsoever). However, in the process of combining the PPC32 &
PPC64 flows, I spotted a difference that I believe is a bug (see svn
rev 186478 line 863, or svn rev 188573 line 888): This line appears to
be restoring the BP with the original FP content, not the original BP
content. When I merged the 32-bit and 64-bit code, I used the
corresponding code from the 64-bit flow, which I believe uses the
correct offset (BPOffset) for this operation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188741 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMarking MCJIT PIC tests as XFAIL on AArch64
Andrew Kaylor [Tue, 20 Aug 2013 01:50:50 +0000 (01:50 +0000)]
Marking MCJIT PIC tests as XFAIL on AArch64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188740 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[Sparc] Use HWEncoding instead of unused Num field in Sparc register definitions...
Venkatraman Govindaraju [Tue, 20 Aug 2013 01:26:14 +0000 (01:26 +0000)]
[Sparc] Use HWEncoding instead of unused Num field in Sparc register definitions. Also, correct the definitions of RETL and RET instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188738 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFixing XPASSes among MCJIT PIC test on i686
Andrew Kaylor [Tue, 20 Aug 2013 00:37:33 +0000 (00:37 +0000)]
Fixing XPASSes among MCJIT PIC test on i686

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188736 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSecond attempt to mark Large/PIC MCJIT test as XFAIL for PowerPC64
Andrew Kaylor [Tue, 20 Aug 2013 00:22:03 +0000 (00:22 +0000)]
Second attempt to mark Large/PIC MCJIT test as XFAIL for PowerPC64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188735 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMarking two MCJIT PIC tests as XFAIL on Darwin
Andrew Kaylor [Tue, 20 Aug 2013 00:14:50 +0000 (00:14 +0000)]
Marking two MCJIT PIC tests as XFAIL on Darwin

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188734 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTrying again with PIC tests for MCJIT
Andrew Kaylor [Mon, 19 Aug 2013 23:52:53 +0000 (23:52 +0000)]
Trying again with PIC tests for MCJIT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188730 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a llvm.copysign intrinsic
Hal Finkel [Mon, 19 Aug 2013 23:35:46 +0000 (23:35 +0000)]
Add a llvm.copysign intrinsic

This adds a llvm.copysign intrinsic; We already have Libfunc recognition for
copysign (which is turned into the FCOPYSIGN SDAG node). In order to
autovectorize calls to copysign in the loop vectorizer, we need a corresponding
intrinsic as well.

In addition to the expected changes to the language reference, the loop
vectorizer, BasicTTI, and the SDAG builder (the intrinsic is transformed into
an FCOPYSIGN node, just like the function call), this also adds FCOPYSIGN to a
few lists in LegalizeVector{Ops,Types} so that vector copysigns can be
expanded.

In TargetLoweringBase::initActions, I've made the default action for FCOPYSIGN
be Expand for vector types. This seems correct for all in-tree targets, and I
think is the right thing to do because, previously, there was no way to generate
vector-values FCOPYSIGN nodes (and most targets don't specify an action for
vector-typed FCOPYSIGN).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188728 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't form PPC CTR-based loops around a copysignl call
Hal Finkel [Mon, 19 Aug 2013 23:35:24 +0000 (23:35 +0000)]
Don't form PPC CTR-based loops around a copysignl call

copysign/copysignf never become function calls (because the SDAG expansion code
does not lower to the corresponding function call, but rather directly
implements the associated logic), but copysignl almost always is lowered into a
call to the requested libm functon (and, thus, might clobber CTR).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188727 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdding PIC support for ELF on x86_64 platforms
Andrew Kaylor [Mon, 19 Aug 2013 23:27:43 +0000 (23:27 +0000)]
Adding PIC support for ELF on x86_64 platforms

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188726 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoIntroduce non-const overloads for GlobalAlias::{get,resolve}AliasedGlobal.
Peter Collingbourne [Mon, 19 Aug 2013 23:13:33 +0000 (23:13 +0000)]
Introduce non-const overloads for GlobalAlias::{get,resolve}AliasedGlobal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188725 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse pop_back_val() instead of both back() and pop_back().
Jakub Staszak [Mon, 19 Aug 2013 22:47:55 +0000 (22:47 +0000)]
Use pop_back_val() instead of both back() and pop_back().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188723 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTeach InstCombine visitGetElementPtr about address spaces
Matt Arsenault [Mon, 19 Aug 2013 22:17:40 +0000 (22:17 +0000)]
Teach InstCombine visitGetElementPtr about address spaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188721 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoCleanup visitGetElementPtr to make address space change easier
Matt Arsenault [Mon, 19 Aug 2013 22:17:34 +0000 (22:17 +0000)]
Cleanup visitGetElementPtr to make address space change easier

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188720 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agocommonPointerCast cleanups to make address space change easier
Matt Arsenault [Mon, 19 Aug 2013 22:17:18 +0000 (22:17 +0000)]
commonPointerCast cleanups to make address space change easier

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188719 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMake sure that pop_back_val() result is used.
Jakub Staszak [Mon, 19 Aug 2013 22:12:00 +0000 (22:12 +0000)]
Make sure that pop_back_val() result is used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188717 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoReverting r188709 until I can figure out the proper way to XFAIL it.
Andrew Kaylor [Mon, 19 Aug 2013 22:05:07 +0000 (22:05 +0000)]
Reverting r188709 until I can figure out the proper way to XFAIL it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188715 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix assert with GEP ptr vector indexing structs
Matt Arsenault [Mon, 19 Aug 2013 21:43:16 +0000 (21:43 +0000)]
Fix assert with GEP ptr vector indexing structs

Also fix it calculating the wrong value. The struct index
is not a ConstantInt, so it was being interpreted as an array
index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188713 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse less verbose code and update comments.
Eric Christopher [Mon, 19 Aug 2013 21:41:38 +0000 (21:41 +0000)]
Use less verbose code and update comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188711 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert non-test parts of r188507
Matt Arsenault [Mon, 19 Aug 2013 21:40:31 +0000 (21:40 +0000)]
Revert non-test parts of r188507

Re-add the inboundsless tests I didn't add originally

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188710 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdding tests for PIC with MCJIT
Andrew Kaylor [Mon, 19 Aug 2013 21:08:35 +0000 (21:08 +0000)]
Adding tests for PIC with MCJIT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188709 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTurn on pubnames by default on linux.
Eric Christopher [Mon, 19 Aug 2013 21:07:38 +0000 (21:07 +0000)]
Turn on pubnames by default on linux.

Until gdb supports the new accelerator tables we should add the
pubnames section so that gdb_index can be generated from gold
at link time. On darwin we already emit the accelerator tables
and so don't need to worry about pubnames.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188708 91177308-0d34-0410-b5e6-96231b3b80d8